CN111223838A - Insulating welt of high-efficient heat dissipation - Google Patents
Insulating welt of high-efficient heat dissipation Download PDFInfo
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- CN111223838A CN111223838A CN202010026532.8A CN202010026532A CN111223838A CN 111223838 A CN111223838 A CN 111223838A CN 202010026532 A CN202010026532 A CN 202010026532A CN 111223838 A CN111223838 A CN 111223838A
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- heat dissipation
- flow channel
- efficient heat
- ceramic layer
- liner plate
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/367—Cooling facilitated by shape of device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/46—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids
- H01L23/473—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements involving the transfer of heat by flowing fluids by flowing liquids
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- Geometry (AREA)
- Ceramic Engineering (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
The invention provides an efficient heat dissipation insulating lining plate which comprises an upper metal layer, a ceramic layer and a lower metal layer which are sequentially stacked, wherein a flow channel structure is arranged in the ceramic layer, and the flow channel structure is fully distributed in a heating area of a semiconductor chip. The channel structure is arranged in the ceramic layer of the insulating lining plate, so that the design of the insulating lining plate with high-efficiency heat dissipation effect is not limited by the selection of material characteristics any more, the direct heat dissipation from a semiconductor chip to cooling liquid can be realized, the heat dissipation path in the module is improved, the heat dissipation efficiency of the module is enhanced, and the thermal stability and the long-term reliability of the power module are improved.
Description
Technical Field
The invention relates to the field of power electronic module design, in particular to a high-efficiency heat dissipation insulating lining plate in a power electronic module.
Background
In power electronics applications, an insulating backing plate is one of the key materials in the module structure, and the insulating backing plate is mainly used as a supporting structure for circuits and semiconductor chips. Electrically, the insulating patch must be capable of insulating or isolating various circuit structures, and also withstand the application of several kilovolts between the power terminals and the housing; mechanically, it provides mechanical support for all active or passive components and must therefore be able to withstand different environmental stresses; more importantly, the insulating liner must have good thermal conductivity characteristics to remove or transfer heat generated by the power components on the insulating liner. At present, in order to increase the thermal conductivity of the insulating liner, it is mainly achieved by using a material with high thermal conductivity, such as aluminum nitride ceramic with high thermal conductivity as the insulating layer and copper metal as the surface metallization layer, but this method is limited by the characteristics of the material.
In the prior art, the technical schemes similar to the present invention mainly include the following:
Therefore, the current insulating lining plate is limited by the selection of ceramic materials, and heat generated by the power element is difficult to eliminate or transfer in time, so that the heat transfer inside the power electronic module is uneven, the thermal resistance of the module is increased, and the direct influence on the heat dissipation effect and the thermal fatigue failure of the power electronic module is generated.
Disclosure of Invention
In order to solve the technical problems, the invention provides the insulating lining plate with the efficient heat dissipation structure, the flow channel structure is added in the lining plate, the problem of low heat dissipation efficiency of the traditional insulating ceramic lining plate is solved by adopting a direct liquid cooling mode, the heat dissipation path in the module is improved, the heat dissipation efficiency of the module is enhanced, and the thermal stability and the long-term reliability of the power module are improved.
The efficient heat dissipation insulating lining plate comprises an upper metal layer, a ceramic layer and a lower metal layer which are sequentially stacked, wherein a flow channel structure is arranged in the ceramic layer, and the flow channel structure is fully distributed in a heating area of a semiconductor chip.
In one embodiment, the lower metal layer is a heat dissipation sealing layer, forms a heat dissipation channel, and seals the flow channel structure.
In one embodiment, the ceramic layer material is one or more of alumina, zirconia, aluminum nitride, and silicon carbide.
In one embodiment, the ceramic layer is an integral structure with the flow channel structure therein.
In one embodiment, the flow passage structure is a direct liquid cooling flow passage.
In one embodiment, the direct liquid cooling flow passage is serpentine in an "S" shape.
In one embodiment, the direct liquid cooling flow passage has a cross-sectional dimension of between 0.1mm and 3 mm.
In one embodiment, the flow channel structure is a pin fin liquid cooling flow channel.
In one embodiment, the cross-sectional dimension of the pin fin in the pin fin liquid cooling flow passage is 0.1mm to 5mm, and the height is 0.1mm to 5 mm.
In one embodiment, the spacing between the pin fins is 0.1mm to 10 mm.
In one embodiment, the cross-section of the pin fin is in the shape of one of a circle, an ellipse or a polygon, wherein the number of sides N of the polygon is more than or equal to 3.
Compared with the prior art, the direct liquid cooling runner or the pin-fin liquid cooling runner is arranged in the insulating lining plate ceramic layer, so that direct heat dissipation from the semiconductor chip to the cooling liquid can be realized, the heat dissipation path in the module is improved, the heat dissipation efficiency of the module is enhanced, and the thermal stability and the long-term reliability of the power module are improved. The design of the insulating lining plate with high-efficiency heat dissipation effect is not limited by the selection of material characteristics any more, the heat generated by the power element is eliminated or transferred in time, and the heat dissipation efficiency of the module is improved.
The technical features described above can be combined in various technically feasible ways to produce new embodiments, as long as the object of the invention is achieved.
Drawings
The invention will be described in more detail hereinafter on the basis of non-limiting examples only and with reference to the accompanying drawings. Wherein:
FIG. 1 illustrates one embodiment of the high efficiency heat dissipating insulating liner of the present invention;
FIG. 2 shows a front view of the high efficiency heat dissipating insulating liner of FIG. 1;
FIG. 3 is a schematic diagram of the ceramic layer of the high efficiency heat dissipating insulating liner of FIG. 1 with liquid cooling channels;
FIG. 4 illustrates another embodiment of the high efficiency heat dissipating insulating liner of the present invention;
FIG. 5 shows a front view of the high efficiency heat dissipating insulating liner of FIG. 4;
fig. 6 shows a structure diagram of the ceramic layer of the high efficiency heat dissipating insulation lining plate of fig. 4 provided with a pin fin cooling liquid structure.
In the drawings, like components are denoted by like reference numerals. The figures are not drawn to scale.
In the figures, the reference numbers are:
1. an upper metal layer; 2. a ceramic layer; 3. a lower metal layer; 4. a direct liquid cooling runner; 5. a pin fin liquid cooling runner; 6. a pin fin; 100. high-efficient heat dissipation insulating liner.
Detailed Description
The invention will be described in further detail below with reference to the drawings and specific examples. It should be noted that, as long as there is no conflict, the embodiments and the features of the embodiments of the present invention may be combined with each other, and the technical solutions formed are within the scope of the present invention.
Example 1
As shown in fig. 1-3, in an embodiment of the efficient heat dissipation insulating liner of the present invention, the efficient heat dissipation insulating liner 100 includes an upper metal layer 1, a ceramic layer 2 and a lower metal layer 3, which are sequentially disposed, the upper metallization layer 1 is located on an upper surface of the ceramic layer 2, the lower metallization layer 3 is located on a lower surface of the ceramic layer 2, and the direct liquid cooling flow channel 4 is located inside the ceramic layer 2 and is fully distributed in a heat generating region of the semiconductor chip. The ceramic layer 2 may be made of one or more of alumina, zirconia, aluminum nitride, silicon carbide, and the like.
As shown in fig. 3, the liquid cooling flow passage 4 is meandering in an "S" shape.
In one embodiment, the cross-sectional dimension of the liquid cooling flow passage 4 is 0.1mm to 3 mm.
Preferably, the cross-sectional dimension of the liquid cooling flow passage 4 is 1mm to 2 mm. For example, the cross-sectional dimension of the liquid-cooling flow passage 4 may be selected to be 0.5mm, 0.8mm, 1mm, 1.3mm, 1.5mm, 1.8mm, etc.
In one embodiment, the cross-sectional shape of the liquid-cooling flow passage 4 is one of a circle, an ellipse, and a polygon having a size N.gtoreq.3.
In one embodiment, the cross-sectional shape of the liquid-cooling flow passage 4 is a multi-deformation with the number of sides N.gtoreq.3.
In one embodiment, the liquid cooling channel 4 and the ceramic layer 2 are integrally formed by a sintering process through mold forming or machining.
In this embodiment, through set up direct liquid cooling passageway in welt ceramic layer inside, can let in the coolant liquid, realize the direct heat dissipation from semiconductor chip to between the coolant liquid, improved the inside heat dissipation route of module, strengthened module radiating efficiency, improve power module's thermal stability and long-term reliability. Meanwhile, the design of the insulating lining plate with high-efficiency heat dissipation effect is not limited by the selection of material characteristics any more.
Example 2
As shown in fig. 4-6, in another embodiment of the high-efficiency heat-dissipating insulating liner plate of the present invention, the high-efficiency heat-dissipating insulating liner plate 100 includes an upper metal layer 1, a ceramic layer 2 and a lower metal layer 3, which are sequentially disposed, the upper metal layer 1 is located on the upper surface of the ceramic layer 2, the lower metal layer 3 is located on the lower surface of the ceramic layer 2, and the pin-fin liquid cooling channels 5 are located inside the ceramic layer 2 and are distributed over the heat-generating region of the semiconductor chip. The ceramic layer 2 may be made of one or more of alumina, zirconia, aluminum nitride, silicon carbide, and the like.
In one embodiment, the cross-section of each pin fin 6 in the pin fin liquid cooling flow passage 5 is in the shape of one of a circle, an ellipse or a polygon, and the size N of the polygon is more than or equal to 3.
In one embodiment, the pin fin liquid cooling flow passage 5 has a cross-sectional dimension of each pin fin 6 of 0.1mm to 5mm and a height of 0.1mm to 5 mm.
Preferably, the cross section size of each pin fin 6 in the pin fin liquid cooling flow passage 5 is 1 mm-3 mm, and the height is 1 mm-3 mm.
For example, the cross-sectional dimensions of the pin fin 6 may be 0.5mm, 0.8mm, 1mm, 1.2mm, 1.5mm, etc. The height may be 0.8mm, 1mm, 1.2mm, 1.5mm, 2mm, 2.2mm, 2.5mm, etc.
In one embodiment, the spacing between the pin fins 6 is 0.1mm to 10 mm.
Preferably, the distance between the pin fins 6 is 1mm to 5 mm. For example, 1mm, 1.2mm, 1.5mm, 2.5mm, etc. can be selected.
In a preferred embodiment, the pin fins 6 of the pin fin liquid cooling channels 5 are integrally formed with the ceramic layer 2.
In addition, the dimensions mentioned in the two embodiments can be designed according to actual conditions.
According to the high-efficiency insulating heat dissipation lining plate, the pin fin liquid cooling structure is arranged in the lining plate ceramic layer, so that direct heat dissipation from a semiconductor chip to cooling liquid can be realized, a heat dissipation path in a module is improved, the heat dissipation efficiency of the module is enhanced, and the thermal stability and long-term reliability of a power module are improved.
It will thus be appreciated by those skilled in the art that while the invention has been described with reference to a preferred embodiment, various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In particular, the technical features mentioned in the embodiments can be combined in any way as long as there is no structural conflict. It is intended that the invention not be limited to the particular embodiments disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.
Claims (10)
1. The utility model provides an insulating welt of high-efficient heat dissipation, includes last metal level, ceramic layer and the lower metal level that stacks gradually the setting, its characterized in that, be provided with the runner structure in the ceramic layer, the runner structure is covered with semiconductor chip's the region that generates heat.
2. The efficient heat dissipation insulating liner plate of claim 1, wherein the lower metal layer is a heat dissipation sealing layer, which forms a heat dissipation channel and seals the flow channel structure.
3. The efficient heat dissipation insulating lining plate according to claim 1, wherein the ceramic layer is made of one or more of alumina, zirconia, aluminum nitride and silicon carbide.
4. The efficient heat dissipation insulating liner plate as claimed in claim 1, wherein the ceramic layer and the flow channel structure inside the ceramic layer are integrally formed.
5. The efficient heat dissipation insulating liner plate according to any one of claims 1 to 4, wherein the flow channel structure is a direct liquid cooling flow channel.
6. The efficient heat dissipating insulation liner plate according to claim 5, wherein the direct liquid cooling flow channel is serpentine in an "S" shape.
7. The efficient heat dissipating insulation liner plate according to claim 6, wherein the cross-sectional dimension of the direct liquid cooling flow channel is between 0.1mm and 3 mm.
8. The efficient heat dissipation insulating liner plate according to any one of claims 1 to 4, wherein the flow channel structure is a pin fin liquid cooling flow channel.
9. The efficient heat dissipation insulating liner plate according to claim 8, wherein the cross-sectional dimension of the pin fin in the pin fin liquid cooling flow channel is 0.1mm to 5mm, the height is 0.1mm to 5mm, and the distance between the pin fin and the pin fin is 0.1mm to 10 mm.
10. The efficient heat dissipation insulating liner plate according to claim 9, wherein the cross section of the pin fin is in one of a circular shape, an oval shape and a polygonal shape, wherein the number of sides N of the polygonal shape is greater than or equal to 3.
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CN202010026532.8A CN111223838A (en) | 2020-01-10 | 2020-01-10 | Insulating welt of high-efficient heat dissipation |
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CN202010026532.8A CN111223838A (en) | 2020-01-10 | 2020-01-10 | Insulating welt of high-efficient heat dissipation |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112151666A (en) * | 2020-09-28 | 2020-12-29 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
Citations (5)
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CN101765350A (en) * | 2008-12-23 | 2010-06-30 | 明景科技股份有限公司 | High-power radiating module |
CN103295982A (en) * | 2013-06-05 | 2013-09-11 | 中国科学院电工研究所 | Coppered ceramic radiator for electronic packaging module |
CN103594430A (en) * | 2013-10-25 | 2014-02-19 | 上海交通大学 | Micro-channel radiator for dissipating heat of power electronic device |
CN207491296U (en) * | 2017-10-20 | 2018-06-12 | 泰州市博泰电子有限公司 | A kind of low-temperature co-fired ceramic substrate of embedded fluid channel |
CN109830443A (en) * | 2019-02-26 | 2019-05-31 | 西南应用磁学研究所 | A kind of large scale fluid channel production method based on LTCC technique |
-
2020
- 2020-01-10 CN CN202010026532.8A patent/CN111223838A/en not_active Withdrawn
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101765350A (en) * | 2008-12-23 | 2010-06-30 | 明景科技股份有限公司 | High-power radiating module |
CN103295982A (en) * | 2013-06-05 | 2013-09-11 | 中国科学院电工研究所 | Coppered ceramic radiator for electronic packaging module |
CN103594430A (en) * | 2013-10-25 | 2014-02-19 | 上海交通大学 | Micro-channel radiator for dissipating heat of power electronic device |
CN207491296U (en) * | 2017-10-20 | 2018-06-12 | 泰州市博泰电子有限公司 | A kind of low-temperature co-fired ceramic substrate of embedded fluid channel |
CN109830443A (en) * | 2019-02-26 | 2019-05-31 | 西南应用磁学研究所 | A kind of large scale fluid channel production method based on LTCC technique |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112151666A (en) * | 2020-09-28 | 2020-12-29 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
CN112151666B (en) * | 2020-09-28 | 2021-11-09 | 京东方科技集团股份有限公司 | Display substrate, preparation method thereof and display device |
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Application publication date: 20200602 |