CN111180311A - 一种降低GaN衬底与外延层界面处Si浓度的方法 - Google Patents
一种降低GaN衬底与外延层界面处Si浓度的方法 Download PDFInfo
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- CN111180311A CN111180311A CN201911117597.7A CN201911117597A CN111180311A CN 111180311 A CN111180311 A CN 111180311A CN 201911117597 A CN201911117597 A CN 201911117597A CN 111180311 A CN111180311 A CN 111180311A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02389—Nitrides
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
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- H01L21/02538—Group 13/15 materials
- H01L21/0254—Nitrides
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- H—ELECTRICITY
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02694—Controlling the interface between substrate and epitaxial layer, e.g. by ion implantation followed by annealing
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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CN111180311B CN111180311B (zh) | 2022-08-09 |
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Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113555431A (zh) * | 2021-07-21 | 2021-10-26 | 西安电子科技大学 | 基于P型GaN漏电隔离层的同质外延氮化镓高电子迁移率晶体管及制作方法 |
CN113594021A (zh) * | 2021-07-21 | 2021-11-02 | 东莞市中镓半导体科技有限公司 | 硅基GaN-HEMT外延结构的制作方法 |
Citations (5)
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US5600177A (en) * | 1993-12-28 | 1997-02-04 | Nec Corporation | Semiconductor device having an electrically conductive layer including a polycrystalline layer containing an impurity and a metallic silicide layer |
CN104576391A (zh) * | 2013-10-18 | 2015-04-29 | 中芯国际集成电路制造(上海)有限公司 | 一种pmos器件及其制备方法 |
CN104804649A (zh) * | 2015-04-24 | 2015-07-29 | 清华大学 | 一种用于氮化镓的抛光液 |
CN107564799A (zh) * | 2017-08-23 | 2018-01-09 | 中国科学院半导体研究所 | GaN衬底的表面处理方法 |
CN107706232A (zh) * | 2017-11-13 | 2018-02-16 | 江苏华功半导体有限公司 | 一种原位MIS栅结构常关型GaN基晶体管及制备方法 |
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- 2019-11-15 CN CN201911117597.7A patent/CN111180311B/zh active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5600177A (en) * | 1993-12-28 | 1997-02-04 | Nec Corporation | Semiconductor device having an electrically conductive layer including a polycrystalline layer containing an impurity and a metallic silicide layer |
CN104576391A (zh) * | 2013-10-18 | 2015-04-29 | 中芯国际集成电路制造(上海)有限公司 | 一种pmos器件及其制备方法 |
CN104804649A (zh) * | 2015-04-24 | 2015-07-29 | 清华大学 | 一种用于氮化镓的抛光液 |
CN107564799A (zh) * | 2017-08-23 | 2018-01-09 | 中国科学院半导体研究所 | GaN衬底的表面处理方法 |
CN107706232A (zh) * | 2017-11-13 | 2018-02-16 | 江苏华功半导体有限公司 | 一种原位MIS栅结构常关型GaN基晶体管及制备方法 |
Non-Patent Citations (1)
Title |
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刘新科等: "《杂质吸附对背栅MoS2场效应晶体管电学性能的影响》", 《电子器件》 * |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN113555431A (zh) * | 2021-07-21 | 2021-10-26 | 西安电子科技大学 | 基于P型GaN漏电隔离层的同质外延氮化镓高电子迁移率晶体管及制作方法 |
CN113594021A (zh) * | 2021-07-21 | 2021-11-02 | 东莞市中镓半导体科技有限公司 | 硅基GaN-HEMT外延结构的制作方法 |
CN113555431B (zh) * | 2021-07-21 | 2022-12-02 | 西安电子科技大学 | 基于P型GaN漏电隔离层的同质外延氮化镓高电子迁移率晶体管及制作方法 |
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Inventor after: Liu Xinke Inventor after: Ben Jianwei Inventor after: Gao Bo Inventor before: Liu Xinke Inventor before: Ben Jianwei |
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Effective date of registration: 20230331 Address after: No. 1088, Xueyuan Avenue, Taoyuan Street, Nanshan District, Shenzhen City, Guangdong Province Patentee after: SOUTH University OF SCIENCE AND TECHNOLOGY OF CHINA Address before: Taizhou building, No. 1088, Xueyuan Avenue, Xili University Town, Nanshan District, Shenzhen City, Guangdong Province Patentee before: SHENZHEN THIRD GENERATION SEMICONDUCTOR Research Institute |