CN111162002A - Memory manufacturing method and memory - Google Patents

Memory manufacturing method and memory Download PDF

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Publication number
CN111162002A
CN111162002A CN202010002802.1A CN202010002802A CN111162002A CN 111162002 A CN111162002 A CN 111162002A CN 202010002802 A CN202010002802 A CN 202010002802A CN 111162002 A CN111162002 A CN 111162002A
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substrate
barrier layer
layer
control unit
memory
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CN111162002B (en
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马浩东
刘峻
董金文
邹欣伟
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Yangtze Memory Technologies Co Ltd
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Yangtze Memory Technologies Co Ltd
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02318Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
    • H01L21/02321Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment introduction of substances into an already existing insulating layer

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Abstract

The embodiment of the disclosure discloses a manufacturing method of a memory and the memory, wherein the manufacturing method of the memory comprises the following steps: forming a passivation layer on a first substrate having a memory cell; the memory cell is positioned on a first surface of the first substrate, the passivation layer is positioned on a second surface of the first substrate, and the second surface of the first substrate is an opposite surface of the first substrate; forming a first barrier layer having a first dangling bond on the passivation layer on the second surface of the first substrate; carrying out heat treatment on the passivation layer at a preset temperature; wherein hydrogen particles in the passivation layer are released to the first barrier layer and combine with the first dangling bonds to form first covalent bonds.

Description

Memory manufacturing method and memory
Technical Field
The disclosed embodiments relate to the field of integrated circuits, and in particular, to a memory and a manufacturing method thereof.
Background
As the feature size of semiconductor manufacturing processes becomes smaller, the storage density of memories becomes higher. The memory prepared by arranging the plurality of memory units along the direction vertical to the stacking structure can improve the integration level on a wafer, realize the improvement of the memory density and reduce the cost.
In the preparation process of the memory, because the memory cell has lattice defects and the like, the memory cell needs to be passivated to remove the defects in the memory cell and ensure the quality of the memory. In the related art, the passivation effect on the memory cell is poor, and the quality of the memory is difficult to ensure.
Disclosure of Invention
In view of the above, the present disclosure provides a method for manufacturing a memory and a memory.
According to a first aspect of the embodiments of the present disclosure, there is provided a method for manufacturing a memory, including:
forming a passivation layer on a first substrate having a memory cell; the memory cell is positioned on a first surface of the first substrate, the passivation layer is positioned on a second surface of the first substrate, and the second surface of the first substrate is an opposite surface of the first substrate;
forming a first barrier layer having a first dangling bond on the passivation layer on the second surface of the first substrate;
carrying out heat treatment on the passivation layer at a preset temperature; wherein hydrogen particles in the passivation layer are released to the first barrier layer and combine with the first dangling bonds to form first covalent bonds.
Optionally, the forming a first barrier layer having a first dangling bond on the passivation layer on the second surface of the first substrate includes:
forming the first barrier layer with the first dangling bond on the passivation layer by using a magnetron sputtering method;
alternatively, the first and second electrodes may be,
and forming the first barrier layer with the first dangling bond on the passivation layer by using a plasma enhanced chemical vapor deposition method.
Optionally, the method further comprises:
forming a second barrier layer having a second dangling key on a second substrate having a control unit; wherein the control unit and the second barrier layer are both located on the first surface of the second substrate, and the control unit is located between the second barrier layer and the first surface of the second substrate;
bonding the second substrate with the second barrier layer to the first substrate with the passivation layer and the first barrier layer;
after the first substrate and the second substrate are bonded, an electrical connection is formed between the control unit and the storage unit, and the control unit is used for controlling the storage unit in the first substrate to store data;
the heat treatment of the passivation layer at a preset temperature includes:
performing the heat treatment on the bonded first substrate and the bonded second substrate at the preset temperature; wherein the hydrogen particles in the passivation layer are also released to the second barrier layer and bond with the second dangling bonds to form a second covalent bond.
Optionally, the forming a second barrier layer having a second dangling key on a second substrate having a control unit includes:
forming the second barrier layer with the second dangling bond on the second substrate by using a magnetron sputtering method;
alternatively, the first and second electrodes may be,
and forming the second barrier layer with the second dangling bond on the second substrate by using a plasma enhanced chemical vapor deposition method.
Optionally, the method further comprises:
forming a conductive layer on a first surface of the second substrate having the control unit; wherein the control unit is located between the conductive layer and the first surface of the second substrate;
forming a third barrier layer on the conductive layer; the third barrier layer is used for blocking the conductive layer from diffusing to the first substrate after the first substrate and the second substrate are bonded;
the forming a second barrier layer with a second dangling key on a second substrate with a control unit includes:
forming the second barrier layer with the second dangling bond on the third barrier layer; wherein the third barrier layer is located between the conductive layer and the second barrier layer.
According to a second aspect of embodiments of the present disclosure, there is provided a memory comprising:
a first substrate having a memory cell; wherein the memory cell is located on a first surface of the first substrate;
a first barrier layer on the second surface of the first substrate having a first covalent bond; wherein the second surface of the first substrate is an opposite surface of the first substrate;
a passivation layer between the second surface of the first substrate and the first barrier layer;
wherein the first covalent bond is formed by bonding a dangling bond contained in the first barrier layer before the heat treatment of the passivation layer and a hydrogen particle released in the heat treatment of the passivation layer.
Optionally, the material constituting the first barrier layer includes: silicon nitride; the ratio of silicon particles to nitrogen particles in the first barrier layer is greater than a preset threshold value;
alternatively, the first and second electrodes may be,
the material constituting the first barrier layer includes: a metal oxide.
Optionally, the memory further comprises:
a second substrate having a control unit bonded to the first substrate having the passivation layer and the first barrier layer; the control unit is positioned on the first surface of the second substrate, and an electrical connection is formed between the control unit and the storage unit and is used for controlling the storage unit in the first substrate to store data;
the second barrier layer is positioned on the first surface of the second substrate, positioned between the first surface of the first substrate and the control unit and provided with a second covalent bond;
wherein the second covalent bond is formed by bonding a second dangling bond contained in the second barrier layer and hydrogen particles generated in the thermal treatment of the passivation layer before the first substrate and the second substrate are bonded.
Optionally, the material constituting the second barrier layer includes: silicon nitride; the ratio of silicon particles to nitrogen particles in the second barrier layer is greater than a preset threshold value;
alternatively, the first and second electrodes may be,
the material constituting the second barrier layer includes: a metal oxide.
Optionally, the memory further comprises:
a conductive layer on the first surface of the second substrate;
and the third barrier layer is positioned between the conductive layer and the second barrier layer and used for blocking the conductive layer from diffusing to the first substrate.
In the related art, when the first substrate formed with the passivation layer is subjected to heat treatment, a part of hydrogen particles released by the passivation layer may diffuse into the memory cell formed on the first substrate, so as to passivate the memory cell; another part of the hydrogen particles released by the passivation layer can diffuse into the environment of the first substrate, so that the number of the hydrogen particles which can be used for passivating the memory cell is reduced, and the passivation effect is difficult to ensure.
In the embodiment of the disclosure, the passivation layer is isolated from the external environment by the barrier layer by forming the first barrier layer with the first dangling bond on the passivation layer. When the passivation layer is subjected to heat treatment, the hydrogen particles released from the passivation layer and the first suspension bond in the first barrier layer are combined to form a first covalent bond, so that the probability of diffusion of the hydrogen particles to the external environment is reduced, the probability of diffusion of the hydrogen particles released from the passivation layer to the storage unit is increased, the passivation effect on the storage unit is favorably improved, the yield and the reliability of the memory are improved, and the quality of the memory is improved.
Drawings
Fig. 1 is a flowchart of a method for manufacturing a memory according to an embodiment of the present invention;
FIG. 2 is a diagram illustrating a memory according to an embodiment of the present invention;
FIG. 3 is a diagram of another memory according to an embodiment of the present invention;
FIG. 4 is a diagram illustrating another memory according to an embodiment of the present invention;
FIG. 5 is a diagram illustrating another memory according to an embodiment of the present invention;
fig. 6a to fig. 6b are partial flow charts of a method for manufacturing a memory according to an embodiment of the present invention.
Detailed Description
The technical solution of the present invention will be further elaborated with reference to the drawings and the embodiments. While exemplary implementations of the present disclosure are shown in the drawings, it should be understood that the present disclosure may be embodied in various forms and should not be limited by the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art.
The present invention is more particularly described in the following paragraphs with reference to the accompanying drawings by way of example. Advantages and features of the present disclosure will become apparent from the following description and claims. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present disclosure.
In the disclosed embodiment, the term "a is connected to B" includes A, B where a is connected to B in contact with each other, or A, B where a is connected to B in a non-contact manner with other components interposed between the two.
In the embodiments of the present disclosure, the terms "first", "second", and the like are used for distinguishing similar objects, and are not necessarily used for describing a particular order or sequence.
The technical means described in the embodiments of the present disclosure may be arbitrarily combined without conflict.
FIG. 1 is a flow chart illustrating a method of fabricating a memory according to an exemplary embodiment. Referring to fig. 1, the manufacturing method includes the following steps:
s100: forming a passivation layer on a first substrate having a memory cell; the memory cell is positioned on the first surface of the first substrate, the passivation layer is positioned on the second surface of the first substrate, and the second surface of the first substrate is the opposite surface of the first substrate;
s110: forming a first barrier layer with a first dangling bond on the second surface of the first substrate and on the passivation layer;
s120: carrying out heat treatment on the passivation layer at a preset temperature; and hydrogen particles in the passivation layer are released to the first barrier layer and combined with the first dangling bond to form a first covalent bond.
The first substrate is a semiconductor material in which a plurality of memory cells are formed, and is, for example, Silicon On Insulator (SOI), Silicon germanium On Insulator (S-SiGeOI), or the like. The first substrate may include a multilayer structure, for example, may include: an insulating layer of silicon oxide, silicon nitride, or Tetraethylorthosilicate (TEOS) or the like; semiconductor layers of single crystal silicon, polycrystalline silicon, or the like; metal wiring layers, and the like.
The memory cells typically include a layer of polysilicon (Poly-Si) and a layer of silicon dioxide. Since silicon ions have 4 dangling bonds, a part of dangling bonds remain even after the silicon ions are oxidized to form an oxide. Therefore, at the interface of silicon and silicon dioxide, a dangling bond of silicon may exist. The existence of the dangling key can cause short circuit in the memory unit, and the yield and the reliability of the memory are influenced.
Illustratively, dangling bonds in the memory cell may be passivated by bonding hydrogen particles (H) in a free state with dangling bonds in the memory cell to form covalent bonds. Thus, the passivation layer is a material that can release hydrogen particles in a free state for passivating dangling bonds in the memory cell. In general, the passivation layer may include: silicon nitride, phosphosilicate glass, and the like.
For example, taking the composition material of the passivation layer as including silicon nitride as an example, S100 may include: introducing a first reactant containing nitrogen (e.g., ammonia NH) into a chamber in which the first substrate is disposed3) And a second reactant containing elemental silicon (e.g., silane SiH)4) And reacting the first reactant with the second reactant to form a silicon nitride film on the second surface of the first substrate by Chemical Vapor Deposition (CVD).
Since the raw material for forming the silicon nitride film contains a large amount of hydrogen particles, a large amount of hydrogen particles formed by ionization enter the silicon nitride film, and form silicon-hydrogen bonds (Si-H bonds) with the silicon particles and nitrogen-hydrogen bonds (N-H bonds) with the nitrogen particles. Therefore, after the silicon nitride film is formed, it is necessary to perform activation treatment on the hydrogen particles remaining in the silicon nitride film by heat treatment so that the hydrogen particles can be dissociated from the silicon-hydrogen bond and the nitrogen-hydrogen bond with sufficient energy and become hydrogen particles in a free state.
The hydrogen particles in the free state can diffuse from the silicon nitride film to the memory cell and bond with the dangling bonds in the memory cell to form covalent bonds, so that the passivation effect on the memory cell is realized, the number of the dangling bonds in the memory cell is reduced, and the yield and the reliability of the memory are improved.
However, in the actual manufacturing process, the free hydrogen particles may also diffuse into the external environment of the first substrate. And, when the passivation layer is heat treated, the diffusion rate of the hydrogen particles into the external environment is increased. Therefore, under the condition that the quantity of the hydrogen particles released by the passivation layer is kept unchanged, the released hydrogen particles can escape to the external environment, so that the quantity of the hydrogen particles which can be actually used for passivating the memory cell is reduced, some dangling bonds still remain in the memory cell, and the yield and the reliability of the memory are influenced.
In S110, the composition material of the first barrier layer may include any material capable of providing the first dangling bond. Wherein the first dangling bond is a chemical bond that is not in a saturated state. When the outermost layer of a particle in the crystal has at least one electron unpaired to form an electron pair, the particle has a chemical bond that is not in a saturated state, i.e., has a first dangling bond.
The composition material of the first barrier layer may include: silicon nitride; the ratio of silicon particles to nitrogen particles in the first barrier layer is larger than a preset threshold value; or a metal oxide.
When the first blocking layer is made of silicon nitride, the ratio of silicon particles to nitrogen particles in the first blocking layer is greater than a preset threshold value, namely the first blocking layer is a silicon-rich silicon nitride layer. Here, the preset threshold may include 0.75, 1, 1.5, or 2, etc. At this time, the first barrier layer may provide a dangling bond of silicon, i.e., the first dangling bond is a dangling bond of silicon.
When the composition material of the first barrier layer is a metal oxide, the first barrier layer can provide a dangling bond of oxygen, i.e., the first dangling bond is a dangling bond of oxygen.
Illustratively, the metal oxide constituting the first barrier layer may include: alumina (Al)2O3) Erbium oxide (Er)2O3) Yttrium oxide (Y)2O3) Zirconium oxide (ZrO)2) And the like.
According to the embodiment of the disclosure, the first barrier layer with the first dangling bond is formed, on one hand, the first barrier layer with the first dangling bond can be bonded with the hydrogen particles released from the passivation layer to form the first covalent bond, so that the hydrogen particles in the first covalent bond cannot be continuously diffused into the external environment, and the probability of diffusion of the hydrogen particles to the external environment can be reduced by the first barrier layer.
On the other hand, after the hydrogen particles form a first covalent bond with the first dangling bond in the first barrier layer, the hydrogen particles in the first covalent bond occupy positions between the crystal lattices in the first barrier layer, so that gaps between the crystal lattices in the first barrier layer are reduced. Therefore, when other hydrogen particles in a free state need to diffuse into the external environment through the reduced lattice gap in the first barrier layer, the hydrogen particles in the free state need higher diffusion activation energy to continue diffusing from the reduced lattice gap into the external environment. I.e. the first barrier layer, further reduces the probability of diffusion of the hydrogen particles to the environment.
Because the difficulty that the free-state hydrogen particles diffuse from the passivation layer to the external environment through the first barrier layer is increased, compared with the diffusion to the external environment, the hydrogen particles diffusing from the passivation layer to the first barrier layer can be diffused to the storage unit, namely, the first barrier layer increases the probability that the hydrogen particles released from the passivation layer diffuse to the storage unit, thereby being beneficial to improving the passivation effect on the storage unit, improving the yield and reliability of the memory and improving the quality of the memory.
S120 may include: and annealing the passivation layer at a preset temperature.
For example, S120 may include: and heating the passivation layer to a preset temperature range of 300-500 ℃, keeping the passivation layer in the temperature range for 30 minutes, and then cooling and the like.
By carrying out heat treatment on the passivation layer, the hydrogen particles in the passivation layer can be activated, and the hydrogen particles can obtain enough energy to be separated from the silicon-hydrogen bond and the nitrogen-hydrogen bond and become hydrogen particles in a free state. The hydrogen particles in the free state can diffuse into the memory cell, passivating dangling bonds in the memory cell.
In the embodiment of the disclosure, the passivation layer is isolated from the external environment by the barrier layer by forming the first barrier layer with the first dangling bond on the passivation layer. When the passivation layer is subjected to heat treatment, the hydrogen particles released from the passivation layer and the first suspension bond in the first barrier layer are combined to form a first covalent bond, so that the probability of diffusion of the hydrogen particles to the external environment is reduced, the probability of diffusion of the hydrogen particles released from the passivation layer to the storage unit is increased, the passivation effect on the storage unit is favorably improved, the yield and the reliability of the memory are improved, and the quality of the memory is improved.
In some embodiments, S110 may include:
forming a first barrier layer with a first dangling bond on the passivation layer by using a magnetron sputtering method;
alternatively, the first and second electrodes may be,
and forming a first barrier layer with a first dangling bond on the passivation layer by using a plasma enhanced chemical vapor deposition method.
For example, taking the composition material of the first blocking layer as silicon nitride with the ratio of silicon particles to nitrogen particles larger than the predetermined threshold as an example, S110 may include: introducing Plasma to make ammonia (NH) in the reaction cavity where the first substrate is located by using Plasma Enhanced Chemical Vapor Deposition (PECVD)3) With Silane (SiH)4) And activating to form nitrogen particles, hydrogen particles and silicon particles, and adsorbing the activated nitrogen particles and silicon particles on the surface of the passivation layer to perform a chemical reaction to form the first barrier layer.
The plasma enhanced chemical vapor deposition method mainly utilizes glow discharge action to activate particles in reactants, so that the activated particles are subjected to chemical vapor deposition. In the plasma formed by glow discharge, the process of exchanging energy between electrons and ions through collisions is relatively slow, because the masses of the electrons and the ions are very different, so that the temperature of the plasma is not high macroscopically. Therefore, the chemical reaction which is originally required to be carried out at high temperature can be carried out at lower temperature even at normal temperature.
As another example, taking the composition material of the first barrier layer as aluminum oxide as an example, S110 may include: and using aluminum as a target material and oxygen as reaction gas, controlling argon particles to bombard the aluminum target material under the action of an electric field, and reacting the bombarded aluminum particles with oxygen particles and depositing the reaction particles on the surface of a passivation layer to form an aluminum oxide film.
The reaction temperature has a large influence on the performance of the memory. Generally, the response temperature is too high, which may cause memory failure and affect the yield and reliability of the memory.
Compared with the first barrier layer formed by other high-temperature processes, the first barrier layer with the first dangling bond is formed by a plasma enhanced chemical vapor deposition method or a magnetron sputtering method, so that the reaction temperature for forming the first barrier layer with the first dangling bond is reduced on the premise of ensuring that the first barrier layer with the first dangling bond can be normally formed, the yield and the reliability of the memory are favorably ensured, and the cost is reduced.
In some embodiments, the method further comprises:
forming a second barrier layer having a second dangling key on a second substrate having a control unit; the control unit and the second barrier layer are both positioned on the first surface of the second substrate, and the control unit is positioned between the second barrier layer and the first surface of the second substrate;
bonding a second substrate having a second barrier layer with a first substrate having a passivation layer and a first barrier layer;
after the first substrate and the second substrate are bonded, an electric connection is formed between the control unit and the storage unit, and the control unit is used for controlling the storage unit in the first substrate to store data;
s120 may include:
carrying out heat treatment on the bonded first substrate and the bonded second substrate at a preset temperature; wherein the hydrogen particles in the passivation layer are also released to the second barrier layer and bond with the second dangling bonds to form second covalent bonds.
The control unit may include: a switching device composed of a Metal-Oxide-Semiconductor Field-effect transistor (MOSFET).
The second substrate may comprise a semiconductor material with a control unit, for example: silicon, silicon-on-insulator, silicon-germanium-on-insulator, or the like.
The composition material of the second barrier layer may include any material capable of providing a second dangling bond. Wherein the second dangling bond may be similar to the first dangling bond and is a chemical bond that is not in a saturated state.
The composition material of the second barrier layer may include: silicon nitride; the ratio of the silicon particles to the nitrogen particles in the second barrier layer is greater than a preset threshold value; or a metal oxide.
When the second barrier layer is made of silicon nitride, the ratio of silicon particles to nitrogen particles in the second barrier layer is greater than a preset threshold value, that is, the second barrier layer is a silicon-rich silicon nitride layer. At this time, the second barrier layer may provide a dangling bond of silicon, i.e., the second dangling bond is a dangling bond of silicon.
When the composition material of the second barrier layer is a metal oxide, the second barrier layer can provide a dangling bond of oxygen, i.e., the second dangling bond is a dangling bond of oxygen.
Illustratively, the metal oxide constituting the second barrier layer may include: alumina, erbium oxide, yttrium oxide, zirconium oxide, and the like.
When the first substrate and the second substrate after bonding are subjected to a heat treatment, hydrogen particles released from the passivation layer may not only diffuse toward the memory cell but also attempt to diffuse toward the control cell on the second substrate. If hydrogen particles enter the control unit, they can affect the performance of the control unit, affecting the performance of the control unit and causing memory failure.
For example, if hydrogen particles enter the gate oxide layer of the control unit, they will damage the gate oxide layer and degrade the gate performance of the gate oxide layer, resulting in Negative Bias Temperature Instability (NBTI) effect and Hot Carrier (Hot Carrier Injection) effect, affecting the on-current (I) of the control uniton) Closing the current (I)off) And sub-threshold Swing (SS), thereby reducing the switching performance of the fet and affecting the reliability of the fet.
In this embodiment, by forming the second barrier layer with the second dangling bond so that the control unit is located between the second barrier layer and the first surface of the second substrate, on the one hand, the second barrier layer with the second dangling bond can bond with the hydrogen particles released from the passivation layer to form a second covalent bond, so that the hydrogen particles in the second covalent bond cannot continue to diffuse to the control unit. I.e. the second barrier layer, reduces the probability of diffusion of hydrogen particles to the control unit.
On the other hand, after the hydrogen particles form second covalent bonds with the second dangling bonds in the second barrier layer, the hydrogen particles in the second covalent bonds occupy positions between the crystal lattices in the second barrier layer, so that gaps between the crystal lattices in the second barrier layer are reduced. Therefore, when other hydrogen particles in a free state need to be diffused through the reduced lattice gap control unit in the second barrier layer, the hydrogen particles in a free state need a higher diffusion activation energy. I.e. the second barrier layer, further reduces the probability of diffusion of hydrogen particles to the control unit.
Because the difficulty that the free hydrogen particles pass through the second barrier layer to diffuse to the control unit is increased, compared with the diffusion to the control unit, the hydrogen particles diffusing from the passivation layer to the second barrier layer can be further diffused to the storage unit, namely, the second barrier layer increases the probability that the hydrogen particles released from the passivation layer diffuse to the storage unit, thereby being beneficial to improving the passivation effect on the storage unit, improving the yield and the reliability of the memory and improving the quality of the memory.
And the second barrier layer can act together with the first barrier layer to generate a pressure cooker Effect (pressure cooker Effect), so that the concentration of hydrogen particles gathered in the storage unit is increased, the passivation Effect on the storage unit is favorably improved, the yield and the reliability of the memory are improved, and the quality of the memory is improved.
In some embodiments, the forming a second barrier layer having a second dangling key on a second substrate having a control unit includes:
forming a second barrier layer with a second dangling bond on a second substrate by using a magnetron sputtering method;
alternatively, the first and second electrodes may be,
and forming a second barrier layer with a second dangling bond on the second substrate by using a plasma enhanced chemical vapor deposition method.
For example, taking the example that the composition material of the second barrier layer is silicon nitride with the ratio of silicon particles to nitrogen particles larger than the predetermined threshold, the method for forming the second barrier layer may include: and activating ammonia gas and silane in the reaction cavity where the first substrate is located by introducing plasma by using a plasma enhanced chemical vapor deposition method to form nitrogen particles and silicon particles, and adsorbing the activated nitrogen particles and silicon particles on the surface of the control unit to perform chemical reaction to form the second barrier layer.
As another example, taking the composition material of the second barrier layer as aluminum oxide as an example, the method for forming the second barrier layer may include: and using aluminum as a target material and oxygen as reaction gas, controlling argon particles to bombard the aluminum target material under the action of an electric field, and reacting the bombarded aluminum particles with oxygen particles and depositing the reaction particles on the surface of a control unit to form an aluminum oxide film.
Compared with the second barrier layer formed by other high-temperature processes, the second barrier layer with the second dangling bond is formed by a plasma enhanced chemical vapor deposition method or a magnetron sputtering method, so that the reaction temperature for forming the second barrier layer with the second dangling bond is reduced on the premise of ensuring that the second barrier layer with the second dangling bond can be normally formed, the yield and the reliability of the memory are favorably ensured, and the cost is reduced.
In some embodiments, the method further comprises:
forming a conductive layer on a first surface of a second substrate having a control unit; wherein the control unit is positioned between the conductive layer and the first surface of the second substrate;
forming a third barrier layer on the conductive layer; the third barrier layer is used for blocking the conductive layer from diffusing to the first substrate after the first substrate and the second substrate are bonded;
the forming a second barrier layer with a second dangling key on a second substrate with a control unit includes:
forming a second barrier layer with a second dangling bond on the third barrier layer; and the third barrier layer is positioned between the conductive layer and the second barrier layer.
When the first substrate is bonded with the second substrate, the gate, the source and the drain of the field effect transistor on the second substrate can be electrically connected with the memory cell on the first substrate through the conductive layer, so that signals can be transmitted between the first substrate and the second substrate.
The constituent materials of the conductive layer may include: a conductive metal. Such as copper, tungsten, or aluminum, etc.
It will be appreciated that the first substrate is typically formed with a metal line in an insulating layer on the surface of the memory cell, the metal line having one end electrically connected to the memory cell. When the first substrate and the second substrate are bonded, a through hole penetrating through the second barrier layer and the third barrier layer is formed, a conductive column is formed in the through hole, and the conductive column is used for connecting the metal connecting line on the first substrate and the conductive layer on the second substrate, so that the first substrate and the second substrate are electrically connected.
The constituent material of the conductive layer is copper, for example. After the first substrate and the second substrate are bonded, some processes with higher reaction temperature may exist, so that copper diffuses into the insulating layer on the first substrate, and reliability of the memory is affected.
The composition material of the third barrier layer may include: silicon nitride. The method of forming the third barrier layer may include: plasma enhanced chemical vapor deposition, magnetron sputtering, and the like.
In practical application, the thickness of the third barrier layer is smaller than that of the first barrier layer. Therefore, at higher temperatures, the third barrier layer releases a lower amount of hydrogen particles. Usually, a small amount of dangling bonds will also exist in the control unit, and therefore, hydrogen particles released by the third barrier layer can bond with dangling bonds in the control unit, passivate the dangling bonds in the control unit, and have no influence on the performance of the control unit.
Illustratively, the third barrier layer may also block diffusion of hydrogen particles released in the passivation layer towards the control unit. The third barrier layer may also block diffusion of hydrogen particles in the second substrate where the control unit is formed toward the first substrate where the memory unit is formed.
Fig. 2 is a schematic diagram illustrating a memory 100 in accordance with an exemplary embodiment. Referring to fig. 2, the memory 100 includes:
a first substrate 110 having a memory cell 111; wherein, the memory cell 111 is located on a first surface of the first substrate 110;
a first barrier layer 112 on the second surface of the first substrate 110, having a first covalent bond; wherein the second surface of the first substrate is an opposite surface of the first substrate;
a passivation layer 113 between the second surface of the first substrate and the first barrier layer;
wherein the first covalent bond is formed by bonding dangling bonds contained in the first barrier layer before the heat treatment of the passivation layer and hydrogen particles released during the heat treatment of the passivation layer.
The memory 100 may include a three-dimensional memory (3D memory), such as a 3D NAND flash memory.
The first substrate 110 is a semiconductor material formed with a plurality of memory cells, for example, silicon-on-insulator, silicon-germanium-on-insulator, or the like. The first substrate may include a multilayer structure, for example, may include: an insulating layer of silicon oxide, silicon nitride, tetraethyl orthosilicate, or the like; semiconductor layers of single crystal silicon, polycrystalline silicon, or the like; metal wiring layers, and the like.
The composition material of the first barrier layer 112 may include any material capable of providing a first dangling bond. Wherein the first dangling bond is a chemical bond that is not in a saturated state. Illustratively, when a particle in the crystal has at least one electron unpaired to form an electron pair at the outermost layer, the particle has a chemical bond that is not in a saturated state, i.e., has a first dangling bond.
In some embodiments, the materials comprising the first barrier layer 112 include: silicon nitride; wherein, the ratio of the silicon particles to the nitrogen particles in the first barrier layer 112 is greater than a preset threshold;
alternatively, the first and second electrodes may be,
the materials constituting the first barrier layer 112 include: a metal oxide.
When the first blocking layer 112 is made of silicon nitride, the ratio of the silicon particles to the nitrogen particles in the first blocking layer 112 is greater than a predetermined threshold, i.e., the first blocking layer 112 is a silicon-rich silicon nitride layer. Here, the preset threshold may include 0.75, 1, 1.5, or 2, etc. At this time, the first barrier layer 112 may provide a dangling bond of silicon, i.e., the first dangling bond is a dangling bond of silicon.
When the composition material of the first barrier layer 112 is a metal oxide, the first barrier layer 112 may provide a dangling bond of oxygen, i.e., the first dangling bond is a dangling bond of oxygen.
Illustratively, the metal oxides that make up the first barrier layer 112 may include: alumina, erbium oxide, yttrium oxide, zirconium oxide, and the like.
According to the embodiment of the disclosure, the hydrogen particles released by the passivation layer and the first suspension in the first barrier layer form the first covalent bond, so that the hydrogen particles in the first covalent bond cannot continue to diffuse into the external environment.
On the other hand, after the hydrogen particles form a first covalent bond with the first dangling bond in the first barrier layer, the hydrogen particles in the first covalent bond occupy positions between the crystal lattices in the first barrier layer, so that gaps between the crystal lattices in the first barrier layer are reduced. Therefore, the first barrier layer further reduces the probability of diffusion of the hydrogen particles to the external environment.
Because the difficulty that the free hydrogen particles diffuse from the passivation layer to the external environment through the first barrier layer is increased, compared with the diffusion to the external environment, the hydrogen particles diffusing from the passivation layer to the first barrier layer can be transferred to the storage unit for diffusion, the probability that the hydrogen particles released from the passivation layer diffuse to the storage unit is increased, the passivation effect on the storage unit is favorably improved, and the yield and the reliability of the memory are improved.
The passivation layer 113 is a material that can release hydrogen particles in a free state. In general, the passivation layer 113 may include: silicon nitride, phosphosilicate glass, and the like.
In the embodiment of the disclosure, the passivation layer is separated from the external environment by the barrier layer by disposing the first barrier layer having the first covalent bond on the passivation layer. The first barrier layer with the first covalent bond reduces the probability of the diffusion of the hydrogen particles to the external environment, increases the probability of the diffusion of the hydrogen particles released from the passivation layer to the storage unit, is favorable for improving the passivation effect on the storage unit, and improves the yield and the reliability of the memory.
In some embodiments, as shown with reference to FIG. 4, the memory 100 may further include:
a second substrate 120 having a control unit bonded to the first substrate 110 having the passivation layer 113 and the first barrier layer 112; the control unit is located on the first surface of the second substrate 120, and an electrical connection is formed between the control unit and the memory unit 111, and is used for controlling the memory unit in the first substrate to store data;
a second barrier layer 121 located on the first surface of the second substrate, located between the first surface of the first substrate and the control unit, and having a second covalent bond;
wherein the second covalent bond is formed by bonding a second dangling bond contained in the second barrier layer before the first substrate and the second substrate are bonded with hydrogen particles generated in the thermal treatment of the passivation layer.
The control unit may include: a switching device composed of field effect transistors.
The second substrate 120 may include a semiconductor material having a control unit, for example: silicon, silicon-on-insulator, silicon-germanium-on-insulator, or the like.
The composition material of the second barrier layer 121 may include any material capable of providing a second dangling bond. Wherein the second dangling bond may be similar to the first dangling bond and is a chemical bond that is not in a saturated state.
In some embodiments, the material comprising the second barrier layer 121 includes: silicon nitride; the ratio of the silicon particles to the nitrogen particles in the second barrier layer is greater than a preset threshold value;
alternatively, the first and second electrodes may be,
the material constituting the second barrier layer 121 includes: a metal oxide.
When the second blocking layer 121 is made of silicon nitride, the ratio of the silicon particles to the nitrogen particles in the second blocking layer 121 is greater than a predetermined threshold, i.e., the second blocking layer 121 is a silicon-rich silicon nitride layer. Here, the preset threshold may include 0.75, 1, 1.5, or 2, etc. At this time, the second barrier layer may provide a dangling bond of silicon, i.e., the second dangling bond is a dangling bond of silicon.
When the composition material of the second barrier layer 121 is a metal oxide, the second barrier layer 121 may provide a dangling bond of oxygen, i.e., the second dangling bond is a dangling bond of oxygen.
Illustratively, the metal oxides constituting the second barrier layer 121 may include: alumina, erbium oxide, yttrium oxide, zirconium oxide, and the like.
In this embodiment, the second dangling bond in the second barrier layer and the hydrogen particle released from the passivation layer form a second covalent bond, so that, on one hand, the hydrogen particle in the second covalent bond cannot continue to diffuse to the control unit. I.e. the second barrier layer, reduces the probability of diffusion of hydrogen particles to the control unit.
On the other hand, the hydrogen particles in the second covalent bonds occupy positions between the crystal lattices in the second barrier layer, so that gaps between the crystal lattices in the second barrier layer are reduced. Thus, the second barrier layer further reduces the probability of diffusion of hydrogen particles to the control unit.
Because the difficulty that the free hydrogen particles pass through the second barrier layer to diffuse towards the control unit is increased, compared with the diffusion towards the control unit, the hydrogen particles diffusing from the passivation layer to the second barrier layer can be further diffused towards the storage unit, the probability that the hydrogen particles released from the passivation layer diffuse towards the storage unit is increased, the passivation effect on the storage unit is favorably improved, and the yield and the reliability of the memory are improved.
And the second barrier layer can act together with the first barrier layer to generate a pressure cooker effect, so that the concentration of hydrogen particles gathered in the storage unit is increased, the passivation effect on the storage unit is favorably improved, and the yield and the reliability of the memory are improved.
In some embodiments, memory 100 further comprises:
a conductive layer 122 on a first surface of the second substrate;
and a third barrier layer 123 between the conductive layer and the second barrier layer for blocking diffusion of the conductive layer toward the first substrate.
The constituent materials of the conductive layer may include: a conductive metal. Such as copper, tungsten, or aluminum, etc.
The composition material of the third barrier layer 123 may include: silicon nitride, and the like.
In practice, the thickness of the third barrier layer 123 is smaller than the thickness of the first barrier layer 112. Therefore, at higher temperatures, the third barrier layer 123 releases a smaller amount of hydrogen particles. Usually, a small amount of dangling bonds will also exist in the control unit, and therefore, hydrogen particles released by the third barrier layer can bond with dangling bonds in the control unit, passivate the dangling bonds in the control unit, and have no influence on the performance of the control unit.
Illustratively, the third barrier layer 123 may block diffusion of hydrogen particles released from the passivation layer toward the control unit. The third barrier layer 123 may also block the diffusion of hydrogen particles in the second substrate where the control unit is formed toward the first substrate where the memory unit is formed.
In some embodiments, as shown with reference to FIG. 3, memory 100 may comprise:
a first substrate 110 having a memory cell 111; wherein, the memory cell 111 is located on a first surface of the first substrate 110;
a passivation layer 113 on the second surface of the first substrate;
a second substrate 120 having a control unit attached to the first substrate 110 having the passivation layer 113 and the first barrier layer 112; the control unit is located on the first surface of the second substrate 120, and an electrical connection is formed between the control unit and the memory unit 111, and is used for controlling the memory unit in the first substrate to store data;
a second barrier layer 121 located on the first surface of the second substrate, located between the first surface of the first substrate and the control unit, and having a second covalent bond;
wherein the second covalent bond is formed by bonding a second dangling bond contained in the second barrier layer before the first substrate and the second substrate are bonded with hydrogen particles generated in the thermal treatment of the passivation layer.
To facilitate understanding of the technical solutions of the embodiments of the present invention, the following examples are provided.
By bonding a first substrate including a plurality of memory cells and a second substrate having a field effect transistor, a three-dimensional memory, such as a 3D NAND flash memory (flash) of an X-stacking structure, can be formed.
During the fabrication of the memory, a polysilicon channel is formed in the memory cell of the first substrate, and a dangling bond exists at the interface of the polysilicon channel and the silicon dioxide. In order to passivate the dangling bonds, after the first substrate and the second substrate are bonded, hydrogen particles are supplied through a passivation layer prepared by a plasma enhanced chemical vapor deposition method, and the hydrogen particles diffuse from the passivation layer to an array (array) region where the memory cells are located and are bonded with the dangling bonds.
FIG. 5 is a schematic diagram illustrating a memory in accordance with an exemplary embodiment. During the passivation process, the hydrogen particles may also pass through the array region where the memory cell is located, the bonding interface Of the first substrate and the second substrate, the Back End Of the interconnect Line (BEOL) layer Of the second substrate, and the Front End Of the interconnect Line (FEOL) layer Of the second substrate in sequence from the passivation layer. Referring to fig. 5, the third barrier layer 123 may be used to block diffusion of hydrogen particles from the bonding interface into the second substrate, but the blocking effect is very limited.
The present example provides a method for manufacturing a memory, which is used for forming the memory shown in fig. 2, and comprises the following steps:
forming a passivation layer 113 on the first substrate 110 after the first substrate 110 having the memory cell 111 and the second substrate having the control cell are bonded; the memory cell 111 is located on a first surface of the first substrate 110, the passivation layer 113 is located on a second surface of the first substrate 110, and the second surface of the first substrate 110 is an opposite surface of the first substrate 110;
forming a first barrier layer 112 having a first dangling bond on a passivation layer 113 on a second surface of the first substrate 110;
performing heat treatment on the passivation layer 113 at a preset temperature; wherein the hydrogen particles in the passivation layer 113 are released to the first barrier layer 112 and combined with the first dangling bonds to form first covalent bonds.
Therefore, compared with the method of preparing the first barrier layer with the first dangling bond through a common chemical vapor deposition method, the method of forming the first barrier layer with the first dangling bond through the plasma enhanced chemical vapor deposition method or the magnetron sputtering method can reduce the reaction temperature, ensure the reliability of the rear-end interconnection layer, and further ensure the yield and the reliability of the memory.
After the first substrate 110 and the second substrate 120 are bonded, the first barrier layer 112 is formed, so that the hydrogen particles released from the passivation layer can be prevented from diffusing to the external environment, the probability of the hydrogen particles diffusing to the memory cell is increased, the passivation effect on the memory cell is improved, and the yield and the reliability of the memory are further improved.
The present example also provides another method for manufacturing a memory, which is used to form the memory shown in fig. 3, and includes the following steps:
referring to fig. 6a, a third barrier layer 123 is formed on the second substrate 120 having the control unit;
referring to fig. 6b, a second barrier layer 121 having a second dangling bond is formed on the third barrier layer 123;
bonding the second substrate 120 formed with the second barrier layer 121 with the first substrate 110 having the memory cell 111, and forming a passivation layer 113 on a second surface of the first substrate 110;
carrying out heat treatment on the bonded first substrate and the bonded second substrate at a preset temperature; wherein the hydrogen particles in the passivation layer are released to the second barrier layer and bond with the second dangling bonds to form second covalent bonds.
The composition material of the second barrier layer having the second dangling bond may include: silicon-rich (Si-rich) nitride thin films, aluminum oxide, erbium oxide, yttrium oxide, or zirconium oxide, and the like.
Specifically, the silicon-rich nitride film may be formed by a plasma enhanced chemical vapor deposition method. Alternatively, an aluminum oxide, erbium oxide, yttrium oxide, or zirconium oxide film is formed by a magnetron sputtering method.
In practical applications, the reaction temperature of a common chemical vapor deposition may be 700 degrees celsius. The temperature of the plasma enhanced chemical vapor deposition method can be 300 ℃ or 400 ℃, and the reaction temperature of the magnetron sputtering method is normal temperature.
Therefore, compared with the method for preparing the second barrier layer with the second dangling bond through the common chemical vapor deposition method, the method for preparing the second barrier layer with the second dangling bond through the plasma enhanced chemical vapor deposition method or the magnetron sputtering method can reduce the reaction temperature, ensure the reliability of the rear-end interconnection layer, and further ensure the yield and the reliability of the memory.
After the first substrate 110 and the second substrate 120 are bonded, the second barrier layer 121 positioned between the first substrate 110 and the second substrate 120 can prevent the hydrogen particles released from the passivation layer from diffusing to the second substrate having the control unit, thereby improving the reliability of the control unit.
And the second barrier layer is formed after the control unit on the second substrate is formed, so that the process method is simple, the process is easy to control, and the process compatibility with the prior art is strong.
The present example also provides another method for manufacturing a memory, which is used to form the memory shown in fig. 4, and includes the following steps:
forming a third barrier layer 123 on the second substrate 120 having the control unit;
forming a second barrier layer 121 having a second dangling bond on the third barrier layer 123;
bonding the second substrate 120 formed with the second barrier layer 121 with the first substrate 110 having the memory cell 111;
and forming a passivation layer 113 on the second surface of the first substrate 110; the memory cell 111 is located on a first surface of the first substrate 110, the passivation layer 113 is located on a second surface of the first substrate 110, and the second surface of the first substrate 110 is an opposite surface of the first substrate 110;
forming a first barrier layer 112 having a first dangling bond on a passivation layer 113 on a second surface of the first substrate 110;
performing heat treatment on the passivation layer 113 at a preset temperature; wherein the hydrogen particles in the passivation layer 113 are released to the first barrier layer 112 and combined with the first dangling bonds to form first covalent bonds.
Therefore, compared with the method of preparing the first barrier layer with the first dangling bond through a common chemical vapor deposition method, the method of forming the first barrier layer with the first dangling bond through the plasma enhanced chemical vapor deposition method or the magnetron sputtering method can reduce the reaction temperature, ensure the reliability of the rear-end interconnection layer, and further ensure the yield and the reliability of the memory.
After the first substrate 110 and the second substrate 120 are bonded, the first barrier layer 112 is formed, so that the hydrogen particles released from the passivation layer can be prevented from diffusing to the external environment, the probability of the hydrogen particles diffusing to the memory cell is increased, the passivation effect on the memory cell is improved, and the yield and the reliability of the memory are further improved.
By the second barrier layer 121 located between the first substrate 110 and the second substrate 120, diffusion of hydrogen particles released from the passivation layer to the second substrate having the control unit can be blocked, thereby improving reliability of the control unit.
And the second barrier layer is formed after the control unit on the second substrate is formed, so that the process method is simple, the process is easy to control, and the process compatibility with the prior art is strong.
In addition, through the combined action of the first barrier layer 112 and the second barrier layer 121, a pressure-cooker effect is generated, the concentration of hydrogen particles accumulated in the storage unit is increased, the passivation effect on the storage unit is further improved, the yield and the reliability of the memory are improved, and the quality of the memory is improved.
In the embodiments provided in the present disclosure, it should be understood that the disclosed apparatus, system, and method may be implemented in other ways. The above description is only for the specific embodiments of the present disclosure, but the scope of the present disclosure is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present disclosure, and all the changes or substitutions should be covered within the scope of the present disclosure. Therefore, the protection scope of the present disclosure shall be subject to the protection scope of the claims.

Claims (10)

1. A method for manufacturing a memory, comprising:
forming a passivation layer on a first substrate having a memory cell; the memory cell is positioned on a first surface of the first substrate, the passivation layer is positioned on a second surface of the first substrate, and the second surface of the first substrate is an opposite surface of the first substrate;
forming a first barrier layer having a first dangling bond on the passivation layer on the second surface of the first substrate;
carrying out heat treatment on the passivation layer at a preset temperature; wherein hydrogen particles in the passivation layer are released to the first barrier layer and combine with the first dangling bonds to form first covalent bonds.
2. The method of claim 1, wherein forming a first barrier layer having a first dangling bond on the passivation layer on the second surface of the first substrate comprises:
forming the first barrier layer with the first dangling bond on the passivation layer by using a magnetron sputtering method;
alternatively, the first and second electrodes may be,
and forming the first barrier layer with the first dangling bond on the passivation layer by using a plasma enhanced chemical vapor deposition method.
3. The method of claim 1, further comprising:
forming a second barrier layer having a second dangling key on a second substrate having a control unit; wherein the control unit and the second barrier layer are both located on the first surface of the second substrate, and the control unit is located between the second barrier layer and the first surface of the second substrate;
bonding the second substrate with the second barrier layer to the first substrate with the passivation layer and the first barrier layer;
after the first substrate and the second substrate are bonded, an electrical connection is formed between the control unit and the storage unit, and the control unit is used for controlling the storage unit in the first substrate to store data;
the heat treatment of the passivation layer at a preset temperature includes:
performing the heat treatment on the bonded first substrate and the bonded second substrate at the preset temperature; wherein the hydrogen particles in the passivation layer are also released to the second barrier layer and bond with the second dangling bonds to form a second covalent bond.
4. The method of claim 3, wherein forming a second barrier layer having a second dangling key on a second substrate having a control unit comprises:
forming the second barrier layer with the second dangling bond on the second substrate by using a magnetron sputtering method;
alternatively, the first and second electrodes may be,
and forming the second barrier layer with the second dangling bond on the second substrate by using a plasma enhanced chemical vapor deposition method.
5. The method of claim 3, further comprising:
forming a conductive layer on a first surface of the second substrate having the control unit; wherein the control unit is located between the conductive layer and the first surface of the second substrate;
forming a third barrier layer on the conductive layer; the third barrier layer is used for blocking the conductive layer from diffusing to the first substrate after the first substrate and the second substrate are bonded;
the forming a second barrier layer with a second dangling key on a second substrate with a control unit includes:
forming the second barrier layer with the second dangling bond on the third barrier layer; wherein the third barrier layer is located between the conductive layer and the second barrier layer.
6. A memory, comprising:
a first substrate having a memory cell; wherein the memory cell is located on a first surface of the first substrate;
a first barrier layer on the second surface of the first substrate having a first covalent bond; wherein the second surface of the first substrate is an opposite surface of the first substrate;
a passivation layer between the second surface of the first substrate and the first barrier layer;
wherein the first covalent bond is formed by bonding a dangling bond contained in the first barrier layer before the heat treatment of the passivation layer and a hydrogen particle released in the heat treatment of the passivation layer.
7. The memory of claim 6,
the material constituting the first barrier layer includes: silicon nitride; the ratio of silicon particles to nitrogen particles in the first barrier layer is greater than a preset threshold value;
alternatively, the first and second electrodes may be,
the material constituting the first barrier layer includes: a metal oxide.
8. The memory of claim 6, further comprising:
a second substrate having a control unit bonded to the first substrate having the passivation layer and the first barrier layer; the control unit is positioned on the first surface of the second substrate, and an electrical connection is formed between the control unit and the storage unit and is used for controlling the storage unit in the first substrate to store data;
the second barrier layer is positioned on the first surface of the second substrate, positioned between the first surface of the first substrate and the control unit and provided with a second covalent bond;
wherein the second covalent bond is formed by bonding a second dangling bond contained in the second barrier layer and hydrogen particles generated in the thermal treatment of the passivation layer before the first substrate and the second substrate are bonded.
9. The memory of claim 8,
the material constituting the second barrier layer includes: silicon nitride; the ratio of silicon particles to nitrogen particles in the second barrier layer is greater than a preset threshold value;
alternatively, the first and second electrodes may be,
the material constituting the second barrier layer includes: a metal oxide.
10. The memory of claim 8, further comprising:
a conductive layer on the first surface of the second substrate;
and the third barrier layer is positioned between the conductive layer and the second barrier layer and used for blocking the conductive layer from diffusing to the first substrate.
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