CN111103460B - Method for improving accuracy of four-probe RS test - Google Patents
Method for improving accuracy of four-probe RS test Download PDFInfo
- Publication number
- CN111103460B CN111103460B CN201811251334.0A CN201811251334A CN111103460B CN 111103460 B CN111103460 B CN 111103460B CN 201811251334 A CN201811251334 A CN 201811251334A CN 111103460 B CN111103460 B CN 111103460B
- Authority
- CN
- China
- Prior art keywords
- probe
- depth
- test
- silicon wafer
- value
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
- G01R27/02—Measuring real or complex resistance, reactance, impedance, or other two-pole characteristics derived therefrom, e.g. time constant
-
- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/26—Testing of individual semiconductor devices
- G01R31/2601—Apparatus or methods therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
The invention relates to a method for improving the accuracy of a four-probe RS test, which comprises the following steps: step 1: checking the probe status of the four-probe measuring device; step 2: conveying the silicon wafer needing to detect the RS to a slide holder of four-probe measuring equipment; and step 3: adjusting the depth of the probe on the silicon wafer to determine the reference surface of the probe; and 4, step 4: selecting a point on a silicon chip to carry out single-point RS test, and obtaining a plurality of puncture depths of the point and an RS value corresponding to each puncture depth; and 5: drawing a relation curve between the depth of the needle insertion and the RS; step 6: and determining the optimal depth of the needle insertion according to the relation curve. The invention can rapidly and accurately make the four-probe measuring equipment prick the silicon wafer to be measured according to the corresponding relation between the pricking depth and the RS value, can ensure that the stable and accurate RS value is obtained under the pricking depth, truly reflects the operation conditions of equipment such as an ion implanter and the like, improves the utilization rate and the reliability of the ion implanter, and has important significance for the production process.
Description
Technical Field
The invention belongs to the technical field of semiconductor manufacturing, and particularly relates to a method for improving the accuracy of a four-probe RS test.
Background
Ion implantation is a process of introducing controlled amounts of impurities into a silicon substrate to change its electrical properties, and is a physical process, i.e., no chemical reaction occurs. The ion implantation process is performed in an ion implanter, which requires not only the introduction of a uniform, controlled amount of a particular impurity (dose) into the wafer, but also the placement of the impurity at a desired depth (range). The ion implanter is a device used for ion implantation process, is an integration of a plurality of extremely complex and precise subsystems, and determines whether the process quality of the ion implanter is good or not and whether the semiconductor manufacturing process is stable or not. Therefore, there is a need for a metrology tool for testing and evaluating process stability and uniformity of an ion implanter that accurately reflects the operating conditions of the ion implanter.
Currently, a commonly used monitoring method is to measure the square Resistance (RS) of the ion implanted layer of the wafer by using a four-probe tester after the wafer after ion implantation is annealed at a high temperature. The sheet resistance of an ion-implanted layer is an important electrical parameter of a semiconductor material, which is defined as the resistance exhibited by a semiconductor thin layer having a square surface in the direction of current flow parallel to the sides of the square. When the ion implantation dosage is insufficient, the square resistance value is higher; on the contrary, when the dosage is too large, the block resistance value is lower. For a high-energy ion implanter and an ion implanter with a medium or higher current, due to the high implantation energy, doping atoms are implanted to a position deeper than the surface of the wafer, and the concentration of the doping atoms on the surface is low after annealing, so that the conductivity of the ion implanter is easily affected. Therefore, when the same four-probe test equipment is used for measuring injection menus with different energies and silicon wafers with different interface states, the phenomenon that the RS of the wafer cannot be accurately measured can occur, the RS is insensitive to measurement, and finally the wafer measurement result exceeds the specification, so that the state of the ion implanter is misjudged and crashed. This interferes with the normal operation of the ion implanter and further affects the throughput of the machine.
How the probe of the four-probe test equipment can accurately measure the RS of the wafer and how to more accurately monitor the stability and uniformity of the ion implanter, the service life of a measuring machine is prolonged, the phenomenon that capacity is affected due to downtime caused by inaccurate measurement is avoided, and the four-probe test equipment has important significance for maintaining the stability of the existing semiconductor manufacturing process and researching and developing new processes.
Disclosure of Invention
In order to solve the problems, the invention provides a method for improving the accuracy of a four-probe RS test, which can improve the accuracy of the RS test by selecting the optimal puncture depth.
In order to achieve the purpose, the invention provides a method for improving the accuracy of a four-probe RS test, which comprises the following steps:
step 1: checking the probe status of the four-probe measuring device;
step 2: conveying the silicon wafer needing to detect the RS to a slide holder of four-probe measuring equipment;
and step 3: adjusting the depth of the probe on the silicon wafer to determine the reference surface of the probe;
and 4, step 4: selecting a point on a silicon chip to carry out single-point RS test, and obtaining a plurality of puncture depths of the point and an RS value corresponding to each puncture depth;
and 5: drawing a relation curve between the depth of the needle insertion and the RS;
step 6: and determining the optimal depth of the needle insertion according to the relation curve.
In one embodiment, in step 1, the type of the probe is matched to the silicon wafer to be tested.
In one embodiment, in step 3, the probe penetrates into the upper surface of the silicon wafer, and the distance between the probe and the mirror image of the silicon wafer is adjusted to be 1.5 mm.
In one embodiment, after the depth of the probe needle on the silicon wafer is determined, the lower surface of the wafer carrying platform is determined as a reference surface.
In one embodiment, in step 4, the puncturing depth corresponding to the RS value being zero is set as an initial depth, and the slide holder moves upward from the initial depth to change the puncturing depth, and simultaneously records the RS value corresponding to each puncturing depth.
In one embodiment, the RS average is obtained by averaging three consecutive insertions at the same insertion depth.
In one embodiment, the slide stage moves upward a distance of 0.1mm each time.
In an embodiment, in step 6, the puncture depth corresponding to the RS value in the relationship curve when the RS value tends to be stable is the optimal puncture depth.
In one embodiment, the spacing between the four probes is 1 mm.
In one embodiment, the height of the probe is 1 mm.
Compared with the prior art, the invention has the advantages that: 1. the relation between the depth of the puncture needle and the RS value is obtained through experiments, the important influence of the depth of the puncture needle on the RS test is explained, the suggestion that different puncture needle depth parameters are adopted for carrying out the optimal matching aiming at different types of monitoring sheets is provided, and the accuracy and the reliability of the four-probe RS test can be greatly improved; 2. a mathematical analysis method for searching the optimal puncture depth parameter is provided, and the method is simple and popular and has high practicability and popularization value. 3. Through practical verification, the accuracy and the repeatability of testing the high-energy implanter RS are greatly improved by using the puncture depth parameter optimized by the method, and the problems of low accuracy and repeatability of monitoring the high-energy implanter RS are effectively solved.
Drawings
The invention will be described in more detail hereinafter on the basis of embodiments and with reference to the accompanying drawings. Wherein:
FIG. 1 is a schematic diagram of probe depth adjustment for a four-probe measurement apparatus of the present invention;
FIG. 2 is a table showing the correspondence between the depth of the puncturing needle and the RS value in the first silicon wafer and the second silicon wafer according to the present invention;
FIG. 3 is a graph showing the relationship between the depth of the piercing pin and the square resistance of the first silicon wafer according to the present invention;
FIG. 4 is a graph showing the relationship between the depth of the needle and the sheet resistance of the second silicon wafer according to the present invention.
In the drawings like parts are provided with the same reference numerals. The figures are not drawn to scale.
Detailed Description
The invention will be further explained with reference to the drawings. Therefore, the realization process of how to apply the technical means to solve the technical problems and achieve the technical effect can be fully understood and implemented. It should be noted that the technical features mentioned in the embodiments can be combined in any way as long as no conflict exists. It is intended that the invention not be limited to the particular embodiments disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.
The descriptions of "upper", "lower", "above", "below", "upward", etc. mentioned in the embodiments are defined in a general sense, for example, the description is given with reference to the direction of gravity, the direction of gravity is lower, and the opposite direction is upper, which is only for the sake of clarity, but not for limiting the scope of the invention, and the changes or adjustments of the relative relationship thereof should be regarded as the scope of the invention without substantial technical changes, and the descriptions of "first" and "second" in the embodiments are also defined for convenience of description.
The invention provides a method for improving the accuracy of a four-probe RS test, which comprises the following steps:
step 1: checking the probe status of the four-probe measuring device;
step 2: conveying the silicon wafer needing to detect the RS to a slide holder of four-probe measuring equipment;
and step 3: adjusting the depth of the probe on the silicon wafer to determine the reference surface of the probe;
and 4, step 4: selecting a point on a silicon chip to carry out single-point RS test, and obtaining a plurality of puncture depths of the point and an RS value corresponding to each puncture depth;
and 5: drawing a relation curve between the depth of the needle insertion and the RS;
step 6: and determining the optimal depth of the needle insertion according to the relation curve.
In the embodiment, as shown in fig. 1, the four-probe measuring device comprises a probe head 1, a probe 2, a wafer stage 3 and a silicon wafer 4 are arranged below the probe head 1, and the silicon wafer 4 is arranged on the upper surface of the wafer stage 3. In the preparation work of step 1, four probes 2 are inserted into a probe slot (not shown) below the probe head 1, and before the probes 2 are installed, whether the types of the probes 2 are matched with the silicon wafer 4 to be tested or not needs to be confirmed. After the probe 2 is installed, the needle head of the probe 2 is ensured to be clean, and impurities do not need to be left on the surface of the probe 2.
In the preparation work, the probe 2 of the probe 1 is not in contact with the silicon wafer 4, and the silicon wafer 4 is not arranged on the wafer carrying platform 3, and then, as described in step 2, the silicon wafer 4 needing to detect the RS is conveyed to the upper surface of the wafer carrying platform 3 of the four-probe measuring device, so that the preparation work is completed.
After the preparation is completed, the relative position between the probe 2 and the silicon wafer 4 needs to be determined, in this embodiment, as described in step 3, the probe 2 is inserted into the upper surface of the silicon wafer 4, the probe 2 and the stage 3 can be finely adjusted, so that the probe 2 or the stage 3 is finely adjusted and moved, and the distance 5 between the probe 2 and the mirror image 6 (shown as a dotted line in fig. 1) of the silicon wafer 4 is adjusted to be between 1mm and 2mm, preferably, the distance 5 is 1.5 mm. In one embodiment, after the depth of the needle inserting of the probe 2 on the silicon chip 4 is determined, the lower surface of the slide holder 3 is taken as a reference surface. At this point the position of the probe 2 head is not changed.
In the step 4, a single-point RS test is performed, that is, any point on the silicon wafer 4 is selected for testing, before the RS test, an initial depth needs to be set, that is, a pricking depth corresponding to a test RS value of zero is set, where the pricking depth is a distance from a needle head of the probe 2 to a reference surface of the stage 3, and when the needle head of the probe 2 just contacts an upper surface of an impurity injected by an ion implanter in the silicon wafer 4, the RS value is zero. In this example, as shown in fig. 2, RS tests were performed on two silicon wafers 4 (a first silicon wafer and a second silicon wafer), and when RS is 0, the value of the initial set pricking depth was 8.2 mm.
Then, the probe 2 is not moved, the slide holder 3 moves upwards from the initial depth to change the puncture depth of the probe 2, and simultaneously, the corresponding RS value under each puncture depth is recorded. As shown in fig. 2, in the present embodiment, the puncture depth and the corresponding RS value are recorded in a table drawn. It should be noted that, in this embodiment, data is collected by using a dynamic test method for the RS value corresponding to each puncture depth, specifically, when the slide holder 3 moves up to one position, three times of puncturing are continuously performed at the position (that is, at the same puncture depth), the RS values obtained by three times of puncturing are averaged, and the obtained RS average value is recorded and used as the RS value corresponding to the puncture depth.
In addition, dZ in the table of fig. 2 indicates the distance of each upward shift. In one embodiment, the distance of each upward movement of the stage 3 is equal, preferably 0.1 mm. It should be noted that the distance of each upward shift may be changed according to the requirements of practical experiments, and is not used to limit the technical features of the present invention.
According to the data recorded in the table in fig. 2, as shown in fig. 3 and 4, a graph of the relationship between the pricking depth and the RS value of the first silicon wafer and the second silicon wafer is respectively plotted by using a plotting software, wherein fig. 3 is of the first silicon wafer, fig. 4 is of the second silicon wafer, in fig. 3 and 4, the abscissa is dZ, i.e. the distance of each movement is in millimeters, wherein the pricking depth corresponding to the zero point of the abscissa is the initial depth (i.e. 8.2mm), and as the coordinate moves to the right, the distance of the upward movement of the slide holder 3 increases, and the pricking depth also becomes deeper, so the distance between the needle head of the probe 2 and the reference surface also becomes smaller; the ordinate is the RS value in Ω/port.
In an embodiment, in the step 6, the relation graph of fig. 3 and 4 is analyzed, and as can be seen from fig. 3 and 4, when the slide holder 3 moves to a certain distance, the RS value begins to become flat and stable, and the acupuncture depth corresponding to the RS value in the relation graph which becomes stable is the optimal acupuncture depth. The puncture depth corresponding to the turning point when the RS value is changed from descending or ascending to flat and slow is the optimal puncture depth, and the puncture depth from which the puncture depth is greater than the puncture depth can be used as the puncture depth of the four-probe RS test; however, the deeper the pricking depth is, the greater the damage to the probe 2 is, and the turning point of which the curve tends to be balanced is taken as the pricking depth, so that the accuracy requirement of the four-probe RS test can be met, the needle head can be protected from being damaged to the greatest extent, and the service life is prolonged.
In another embodiment, the data analysis statistics may be centralized in a four-probe test apparatus to automatically calculate the optimal needle insertion depth parameter. This technical scheme belongs to the prior art, and is not described herein again.
In one embodiment, Jandel probes 2 are used in the present invention, and the spacing between the four probes 2 is 1 mm. In one embodiment, the height of the probe 2 is 1 mm. Of course, the probe 2 brand and the height of the probe 2 can be changed and modified according to the actual test requirements, for example, the probe 2 height is 2mm, and is not limited herein.
Compared with the prior art, the invention does not need to debug the four-probe measuring equipment purposelessly when different types of silicon chips are replaced. The invention can accurately find the injection menus with different energies and the optimal needling depth corresponding to the silicon wafers with different cross-sectional states according to the corresponding relation between the needling depth and the RS value, can quickly and accurately cause the four-probe measuring equipment to perform needling on the silicon wafer to be detected, can ensure that the stable and accurate RS value is obtained under the needling depth, truly reflects the operation conditions of equipment such as an ion implanter and the like, improves the utilization rate and the reliability of the ion implanter, and has important significance on the production process.
While the present invention has been described with reference to the preferred embodiments as above, the description is only for the convenience of understanding the present invention and is not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (8)
1. A method for improving the accuracy of a four-probe RS test is characterized by comprising the following steps:
step 1: checking the probe status of the four-probe measuring device;
step 2: conveying the silicon wafer needing to detect the RS to a slide holder of four-probe measuring equipment;
and step 3: adjusting the depth of the probe on the silicon wafer to determine the reference surface of the probe;
and 4, step 4: selecting a point on a silicon chip to carry out single-point RS test, and obtaining a plurality of puncture depths of the point and an RS value corresponding to each puncture depth;
and 5: drawing a relation curve between the depth of the needle insertion and the RS;
step 6: and determining the optimal puncture depth according to the relation curve, and taking the puncture depth corresponding to the RS value in the relation curve when the RS value tends to be stable as the optimal puncture depth so as to meet the accuracy requirement of the four-probe RS test.
2. The method for improving the accuracy of the four-probe RS test according to claim 1, wherein in step 1, the type of the probe is matched with the silicon wafer to be tested.
3. The method for improving the accuracy of the RS test of four probes as claimed in claim 1, wherein in step 3, the probes are inserted into the upper surface of the silicon wafer, and the distance between the probes and the mirror image of the silicon wafer is adjusted to be 1.5 mm.
4. The method according to claim 3, wherein the lower surface of the stage is determined as a reference surface after the depth of the probe needle on the silicon wafer is determined.
5. The method according to claim 1, wherein in step 4, the puncturing depth corresponding to the RS value being zero is set as the initial depth, and the slide holder moves upward from the initial depth to change the puncturing depth, and the RS value corresponding to each puncturing depth is recorded.
6. The method for improving the accuracy of the four-probe RS test of claim 5, wherein the RS average value is obtained by averaging three consecutive insertions at the same insertion depth.
7. The method for improving the accuracy of a four-probe RS test according to claim 5, wherein the distance of each upward movement of the stage is 0.1 mm.
8. The method for improving the accuracy of a four-probe RS test of any one of claims 1-7, wherein the height of the probe is 1 mm.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811251334.0A CN111103460B (en) | 2018-10-25 | 2018-10-25 | Method for improving accuracy of four-probe RS test |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811251334.0A CN111103460B (en) | 2018-10-25 | 2018-10-25 | Method for improving accuracy of four-probe RS test |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111103460A CN111103460A (en) | 2020-05-05 |
| CN111103460B true CN111103460B (en) | 2021-03-16 |
Family
ID=70418044
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201811251334.0A Active CN111103460B (en) | 2018-10-25 | 2018-10-25 | Method for improving accuracy of four-probe RS test |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111103460B (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN116165070B (en) * | 2023-04-21 | 2023-08-04 | 长鑫存储技术有限公司 | Method and device for detecting Young's modulus of film |
Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101246809A (en) * | 2007-02-13 | 2008-08-20 | 中芯国际集成电路制造(上海)有限公司 | Monitoring coupon and monitoring method for ion implantation technique |
| US7419609B2 (en) * | 2006-11-13 | 2008-09-02 | Texas Instruments Incorporated | Method for quantifying over-etch of a conductive feature |
| CN101364553A (en) * | 2007-08-09 | 2009-02-11 | 中芯国际集成电路制造(上海)有限公司 | Method and construction enhancing measurement accuracy of LDD doping layer square resistor |
| CN102200552A (en) * | 2010-11-17 | 2011-09-28 | 浙江正泰太阳能科技有限公司 | Method and equipment for testing square resistor of silicon sheet |
| CN103439643A (en) * | 2013-08-02 | 2013-12-11 | 上海华力微电子有限公司 | Intelligent test system and test method for improving probe card test abnormality |
| CN203630226U (en) * | 2013-11-07 | 2014-06-04 | 中节能太阳能科技（镇江）有限公司 | Device for automatically testing crystal silicon battery diffusion sheet resistance |
| CN103904009A (en) * | 2014-04-22 | 2014-07-02 | 上海华力微电子有限公司 | Method for monitoring stability and uniformity of ion implanter |
| CN105182081A (en) * | 2015-09-29 | 2015-12-23 | 中国科学院上海硅酸盐研究所 | Method for testing square resistance of sheet material |
| CN106898546A (en) * | 2017-03-13 | 2017-06-27 | 上海华力微电子有限公司 | A kind of method of monitoring Ge ion implanting quality |
| CN107391849A (en) * | 2017-07-25 | 2017-11-24 | 上海华力微电子有限公司 | Resistance model for prediction and its modification method |
-
2018
- 2018-10-25 CN CN201811251334.0A patent/CN111103460B/en active Active
Patent Citations (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7419609B2 (en) * | 2006-11-13 | 2008-09-02 | Texas Instruments Incorporated | Method for quantifying over-etch of a conductive feature |
| CN101246809A (en) * | 2007-02-13 | 2008-08-20 | 中芯国际集成电路制造(上海)有限公司 | Monitoring coupon and monitoring method for ion implantation technique |
| CN101364553A (en) * | 2007-08-09 | 2009-02-11 | 中芯国际集成电路制造(上海)有限公司 | Method and construction enhancing measurement accuracy of LDD doping layer square resistor |
| CN102200552A (en) * | 2010-11-17 | 2011-09-28 | 浙江正泰太阳能科技有限公司 | Method and equipment for testing square resistor of silicon sheet |
| CN103439643A (en) * | 2013-08-02 | 2013-12-11 | 上海华力微电子有限公司 | Intelligent test system and test method for improving probe card test abnormality |
| CN203630226U (en) * | 2013-11-07 | 2014-06-04 | 中节能太阳能科技（镇江）有限公司 | Device for automatically testing crystal silicon battery diffusion sheet resistance |
| CN103904009A (en) * | 2014-04-22 | 2014-07-02 | 上海华力微电子有限公司 | Method for monitoring stability and uniformity of ion implanter |
| CN105182081A (en) * | 2015-09-29 | 2015-12-23 | 中国科学院上海硅酸盐研究所 | Method for testing square resistance of sheet material |
| CN106898546A (en) * | 2017-03-13 | 2017-06-27 | 上海华力微电子有限公司 | A kind of method of monitoring Ge ion implanting quality |
| CN107391849A (en) * | 2017-07-25 | 2017-11-24 | 上海华力微电子有限公司 | Resistance model for prediction and its modification method |
Non-Patent Citations (2)
| Title |
|---|
| Influence of amorphization depth on sheet resistance in shallow junction formation with B cluster implantation;Yoji Kawasaki 等;《2009 International Workshop on Junction Technology》;20090612;全文 * |
| ITO薄膜方块电阻测试方法的探讨;关自强;《真空》;20140525;第51卷(第3期);全文 * |
Also Published As
| Publication number | Publication date |
|---|---|
| CN111103460A (en) | 2020-05-05 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN110137112B (en) | Method for monitoring temperature control performance of annealing equipment | |
| US3676775A (en) | Method for measuring resistivity | |
| CN101246809B (en) | Monitoring coupon and monitoring method for ion implantation technique | |
| CN203133171U (en) | Testing device for testing wafer of electronic circuit | |
| CN111103460B (en) | Method for improving accuracy of four-probe RS test | |
| CN110416044A (en) | Ion implanting corner monitoring method and ion implantation apparatus | |
| CN112735967A (en) | Testing method for wafer temperature change test | |
| US20110320144A1 (en) | Method for sheet resistance and leakage current density measurements on shallow semiconductor implants | |
| CN112838020B (en) | Monitoring method for back metallization process | |
| CN103904009B (en) | A kind of monitoring ion implanter stability and the method for uniformity | |
| CN103489806A (en) | Method for monitoring ion damage on line | |
| US20100050939A1 (en) | Method for determining the performance of implanting apparatus | |
| CN108982178A (en) | A kind of preparation method of galvanized steel plain sheet standard sample | |
| US7474114B2 (en) | System and method for characterizing silicon wafers | |
| CN112687564B (en) | Method and device for calculating activation rate of doped semiconductor and electronic equipment | |
| Ishida et al. | Study of electrical measurement techniques for ultra‐shallow dopant profiling | |
| CN103887204B (en) | Silicon wafer quality factor eliminating method related to problems of laser annealing process | |
| CN212159856U (en) | Novel die for testing silicon wafer | |
| CN113049881A (en) | Extension resistance tester for epitaxial layer of integrated circuit | |
| CN112816365A (en) | Evaluation method for wettability and wetting time of electrolyte to pole piece | |
| CN214750564U (en) | Extension resistance tester for epitaxial layer of integrated circuit | |
| CN104022051A (en) | Method for detecting abnormity of mechanical arm of detector | |
| CN118112325B (en) | Self-optimizing device and self-optimizing method for four-probe resistance meter | |
| CN117542759B (en) | Square resistance measuring device and measuring method | |
| CN103630816B (en) | doping failure analysis method |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20200924 Address after: 412001 Room 309, floor 3, semiconductor third line office building, Tianxin hi tech park, Shifeng District, Zhuzhou City, Hunan Province Applicant after: Zhuzhou CRRC times Semiconductor Co.,Ltd. Address before: The age of 412001 in Hunan Province, Zhuzhou Shifeng District Road No. 169 Applicant before: ZHUZHOU CRRC TIMES ELECTRIC Co.,Ltd. |
|
| GR01 | Patent grant | ||
| GR01 | Patent grant |