CN214750564U - Extension resistance tester for epitaxial layer of integrated circuit - Google Patents
Extension resistance tester for epitaxial layer of integrated circuit Download PDFInfo
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- CN214750564U CN214750564U CN202120718167.7U CN202120718167U CN214750564U CN 214750564 U CN214750564 U CN 214750564U CN 202120718167 U CN202120718167 U CN 202120718167U CN 214750564 U CN214750564 U CN 214750564U
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Abstract
The utility model discloses an integrated circuit epitaxial layer extension resistance tester, which belongs to the semiconductor field, and comprises a base, be provided with the air supporting shock attenuation platform on the base, be provided with product regulation platform and probe regulation platform on the air supporting shock attenuation platform, be provided with the sample measurement platform on the product regulation platform, be provided with the probe on the probe regulation platform, the product regulation platform includes on first horizontal slip table and the second horizontal slip table, first horizontal slip table makes the sample measurement platform move along the x direction, the second horizontal slip table makes the sample measurement platform move along the y direction, the probe regulation platform includes the vertical slip table, the vertical slip table makes two probes move along the z direction; the probe is connected with a measuring circuit, and the measuring circuit comprises a voltage source and an ammeter. The utility model discloses with low costs, the measuring accuracy is high, and the test data uniformity is good.
Description
Technical Field
The utility model relates to a semiconductor field especially indicates an integrated circuit epitaxial layer extension resistance tester.
Background
The epitaxial process is one of the most important processes in the manufacturing process of integrated circuit chips, and the epitaxial process is a process of growing a new single crystal layer meeting requirements on a single crystal substrate with a finely processed surface under certain conditions. The thickness of the epitaxial layer is 2-20 μm, and the quality of the epitaxial layer directly affects the performance yield and reliability of the device.
The parameters for evaluating the quality of the epitaxial layer mainly include: the resistivity and the uniformity, the surface defects, the thickness and the thickness uniformity and the like, wherein the resistivity and the uniformity have obvious influence on the performance of an integrated circuit, are one of important characteristic parameters of an epitaxial wafer, are also one of main parameters for judging the doping concentration of an epitaxial material, and directly influence the isolation characteristic, the breakdown voltage, the reverse leakage current, the beta value of a triode and the like of a device. Integrated circuit development and production units therefore place particular emphasis on the measurement of the resistivity of epitaxial layers.
The conventional methods for measuring the resistivity of the epitaxial layer comprise a four-probe method, a three-probe method, a C-V method (differential capacitance-voltage method) and an extended resistance method.
The three-probe method is a conventional measurement method, which measures resistivity by measuring breakdown voltage of a schottky junction formed between the surface of an epitaxial layer and a probe, and thus probe pressure, probe tip state, epitaxial layer thickness, longitudinal distribution of resistivity, surface state, and the like have a great influence on measurement results. Once the surface leakage current is large or the epitaxial layer thickness is smaller than the depletion layer width, the measurement result cannot be obtained, even if the breakdown voltage value is measured, the breakdown voltage value is also the epitaxial layer punch-through voltage value, and the resistivity value of the epitaxial layer cannot be obtained, so the reliability of the measurement result is poor.
The four-probe method is widely used for measuring the epitaxial wafer with the P-N junction structure due to high measurement precision and easy sample preparation. The measurement error is influenced by the probe pressure, the curvature radius of the needle point, the instrument constant current source and the like, and also comprises 1) the influence of the measurement error of the thickness of the epitaxial layer. Because the resistivity of the epitaxial layer is represented by the formula rho ═ R□X t (where ρ is the epitaxial layer resistivity value, R)□The square resistance of the epitaxial layer, t is the thickness of the epitaxial layer), so that the measurement error is R□The measurement error is the composite of the measurement error and the t measurement error, and the measurement error of the t value is generally about 10%. 2) Epitaxial layer electricInfluence of longitudinal distribution of resistivity. Since the four-probe measured epitaxial layer resistivity values are the average of the epitaxial layers, the same sheet resistance values can yield different results.
The capacitance-voltage (C-V) method is influenced by factors such as probe area, degree of wetting of mercury with the silicon surface, and the like, and also has the following factors: 1) the influence of system stray capacitance. The stray capacitance of some advanced instruments and systems has now been reduced to around 1.2pF, which has an increasing effect on the results with increasing applied bias. An epitaxial layer with a flat longitudinal resistivity profile may exhibit a slope due to stray capacitance, resulting in a deviation of the results. 2) Due to the influence of the value points, the resistivity values of different value parts are different because a longitudinal resistivity distribution curve is obtained by capacitance-voltage method measurement. The difference is more pronounced especially when the longitudinal resistivity gradient is large. 3) The influence of the surface state. Surface contamination and micro defects of the silicon epitaxial wafer can cause the carrier concentration of a depletion layer of the Schottky junction to change, so that the change of a longitudinal resistivity distribution curve of the epitaxial layer is influenced, and the deviation of a measurement result is caused.
The method for measuring the extension resistance eliminates the influence of the curvature radius of a probe and the like on a test result, so that the error of the instrument can be controlled within 5 percent, and the thickness value of the epitaxial layer can be obtained while the longitudinal distribution of the resistivity is measured, so that the resistivity and the carrier concentration of the epitaxial layer of the silicon wafer are accurately measured.
Extension resistance definition: the ratio of the voltage drop between the metal probe and a reference point on the semiconductor to the current flowing through the probe is called the spreading resistance.
The spreading resistance method is a test technique for obtaining resistance, resistivity, and carrier concentration (impurity doping concentration) and distribution thereof by measuring the spreading resistance value of each point of a semiconductor material or device surface in minute steps along the surface of a sample using a special point contact probe.
The method for measuring the micro-area resistivity by using the spreading resistance method comprises the steps of stepping along the surface of a sample by a special point contact probe at a tiny distance, measuring the spreading resistance value of each point on the surface of the sample by using a point contact voltage and current curve of a metal probe and a semiconductor material to be measured, and converting the spreading resistance value into a resistivity value by formula calculation.
The probe that the extension resistance adopted has single probe, two probes and three probe three kinds of forms, and extension resistance tester all adopts two probes at present. The measurement principle of the structure of the two probes is as follows: applying a certain voltage V between two probes, measuring the electricity I passing through the probes, thus obtaining the spreading resistance Rs. A schematic diagram of the spreading resistance measurement is shown in fig. 1.
Before measurement, a sample to be measured is ground into an inclined plane with a certain inclination angle, the two probes move on the inclined plane of the sample wafer according to a certain distance (delta x), and the resistance between the two probes is tested once every time the two probes move by one step. The depth Δ z corresponding to each Δ x is Δ x sin α, where α is the bevel angle. By measuring the extension resistance value on the inclined plane and calculating by a formula, the resistivity values of different depths in the vertical direction can be obtained. Therefore, the expanded resistance method can be used for measuring through the multilayer structure and has a wider measuring range. In order to reduce the influence of contact resistance, the voltage applied between the two probes is generally (5-10) mV, and the distance between the two probes is generally (40-100) μm.
Spreading resistor RsAnd resistivity rhosThe relation of (2) is formula (1), and the resistivity value of the inclined plane can be obtained by measuring the extension resistance value of the inclined plane, so that the resistivity of the tested sample in the vertical direction can be obtained, and the distribution of the longitudinal resistivity of the sample can be obtained.
In the formula (1), the first and second groups,
ρs-resistivity in ohm centimeters (Ω cm);
a-effective contact radius of the probe in centimeters (cm);
Rs-spreading resistance in ohms (Ω).
The existing integrated circuit epitaxial layer extension resistance tester is expensive, has low measurement accuracy and low test data consistency, and cannot meet the requirements.
SUMMERY OF THE UTILITY MODEL
The utility model provides an integrated circuit epitaxial layer extension resistance tester, the utility model discloses with low costs, the measuring accuracy is high, and the test data uniformity is good.
In order to solve the technical problem, the utility model provides a technical scheme as follows:
an integrated circuit epitaxial layer extension resistance tester comprises a base, wherein an air-flotation damping table is arranged on the base, a product adjusting table and a probe adjusting table are arranged on the air-flotation damping table, a sample measuring table is arranged on the product adjusting table, probes are arranged on the probe adjusting table, the product adjusting table comprises a first horizontal sliding table and a second horizontal sliding table, the first horizontal sliding table enables the sample measuring table to move along the x direction, the second horizontal sliding table enables the sample measuring table to move along the y direction, the probe adjusting table comprises a vertical sliding table, and the vertical sliding table enables the two probes to move along the z direction; the probe is connected with a measuring circuit, and the measuring circuit comprises a voltage source and an ammeter.
Furthermore, the sample measuring table comprises a damping table, a digital display electronic scale is arranged above the damping table, a sample bearing disc is arranged above the digital display electronic scale, a plurality of adsorption holes are formed in the sample bearing disc, and a microscope is arranged on the damping table.
Furthermore, an insulating substrate is arranged below the sample bearing disc, a vacuum adsorption disc is arranged in the middle of the insulating substrate, and a horizontal adjusting device is arranged below the vacuum adsorption disc.
Furthermore, the diameter of the sample wafer bearing disc is more than 100mm, the thickness of the sample wafer bearing disc is 20mm, the flatness of the sample wafer bearing disc is less than 3 mu m, the insulation resistivity of the sample wafer bearing disc is more than 1G omega, and the diameter of the adsorption hole is 0.1 mm.
Furthermore, 5 circular scale grooves are formed in the sample bearing disc, the diameters of the circular scale grooves are respectively 50.8mm, 76.2mm, 100mm, 125mm and 150mm, the diameter of the insulating substrate is 200mm, and the thickness of the insulating substrate is 20 mm.
Furthermore, the number of the horizontal adjusting devices is three, the horizontal adjusting devices are uniformly distributed along the circumferential direction, and each horizontal adjusting device comprises an upper external thread sleeve and a lower internal thread sleeve.
Further, the vacuum adsorption disc is connected with an adsorption system, the adsorption system comprises an adsorption cover and a negative pressure controller, a negative pressure meter is arranged on a pipeline between the adsorption cover and the negative pressure controller, the negative pressure controller comprises a normally closed electromagnetic pressure release valve and an adjustable negative pressure pump, and the normally closed electromagnetic pressure release valve is controlled through a relay switch system.
Further, the probe is arranged on the probe support, and the vertical sliding table is arranged between the probe and the probe support.
Furthermore, the stroke of the first horizontal sliding table and the stroke of the second horizontal sliding table are larger than 100mm, the error is +/-3 mu m, the stroke of the vertical sliding table is larger than 10mm, and the error is +/-3 mu m;
the needle points of the probes are made of wear-resistant conductive materials, the curvature radius of the needle points is not more than 25 mu m, the needle distance between the two probes is 40-100 mu m, and the direct-current insulation resistance between the two probes and the direct-current insulation resistance between the probes and the probe support are more than 1G omega.
Furthermore, the measuring range of the ammeter is 1 nA-20 mA, the error is +/-0.1%, the voltage range of the voltage source is 1 mV-100 mV, and the error is +/-0.4%.
The utility model discloses following beneficial effect has:
the utility model discloses an integrated circuit epitaxial layer extension resistance tester is with low costs, and the measuring accuracy is high, and the test data uniformity is good.
Drawings
FIG. 1 is a schematic diagram of the extended resistance measurement principle;
FIG. 2 is a schematic diagram of a constant voltage method circuit;
FIG. 3 is a schematic diagram of a constant current method circuit;
FIG. 4 is a circuit schematic of a logarithmic comparison method;
fig. 5 is a schematic structural diagram of the integrated circuit extended resistance tester of the present invention;
FIG. 6 is a schematic diagram of the structure of the product conditioning stage and the sample measuring stage;
FIG. 7 is a schematic view of the structure of the sample measuring station;
FIG. 8 is a schematic structural view of a sample support plate;
FIG. 9 is a schematic view of the structure of the leveling device;
FIG. 10 is a schematic diagram of the structure of a probe and a probe holder;
FIG. 11 is a schematic diagram of an adsorption system.
Detailed Description
In order to make the technical problems, technical solutions and advantages to be solved by the present invention clearer, the following detailed description will be given with reference to the accompanying drawings and specific embodiments.
The utility model provides an integrated circuit epitaxial layer extension resistance tester, as shown in fig. 2-11, including base 1, be provided with air supporting shock attenuation platform 2 and control panel 15 on the base 1, be provided with product regulation platform 3 and probe regulation platform 4 on the air supporting shock attenuation platform 2, be provided with sample measurement platform 5 on the product regulation platform 3, be provided with probe 6 on the probe regulation platform 4, product regulation platform 3 includes on first horizontal slip table 7 and the second horizontal slip table 8, first horizontal slip table 7 makes sample measurement platform move along the x direction, second horizontal slip table 8 makes sample measurement platform move along the y direction, probe regulation platform 4 includes vertical slip table 9, vertical slip table 9 makes two probe 6 move along the z direction; the probe 6 is connected with a measuring circuit which comprises a voltage source and an ammeter.
The utility model discloses a two probe methods measure the extension resistance. The two probes can adopt three methods of a constant voltage method, a constant current method and a logarithmic comparator method for measuring the extension resistance, circuit diagrams are respectively shown in fig. 2, fig. 3 and fig. 4, and specific calculation formulas are respectively shown in formula (2), formula (3) and formula (4).
(1) Constant pressure method
RS＝V/I (2)
In the formula (2), the reaction mixture is,
v-applied voltage in millivolts (mV);
I-Current measured by an ammeter in milliamperes (mA).
The schematic diagram of the constant voltage method circuit is shown in fig. 2.
(2) Constant current method
RS＝V/I (3)
In the formula (3), the reaction mixture is,
V-Voltage measured by a voltmeter in millivolts (mV);
i-applied current in milliamperes (mA).
A schematic diagram of a constant current method circuit is shown in fig. 3.
(3) Logarithmic comparator method
In the formula (4), the reaction mixture is,
R0-precision resistance value in ohms (Ω);
A circuit schematic of the logarithmic comparison method is shown in fig. 4.
According to the discussion of the literature and the results of the test, the damage of the needle tip to the silicon wafer during measurement is compared, and in the three methods, the constant-current pressure measurement is obviously larger than the constant-voltage pressure measurement. In addition, the repeatability detection of the same batch of samples shows that the constant-voltage flow measurement method has good data consistency when measuring low-resistance and high-resistance materials, and the constant-current pressure measurement method gradually deteriorates the repeatability along with the increase of the resistivity of the sample wafer. The repeatability measured values of the constant current and the constant voltage are consistent when the voltage is low and the repeatability measured value of the constant current and the constant voltage is one fourth of that of the constant voltage and the current when the voltage is high, so that the measurement of the constant voltage is more accurate. So the utility model discloses select the constant voltage method for use to realize integrated circuit extension resistance tester.
The utility model discloses an integrated circuit epitaxial layer extension resistance tester is with low costs, and the measuring accuracy is high, and the test data uniformity is good.
The utility model discloses in, sample measuring station 5 includes shaking table 10, and shaking table 10 top is provided with digital display electronic scale 11, and digital display electronic scale 11 top is provided with sample and holds piece dish 12, has seted up a plurality of absorption holes 13 on the sample holds piece dish 12, and the absorption hole is located the sample and holds in the middle of the piece, is provided with microscope 14 on shaking table 10.
An insulating substrate 16 is arranged below the sample bearing disc 12, a vacuum adsorption disc 17 is arranged in the middle of the insulating substrate 16, and a horizontal adjusting device 18 is arranged below the vacuum adsorption disc 17.
The lower surface of the sample bearing plate is provided with a mounting groove of a vacuum adsorption plate and a fixing screw hole thereof, and the side surface of the sample bearing plate is also provided with a mounting jack of a temperature sensor.
The sample wafer bearing disc 12 is made of aluminum alloy, the diameter is larger than 100mm, the thickness is 20mm, the flatness is smaller than 3 mu m, and the insulation resistivity is larger than 1G omega.
The specific number and diameter of the adsorption holes can be determined according to experimental specific data, and in one example, the diameter of the adsorption holes 13 is 0.1 mm.
The sample bearing disc 12 is provided with 5 circular scale grooves 19, the diameters of the circular scale grooves are respectively 50.8mm, 76.2mm, 100mm, 125mm and 150mm, and the sample to be measured can be conveniently placed for alignment.
The insulating substrate is made of a material with high insulating degree, the diameter of the insulating substrate is about 200mm, and the thickness of the insulating substrate is about 20 mm. The insulating substrate mainly plays a role in shielding the electric interference of the sliding table, the chassis and other parts to the bottom electrode of the sample wafer bearing plate. The accuracy of the measuring result is ensured. The circular groove part in the middle of the insulating substrate is provided with a vacuum adsorption disc, a vacuum adsorption air pipe, an electrode wire and the like for leading out, and the function of leading the electric wire and the air pipe is mainly played.
The number of the horizontal adjusting devices 18 is three, and the horizontal adjusting devices 18 are uniformly distributed along the circumferential direction, and each horizontal adjusting device 18 comprises an upper external thread sleeve 20 and a lower internal thread sleeve 21.
The horizontal adjusting device can be used for horizontal adjustment and connection operation, a plane is determined by three points, the heights of the three horizontal adjusting devices are respectively adjusted by uniformly distributing the three horizontal adjusting devices in the same circumference of 120 degrees, and when a certain degree is reached, a part fixed on the horizontal adjusting device can be parallel to the lower surface of the probe. The level adjustment device may also act as a height limiter to limit the maximum height.
The vacuum adsorption disc 17 is connected with an adsorption system, the adsorption system comprises an adsorption cover 22 and a negative pressure controller 23, a negative pressure meter 24 is arranged on a pipeline between the adsorption cover 22 and the negative pressure controller 23, the negative pressure controller 23 comprises a normally closed electromagnetic pressure release valve 25 and an adjustable negative pressure pump 26, and the normally closed electromagnetic pressure release valve 25 is controlled by a relay switch system 27.
The vacuum degree of the whole adsorption system is less than 100mbar, the vacuum degree can be adjusted, the adsorption uniformity of the adsorption area on the SiC wafer is better than 1%, and the fragmentation of the measurement wafer can be fully avoided. Wherein:
the negative pressure controller comprises a negative pressure pump, a control circuit, an electromagnetic valve, a control switch, a silencer, a negative pressure meter and the like, the controllable adjustment of the negative pressure vacuum degree is realized, and the noise and the vibration are reduced.
The probe 6 is arranged on a probe holder 28 and the vertical slide 9 is arranged between the probe holder 28 and the probe 7.
When the extension resistance is measured, a sample to be measured is placed on the sample measuring table, a probe of the probe is fixed on the probe support and automatically moves to a position to be measured under the control of the motion control system. The probe holder serves to support the probe such that the probe tip is lowered to the sample surface at the same repetition rate and predetermined pressure, and the position of the contact point of the probe can be adjusted.
The first horizontal sliding table and the second horizontal sliding table are integrally an XY-direction integral movement measuring platform, and the control platform moves in the horizontal direction; the vertical sliding table is a Z-axis liftable probe platform and controls the probe to move in the vertical direction.
During measurement, the sample measuring table moves horizontally, the probe moves vertically, a sample to be measured is placed on the sample measuring table, and the sample measuring table is placed on an XY direction sliding table driven by a motor.
Since the spreading resistance technique is a technique for measuring the total contact resistance of a metal-semiconductor contact, any change in the contact parameters, particularly the contact area, affects the repeatability and reliability of the measurement. Factors that must be tightly controlled in the spreading resistor device are the radius of the point contact, the surface condition in which the point contact is located, the impact speed and the contact location when the point contact load is in contact with the surface. Therefore, the motion control system ensures that the probe can contact the surface of the sample with constant pressure, constant impact speed and minimum slippage, so that the contact area is stable, the contact radius is kept unchanged as much as possible, and the repeatability is good.
The distance between the two probe tips is generally 100 μm during measurement, and because the radius of the probe tip is about 5 μm, the area of the probe tip is small, and the generated pressure is large, the probe is placed on the surface of a sample to be measured as gently as possible so as to avoid damaging the sample to be measured, and the two probes are controlled to step side by side.
The stroke of the first horizontal sliding table and the second horizontal sliding table is larger than 100mm, the error is +/-3 mu m, the stroke of the vertical sliding table is larger than 10mm, and the error is +/-3 mu m.
The motion control system comprises an XY direction overall moving measurement platform part; and the other is a Z-axis liftable probe platform part. The technical scheme can solve the problem of adjusting the levelness of the sample table, and realize the function of preventing the probe from colliding with the sample when the probe descends.
In order to form good ohmic contact with the silicon-based material, the tip of the probe is made of wear-resistant conductive material, such as osmium-tungsten alloy, tungsten carbide alloy, and other hard wear-resistant good conductive materials.
The curvature radius of the needle point is not more than 25 μm, the needle pitch of the two probes is 40-100 μm, and the direct current insulation resistance between the two probes and the direct current insulation resistance between the probes and the probe support are more than 1G omega.
The measuring range of the ammeter is 1 nA-20 mA, the error is +/-0.1%, the voltage range of the voltage source is 1 mV-100 mV, and the error is +/-0.4%.
The foregoing is a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, a plurality of improvements and decorations can be made without departing from the principle of the present invention, and these improvements and decorations should also be regarded as the protection scope of the present invention.
Claims (10)
1. The integrated circuit epitaxial layer extension resistance tester is characterized by comprising a base, wherein an air-flotation damping table is arranged on the base, a product adjusting table and a probe adjusting table are arranged on the air-flotation damping table, a sample measuring table is arranged on the product adjusting table, a probe is arranged on the probe adjusting table, the product adjusting table comprises a first horizontal sliding table and a second horizontal sliding table, the first horizontal sliding table enables the sample measuring table to move along the x direction, the second horizontal sliding table enables the sample measuring table to move along the y direction, the probe adjusting table comprises a vertical sliding table, and the vertical sliding table enables the two probes to move along the z direction; the probe is connected with a measuring circuit, and the measuring circuit comprises a voltage source and an ammeter.
2. The integrated circuit epitaxial layer spreading resistance tester according to claim 1, wherein the sample measuring table comprises a damping table, a digital display electronic scale is arranged above the damping table, a sample bearing disc is arranged above the digital display electronic scale, a plurality of adsorption holes are formed in the sample bearing disc, and a microscope is arranged on the damping table.
3. The integrated circuit epitaxial layer spreading resistance tester according to claim 2, wherein an insulating substrate is arranged below the sample bearing plate, a vacuum adsorption plate is arranged in the middle of the insulating substrate, and a horizontal adjusting device is arranged below the vacuum adsorption plate.
4. The tester of claim 3, wherein the sample wafer disk has a diameter of more than 100mm, a thickness of 20mm, a flatness of less than 3 μm, an insulation resistivity of more than 1G Ω, and a diameter of 0.1 mm.
5. The integrated circuit epitaxial layer spreading resistance tester according to claim 4, wherein the sample wafer bearing disc is provided with 5 circular scale grooves, the diameters of the circular scale grooves are respectively 50.8mm, 76.2mm, 100mm, 125mm and 150mm, the diameter of the insulating substrate is 200mm, and the thickness of the insulating substrate is 20 mm.
6. The tester of claim 3, wherein the number of the horizontal adjusting devices is three, and the horizontal adjusting devices are uniformly distributed along the circumferential direction, and each horizontal adjusting device comprises an upper external thread sleeve and a lower internal thread sleeve.
7. The tester of claim 3, wherein the vacuum adsorption disc is connected with an adsorption system, the adsorption system comprises an adsorption cover and a negative pressure controller, a negative pressure meter is arranged on a pipeline between the adsorption cover and the negative pressure controller, the negative pressure controller comprises a normally closed electromagnetic pressure release valve and an adjustable negative pressure pump, and the normally closed electromagnetic pressure release valve is controlled by a relay switch system.
8. The integrated circuit epitaxial layer spreading resistance tester of claim 6, wherein the probes are disposed on a probe holder, and the vertical slide is disposed between the probes and the probe holder.
9. The integrated circuit epitaxial layer spreading resistance tester of claim 8, wherein the stroke of the first horizontal sliding table and the second horizontal sliding table is larger than 100mm with an error of ± 3 μm, and the stroke of the vertical sliding table is larger than 10mm with an error of ± 3 μm;
the needle points of the probes are made of wear-resistant conductive materials, the curvature radius of the needle points is not more than 25 mu m, the needle distance between the two probes is 40-100 mu m, and the direct-current insulation resistance between the two probes and the direct-current insulation resistance between the probes and the probe support are more than 1G omega.
10. The tester for testing the epitaxial layer spreading resistance of the integrated circuit according to claim 9, wherein the ammeter has a measurement range of 1nA to 20mA with a tolerance of ± 0.1%, and the voltage source has a voltage range of 1mV to 100mV with a tolerance of ± 0.4%.
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