CN111033732A - 使用导线接合的混合式添加结构的可堆叠存储器裸片 - Google Patents

使用导线接合的混合式添加结构的可堆叠存储器裸片 Download PDF

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Publication number
CN111033732A
CN111033732A CN201880054692.4A CN201880054692A CN111033732A CN 111033732 A CN111033732 A CN 111033732A CN 201880054692 A CN201880054692 A CN 201880054692A CN 111033732 A CN111033732 A CN 111033732A
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semiconductor die
redistribution structure
semiconductor
die
semiconductor device
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CN201880054692.4A
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A·帕查穆图
C·H·育
J·F·克丁
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Micron Technology Inc
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Micron Technology Inc
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Abstract

本文中揭示具有不包含预成形衬底的重布结构的半导体装置以及相关联系统及方法。在一个实施例中，一种半导体装置包含附着到重布结构且经由多个导线接合电耦合到所述重布结构的第一半导体裸片。所述半导体装置也可包含堆叠于所述第一半导体裸片上的一或多个第二半导体裸片，其中所述第一半导体裸片及所述第二半导体裸片的一或多者经由多个导线接合电耦合到所述重布结构。所述半导体装置也可包含所述第一半导体裸片及/或所述第二半导体裸片及所述重布结构的表面上方的模制材料。

Description

使用导线接合的混合式添加结构的可堆叠存储器裸片
相关申请案的交叉参考
本申请案含有与名称为“具有反向堆积混合式添加结构的贯穿模后封装(THRUMOLD POST PACKAGE WITH REVERSE BUILD UP HYBRID ADDITIVE STRUCTURE)”的约翰·F·卡丁(John F.Kaeding)、阿肖克·帕查穆苏(Ashok Pachamuthu)、马克·E·塔特尔(Mark E.Tuttle)及陈浩尧(Chan H.Yoo)的同时申请美国专利申请案相关的标的物。相关申请案(其揭示内容以引用的方式并入本文中)让与美光科技公司(Micron Technology,Inc.)且由代理档案号010829-9216.US00识别。
技术领域
本发明大体涉及半导体装置。具体来说，本发明涉及包含电耦合到不包含预成形衬底的重布结构的半导体裸片的半导体装置以及相关联系统及方法。
背景技术
微电子装置大体上具有裸片(即，芯片)，其包含具有高密度的极小组件的集成电路。通常，裸片包含电耦合到集成电路的极小接合垫阵列。接合垫是供应电压、信号等等通过其传输到集成电路及从集成电路传输的外部电接点。在形成裸片后，“封装”裸片以将接合垫耦合到可更容易耦合到各种电力供应线、信号线及接地线的较大电端子阵列。用于封装裸片的常规工艺包含将裸片上的接合垫电耦合到引线、球垫或其它类型的电端子的阵列且囊封裸片以保护其免受环境因素(例如水分、微粒、静电及实体冲击)影响。
不同类型的裸片可具有大不相同接合垫布置，但仍应与类似外部装置兼容。因此，现有封装技术可包含将裸片电耦合到经配置以与外部装置的接合垫配合的中介层或其它预成形衬底。预成形衬底可与晶片分开形成(例如由供货商提供)，且预成形衬底接着在封装工艺期间附着到晶片。此类预成形衬底会相对较厚以借此增大所得半导体封装的大小。其它现有封装技术可代以包含在裸片上直接形成重布层(RDL)。RDL包含将裸片接合垫与RDL接合垫连接的线路及/或通路，RDL接合垫继而经布置以与外部装置的接合垫配合。在一个典型封装工艺中，将许多裸片安装在载体上(即，在晶片或面板级处)且在移除载体前囊封裸片。接着，使用沉积及平版印刷技术来使RDL直接形成于裸片的正面上。最后，将引线、球垫或其它类型的电端子的阵列安装于RDL的接合垫上且分割裸片以形成个别微电子装置。
上述封装技术的一个缺点在于其使将多个半导体裸片垂直堆叠成单个封装变困难且昂贵。即，由于在形成RDL前囊封裸片，所以堆叠裸片一般需要硅穿孔(TSV)来将堆叠裸片的接合垫电耦合到RDL。形成TSV需要特殊工具及/或技术，其会增加形成微电子装置的成本。
附图说明
图1A及1B分别是说明根据本发明的实施例的半导体装置的横截面图及俯视图。
图2A到2J是说明根据本发明的实施例的各种制造阶段中的半导体装置的横截面图。
图2K是图2J中所展示的半导体装置的俯视图。
图3A及3B分别是说明根据本发明的实施例的半导体装置的横截面图及俯视图。
图4A及4B分别是说明根据本发明的实施例的半导体装置的横截面图及俯视图。
图5是包含根据本发明的实施例所配置的半导体装置的系统的示意图。
具体实施方式
下文将描述包含电耦合到不包含预成形衬底的重布结构的半导体裸片的半导体装置以及相关联系统及方法的若干实施例的特定细节。在一些实施例中，半导体装置包含导线接合到不含预成形衬底的重布结构且由模制材料囊封的一或多个半导体裸片。在以下描述中，讨论许多特定细节以提供本发明的实施例的透彻且可行的描述。但是，所属领域的技术人员将认识到，可在没有一或多个特定细节的情况下实践本发明。在其它例项中，未展示或未详细描述通常与半导体装置相关联的熟知结构或操作以免使本发明的其它方面不清楚。一般来说，应理解，除本文所揭示的特定实施例之外的各种其它装置、系统及方法可在本发明的范围内。
如本文所使用，术语“垂直”、“横向”、“上”及“下”可指代鉴于图中所展示的定向的半导体装置中的特征的相对方向或位置。例如，“上”或“最上”可指代经定位成比另一特征更靠近页的顶部的特征。但是，这些术语应被广义解释为包含具有其它定向(例如倒置或倾斜定向，其中可取决于定向来互换顶部/底部、上/下、上方/下方、向上/向下及左/右)的半导体装置。
图1A是横截面图且图1B是俯视图，其等说明根据本发明的实施例的半导体装置100(“装置100”)。参考图1A，装置100可包含重布结构130、耦合到重布结构130且具有多个接合垫112的半导体裸片110及重布结构130的至少部分及半导体裸片110上方的模制材料150。模制材料150可完全覆盖半导体裸片110及重布结构130。如图1A中所展示，仅一个半导体裸片110耦合到重布结构130，但是，在其它实施例中，装置100可包含任何数量个半导体裸片(例如堆叠于半导体裸片110上的一或多个额外半导体裸片)。半导体裸片110可包含各种类型的半导体组件及功能构件，例如动态随机存取存储器(DRAM)、静态随机存取存储器(SRAM)、快闪存储器、其它形式的集成电路存储器、处理电路、成像组件及/或其它半导体构件。在一些实施例中，装置100可包含安置于半导体裸片110与重布结构130的第一表面133a之间的裸片附着材料109。裸片附着材料109可为(例如)黏性膜(例如裸片附着膜)、环氧树脂、胶带、膏糊或其它适合材料。
重布结构130包含电介质材料132、电介质材料132中及/或电介质材料132上的多个第一接点134及电介质材料132中及/或电介质材料132上的多个第二接点136。重布结构130进一步包含在电介质材料132内、穿过电介质材料132及/或在电介质材料132上延伸以将第一接点134的个别者电耦合到第二接点136的对应者的多个导线138(例如包括导电通路及/或迹线)。在特定实施例中，第一接点134、第二接点136及导线138可由例如铜、镍、焊料(例如基于SnAg的焊料)、填充有导体的环氧树脂及/或其它导电材料的一或多个导电材料形成。电介质材料132可包括合适介电、绝缘或钝化材料的一或多个层。电介质材料132使个别第一接点134、第二接点136及相关联导线138彼此电隔离。重布结构130也包含面向半导体裸片110的第一表面133a及与第一表面133a对置的第二表面133b。第一接点134暴露于重布结构130的第一表面133a处，而第二接点136暴露于重布结构130的第二表面133b处。
在一些实施例中，重布结构130的第二接点136的一或多者比对应第一接点134更与半导体裸片110横向间隔。即，第二接点136的若干者可从与其电耦合的对应第一接点134扇出或横向向外定位。将第二接点136从第一接点134横向向外定位会促进装置100连接到其它装置及/或接口，其包含具有大于半导体裸片110的间距的间距的连接。再者，重布结构130可包含半导体裸片110下方的裸片附着区域。在图1A所展示的实施例中，没有第一接点134安置于重布结构130的裸片附着区域内。在其它实施例(例如，如图4A中所展示)中，第一接点134的一或多者可安置于半导体裸片110下方的裸片附着区域内。当第一接点134位于裸片附着区域内时，第一接点134可为电主动接点或非电主动的虚设接点。
重布结构130的电介质材料132形成堆积衬底，使得重布结构130不包含预成形衬底(例如与载体晶片分开形成且随后附着到载体晶片的衬底)。因此，重布结构130可被制成极薄的。例如，在一些实施例中，重布结构130的第一表面133a与第二表面133b之间的距离D1小于约50μm。在特定实施例中，距离D1为约30μm或小于约30μm。因此，可相较于(例如)包含形成于预成形衬底上方的常规重布层的装置而减小半导体装置100的总大小。但是，重布结构130的厚度不受限制。
装置100进一步包含：(i)第一电连接器104，其将半导体裸片110的接合垫112电耦合到重布结构130的对应第一接点134；及(ii)第二电连接器106，其安置于重布结构130的第二表面133b上且经配置以将重布结构130的第二接点136电耦合到外部电路(图中未展示)。第二电连接器106可为焊球、导电凸块、导电支柱、导电环氧树脂及/或其它适合导电元件。在一些实施例中，第二电连接器106在重布结构130的第二表面133b上形成球栅阵列。在特定实施例中，可省略第二电连接器106且可将第二接点136直接连接到外部装置或电路。如图1A中所展示，第一电连接器104可包括多个导线接合。在其它实施例中，第一电连接器104可包括其它类型的导电连接器(例如导电支柱、凸块、引线框等等)。
图1B是展示半导体裸片110及接合垫112的装置100的俯视图(为便于说明，图中未展示模制材料150)。如图中所展示，第一电连接器104将半导体裸片110的接合垫112电耦合到重布结构130的第一接点134的对应者。在一些实施例中，个别第一接点134可电耦合到一个以上接合垫112或仅单个接合垫112。依此方式，装置100可经配置使得半导体裸片110的个别引脚被个别隔离且可接取(例如信号引脚)，及/或经配置使得多个引脚可经由相同组的第一接点134及第二接点136共同接取(例如电力供应或接地引脚)。在其它实施例中，电连接器104可依任何其它方式布置以提供半导体裸片110与重布结构130的第一接点134之间的电耦合的不同配置。
如图1B中所进一步展示，半导体裸片110可具有其中接合垫112沿半导体裸片110的对置纵向侧布置的矩形形状。但是，在其它实施例中，半导体裸片110可具有任何其它形状及/或接合垫配置。例如，半导体裸片110可呈矩形、圆形、正方形、多边形及/或其它适合形状。半导体裸片110可进一步包含可依任何图案布置于半导体裸片110上的任何数量个接合垫(例如，多于或少于图1B中所展示的10个实例性接合垫112)。
再次参考图1A，模制材料150可形成于重布结构130的第一表面133a、半导体裸片110及第一电连接器104上方。模制材料150可囊封半导体裸片110以保护半导体裸片110免受污染及实体损坏。再者，由于装置100不包含预成形衬底，所以模制材料150也对装置100提供所要结构强度。例如，模制材料150可经选择以防止装置100在将外力施加到装置100时翘曲、弯曲等等。因此，在一些实施例中，重布结构130可被制成极薄的(例如小于50μm)，因为重布结构130无需对装置100提供很大结构强度。因此，可减小装置100的总高度(例如厚度)。
图2A到2J是说明根据本发明的实施例的制造半导体装置200的方法中的各种阶段的横截面图。一般来说，可将半导体装置200制造成(例如)离散装置或较大晶片或面板的部分。在晶片级或面板级制造中，形成较大半导体装置，接着将其分割以形成多个个别装置。为便于解释及理解，图2A到2J说明两个半导体装置200的制造。但是，所属领域的技术人员应易于了解，可将半导体装置200的制造拓广到晶片及/或面板级(即，包含能够分割成两个以上半导体装置的更多组件)，同时包含类似构件且使用类似工艺，如本文所描述。
首先参考图2A到2D，半导体装置200的制造开始于形成重布结构230(图2D)。参考图2A，提供具有正面261a及背面261b的载体260，且在载体260的正面261a上形成释放层262。释放层262防止重布结构230与载体260直接接触且因此保护重布结构230免受载体260上的可能污染。在特定实施例中，载体260可为由(例如)硅、绝缘体上硅、化合物半导体(例如氮化镓)、玻璃或其它适合材料形成的临时载体。在某种程度上，载体260对后续处理阶段提供机械支撑且也在后续处理阶段期间保护释放层262的表面以确保稍后可从重布结构230适当移除释放层262。在一些实施例中，可在随后移除载体260后重新使用载体260。释放层262可为一次性膜(例如基于环氧树脂的材料的层压膜)或其它适合材料。在一些实施例中，释放层262可为激光敏感或光敏的以促进其在后续阶段中经由激光或其它光源移除。
重布结构230(图2D)是可由添加堆积工艺形成的导电及电介质材料的混合结构。即，将重布结构230添加地直接堆积于载体260及释放层262而非另一层压或有机衬底上。明确来说，通过例如溅镀、物理气相沉积(PVD)、电镀、平版印刷等等的半导体晶片制程来制造重布结构230。例如，参考图2B，可在释放层262上直接形成多个第二接点236且可在释放层262上形成一层电介质材料232以使个别第二接点236电隔离。电介质材料232可由(例如)聚对二甲苯、聚酰亚胺、低温化学气相沉积(CVD)材料(例如四乙氧基硅烷(TEOS)、氮化硅(Si3Ni4)、氧化硅(SiO2))及/或其它适合介电、非导电材料形成。参考图2C，可形成导电材料及电介质材料232的额外层以堆积电介质材料232及形成电介质材料232内的导电部分235的导线238。
图2D展示完全形成于释放层262及载体260上后的重布结构230。如图2D中所展示，形成电耦合到导线238的多个第一接点234。因此，重布结构230的导电部分235可包含第二接点236及第一接点234及导线238的一或多者。导电部分235可由铜、镍、焊料(例如基于SnAg的焊料)、填充有导体的环氧树脂及/或其它导电材料制成。在一些实施例中，导电部分235全部由相同导电材料制成。在其它实施例中，每一导电部分235可包含一个以上导电材料(例如，第一接点234、第二接点236及导线238可包括一或多个导电材料)，及/或不同导电部分235可包括不同导电材料。第一接点234可经布置以界定重布结构230上的裸片附着区域239。
参考图2E，半导体装置200的制造接着将多个第一半导体裸片210耦合到重布结构230的裸片附着区域且形成将第一半导体裸片210电耦合到重布结构230的多个电连接器204a。更明确来说，第一半导体裸片210的背面(例如与具有接合垫212的正面对置的侧)经由第一裸片附着材料209a附着到重布结构230的暴露上表面233a处的裸片附着区域。第一裸片附着材料209a可为裸片附着黏性膏或黏性元件，例如裸片附着膜或切割裸片附着膜(所属领域的技术人员分别称为“DAF”或“DDF”)。在一个实施例中，第一裸片附着材料209a可包含在其被压缩超过阈值压力等级时将第一半导体裸片210黏着到重布结构230的压力固化黏性元件(例如胶带或膜)。在另一实施例中，第一裸片附着材料209a可为通过暴露于UV辐射来固化的UV固化胶带或膜。如图2E中所进一步展示，第一半导体裸片210的接合垫212经由电连接器204a电耦合到重布结构230的对应第一接点234。在所说明的实施例中，电连接器204a包括多个导线接合。在其它实施例中，电连接器204a可包括另一类型的导电构件，例如(举例来说)导电凸块、支柱、引线框等等。在其它实施例中，第一半导体裸片210可经定位以具有不同定向。例如，如下文将参考图4A进一步详细描述，第一半导体裸片210可经定位成面向下，使得每一第一半导体裸片210的正面面向重布结构230。
参考图2F，半导体装置200的制造接着将多个第二半导体裸片220堆叠于第一半导体裸片210上且形成将第二半导体裸片220电耦合到重布结构230的多个电连接器204b。因此，使多个裸片堆叠208沿重布结构230彼此分离。如图2E中所说明，仅两个裸片208定位于重布结构230上。但是，任何数量个裸片堆叠208可沿重布结构230及载体260彼此隔开。例如，在晶片或面板级处，许多裸片堆叠208可沿晶片或面板隔开。在其它实施例中，每一裸片堆叠208可包含不同数量个半导体裸片。例如，每一裸片堆叠208可仅包含第一半导体裸片210(例如，如同图1A及1B中所说明的实施例)或可包含堆叠于第二半导体裸片220上的额外半导体裸片(例如3个、4个、8个、10个或甚至更多裸片的堆叠)。
如图2F中所展示，第二半导体裸片220的背面(例如与具有接合垫222的正面对置的侧)经由第二裸片附着材料209b附着到第一半导体裸片210的正面。即，第一半导体裸片210及第二半导体裸片220(统称为“裸片210、220”)正面对背面堆叠。在其它实施例中，第二半导体裸片220可经定位以具有不同定向。例如，如下文将参考图3A进一步详细描述，第二半导体裸片220可经定位成面向下，使得半导体裸片220的正面面向第一半导体裸片210的正面。第二裸片附着材料209b可相同于或不同于第一裸片附着材料209a。在一些实施例中，第二裸片附着材料209b具有适合与导线接合一起使用的“导线覆膜(film-over-wire)”材料的形式。在此类实施例中，第二裸片附着材料209b可为DAF或DDF。再者，第二裸片附着材料209b的厚度可大得足以防止第二半导体裸片220的背面与电连接器204a之间的接触(例如导线接合)以避免损坏电连接器204a。在其它实施例中，可使用焊料或其它适合直接裸片附着技术来将半导体裸片220直接耦合到半导体裸片210。
如图2F中所进一步展示，第二半导体裸片220的接合垫222经由电连接器204b电耦合到重布结构230的第一接点234的对应者。在所说明的实施例中，电连接器204b包括多个导线接合。在其它实施例中，电连接器204b可包括另一类型的导电构件，例如(举例来说)导电凸块、支柱、引线框等等。例如，在其中裸片210、220面对面(即，正面对正面)布置的特定实施例中，第二半导体裸片220的接合垫222的一或多者可经由铜柱或焊料连接直接电耦合到第一半导体裸片210的接合垫212。如下文将参考图2K进一步详细描述，重布结构230的一些第一接点234可电耦合到裸片210、220的两个或两个以上接合垫212及/或222。在图2F所展示的横截面图中，仅绘制电耦合到两个裸片210、220的第一接点234。
由于在将堆叠裸片210、220安装于载体260上前在载体260上形成重布结构230，所以可采用常规方法来将裸片210、220电耦合到重布结构230(例如导线接合、直接芯片附着等等)。明确来说，可避免使用硅穿孔(TSV)来电耦合堆叠半导体裸片。涉及首先将多个半导体裸片安装到载体且接着在裸片上直接形成重布层的工艺中需要TSV。在此“后重布层”方法中，必须在形成重布层前且在包覆模制前堆叠半导体裸片。即，半导体裸片需要采用TSV(与(例如)导线接合相反)，因为在形成重布层前堆叠及包覆模制裸片。本发明允许使用其它类型的电耦合，同时也避免与TSV相关联的成本及制造困难。
转到图2G，半导体装置200的制造接着在重布结构230的上表面233a上及裸片210、220周围形成模制材料250。在所说明的实施例中，模制材料250囊封裸片210、220，使得裸片210、220密封于模制材料250内。在一些实施例中，模制材料250也可囊封电连接器204a及/或204b的部分或全部。模制材料250可由树脂、环氧树脂、基于聚硅氧的材料、聚酰亚胺及/或此项技术中使用或已知的其它适合树脂形成。一旦被沉积，则模制材料250可通过UV光、化学硬化剂、热或此项技术中已知的其它适合固化方法来固化。固化模制材料250可包含上表面251。在特定实施例中，可形成及/或磨削上表面251，使得上表面251具有高于重布结构230的上表面233a的高度，其仅略大于重布结构230的上表面233a上方的电连接器204b及/或第二半导体裸片220的最大高度。即，模制材料250的上表面251可具有仅足以囊封电连接器204b及裸片210、220的高度。
参考图2H，半导体装置200的制造接着从载体260(如图2G中所展示)移除重布结构230。例如，真空、杆销、激光或其它光源或此项技术中已知的其它适合方法可使重布结构230脱离释放层262(图2G)。在一些实施例中，释放层262允许载体260被容易移除，使得载体260可被再次重新使用。在其它实施例中，可通过薄化载体260及/或释放层262(例如磨削、干式蚀刻工艺、化学蚀刻工艺、化学机械抛光(CMP)等等)来至少部分移除载体260及释放层262。移除载体260及释放层262暴露重布结构230的下表面233b(其包含多个第二接点236)。
转到图2I，半导体装置200的制造接着在重布结构230的第二接点236上形成电连接器206。电连接器206可经配置以将重布结构230的第二接点236电耦合到外部电路(图中未展示)。在一些实施例中，电连接器206包括多个焊球或焊料凸块。例如，模板印刷机可将焊料膏的离散区块沉积到重布结构230的第二接点236上。接着，可回焊焊料膏以在第二接点236上形成焊球或焊料凸块。
图2J展示彼此分割后的半导体装置200。如图中所展示，可在多个切割道253(如图2I中所说明)处将重布结构230与模制材料250一起切割以分割裸片堆叠208且使半导体装置200彼此分离。一旦被分割，则个别半导体装置200可经由电连接器206附着到外部电路且因此并入到各种系统及/或装置中。
图2K说明半导体装置200的一者的俯视图。已省略模制材料250来展示具有接合垫222的第二半导体裸片220。在所说明的实施例中，第一半导体裸片210完全定位于第二半导体裸片220下方。如图中所展示，电连接器204a将第一半导体裸片210的接合垫212(图中未绘制)电耦合到重布结构230的第一接点234的对应者。同样地，电连接器204b将第二半导体裸片220的接合垫222电耦合到重布结构230的第一接点234的对应者。在一些实施例中，个别第一接点234可电耦合到一个以上接合垫212及/或222。例如，如图中所说明，个别第一接点234a可经由导线接合204b电耦合到第二半导体裸片220的个别接合垫222a，且也经由导线接合204a电耦合到第一半导体裸片210的个别接合垫212(图中未绘制)。在特定实施例中，个别第一接点234可仅耦合到一个接合垫212或222。例如，如图中所说明，个别第一接点234b仅电耦合到第二半导体裸片220的接合垫222b且因此不电耦合到第一半导体裸片210。依此方式，装置200可经配置使得裸片堆叠208中的半导体裸片的个别引脚被个别隔离且可接取(例如信号引脚)，及/或经配置使得裸片堆叠208中的每一半导体裸片的共同引脚经由相同组的第一接点234及第二接接点236共同接取(例如电力供应或接地引脚)。在其它实施例中，电连接器204a及204b可依任何其它方式布置以提供裸片210、220与重布结构230的第一接点234之间的电耦合的不同配置。
在其它实施例中，裸片210、220可经堆叠使得第一半导体裸片210不直接位于第二半导体裸片220下方，及/或裸片210、220可具有彼此不同的尺寸或定向。例如，第二半导体裸片220可经安装使得其具有从第一半导体裸片210外伸的部分，或第一半导体裸片210可大于第二半导体裸片220，使得第二半导体裸片220完全定位于第一半导体裸片210的覆盖区内。裸片210、220可进一步包含可依任何图案布置于裸片210、220上的任何数量个接合垫(例如，多于或少于图2K中所展示的10个实例性接合垫)。
图3A是横截面图且图3B是俯视图，其等说明根据本发明的另一实施例的半导体装置300(“装置300”)。此实例更明确地展示布置成“面对面”配置的一或多个半导体裸片。装置300可包含大体上类似于上文所详细描述的半导体装置100及200的构件的构件。例如，在图3A所说明的实施例中，装置300包含重布结构330及耦合到重布结构330的上表面333a的裸片堆叠308。更明确来说，第一半导体裸片310的背面(例如与具有多个接合垫312的裸片的正面对置的侧)可经由裸片附着材料309附着到重布结构330的上表面333a。具有多个接合垫322的第二半导体裸片320可堆叠于第一半导体裸片310上，且模制材料350可形成于重布结构330的上表面333a上及第一半导体裸片310及第二半导体裸片320周围。第二半导体裸片320经定位使得包含接合垫322的第二半导体裸片320的正面面向第一半导体裸片310的正面。多个导电构件315将第二半导体裸片320的接合垫322的至少若干者耦合到第一半导体裸片310的接合垫312的对应者。在一些实施例中，导电构件315是铜柱。在特定实施例中，导电构件315可包括例如(举例来说)铜、金、铝等等的一或多个导电材料且可具有不同形状及/或配置。
如图3A及3B中所进一步展示，第一半导体裸片310的接合垫312可经由导线接合304电耦合到重布结构330的接点334的对应者。在一些实施例中，可在形成导线接合304后形成导电构件315(且因此附着第二半导体裸片320)。在特定实施例中，可通过(例如)热压接合(例如铜-铜(Cu-Cu)接合)的适合工艺来形成导电构件315。一般来说，热压接合技术可利用热及压缩的组合(例如z轴及/或垂直力控制)来分别形成第一半导体裸片310的接合垫312与第二半导体裸片320的接合垫322之间的导电焊料接头。导电构件315可进一步形成为具有足以使第二半导体裸片320的正面不接触且不会损坏导线接合304的高度。在此类实施例中，装置300包含间质性形成于第一半导体裸片310与第二半导体裸片320之间的间隙317。在特定实施例中，间隙317由模制材料350填充，使得模制材料350加强第一半导体裸片310与第二半导体裸片320之间的耦合。再者，模制材料350可对裸片堆叠308提供结构强度以防止(例如)第二半导体裸片320弯曲或翘曲。
图3B展示将第一半导体裸片310的接合垫312(图3A)电耦合到重布结构330的接点334的导线接合304的布置的一个例示性实施例。图3B中未绘制第一半导体裸片310及接合垫312，因为其等完全位于第二半导体裸片320下方，且为清楚起见，图3B中未绘制模制材料350。如图中所说明，每一接点334仅导线接合到单个接合垫312。但是，导线接合304可依任何其它方式布置以提供接合垫312与接点334之间的电耦合的不同配置。例如，在其它实施例中，部分或全部接点334可导线接合到一个以上接合垫312。在其它实施例中，部分或全部接点334可导线接合到第二半导体裸片320的接合垫322及/或导电构件315。
图4A是横截面图且图4B是俯视图，其等说明根据本发明的另一实施例的半导体装置400(“装置400”)。在此实例中，一或多个半导体裸片布置成“背对背”配置。装置400可包含大体上类似于上文所详细描述的半导体装置100及200的构件的构件。例如，在图4A所说明的实施例中，装置400包含具有上表面433a的重布结构430、耦合到上表面433a的裸片堆叠408及位于上表面433a上方且囊封裸片堆叠408的模制材料450。更明确来说，重布结构430可包含暴露于重布结构430的上表面433a处的多个第一接点434a及多个第二接点434b(统称为“接点434”)。第二接点434b定位于裸片堆叠408下方(例如，定位于直接在第一半导体裸片410下方的裸片附着区域内)，而第一接点434a与裸片堆叠408横向隔开(例如，定位于裸片附着区域外)。
第一半导体裸片410具有多个接合垫412且附着到重布结构430，使得半导体裸片410的正面(例如包含接合垫412的侧)面向重布结构430的上表面433a。第一半导体裸片410可依此方式使用已知倒装芯片安装技术来附着到重布结构430。如图中所展示，多个导电构件416可将第一半导体裸片410的接合垫412耦合到重布结构430的第二接点434b的对应者。在一些实施例中，导电构件416是铜柱。在其它实施例中，导电构件416可包括(例如)铜、金、铝等等的一或多个导电材料且可具有不同形状及/或配置。可通过(例如)热压接合(例如铜-铜(Cu-Cu)接合)的适合工艺来形成导电构件416。在一些实施例中，导电构件416可具有使得装置400包含间质性形成于第一半导体裸片410与重布结构430的上表面433a之间的间隙418的高度。在一些此类实施例中，间隙418由模制材料450填充以加强第一半导体裸片410与重布结构430之间的耦合。再者，模制材料450可促进裸片堆叠408防止(例如)第一半导体裸片410弯曲或翘曲。
具有多个接合垫422的第二半导体裸片420可背对背堆叠于第一半导体裸片410上(例如，第一半导体裸片410的背面面向第二半导体裸片420的背面)。第二半导体裸片420可经由裸片附着材料409附着到第一半导体裸片410。如图4A及4B中所进一步展示，第二半导体裸片420的接合垫422可经由导线接合404电耦合到重布结构430的第一接点434a的对应者。如图4B中所展示，重布结构430的第一接点434a的若干者可经由个别导线接合404电耦合到第二半导体裸片420的一个以上接合垫422。同样地，重布结构430的第一接点434a的若干者可仅耦合到第二半导体裸片420的单个接合垫422。但是，导线接合404可依任何其它方式布置以提供接合垫422与第一接点434a之间的电耦合的不同配置。例如，在一些实施例中，每一第一接点434a仅导线接合到单个对应接合垫422。
在本发明的其它实施例中，可使用本文参考图1A到4B所描述的正对背、正对正及/或背对背布置的任何者或其等的任何组合来提供包含具有两个以上裸片的裸片堆叠的半导体装置。例如，根据本发明的半导体装置可包含4重、6重、8重等等堆叠的多对正对正半导体裸片、4重、6重、8重等等堆叠的多对正对背半导体裸片或任何其它组合。
上文参考图1A到4B所描述的半导体装置的任何一者可并入到各种更大及/或更复杂系统的任何者中，图5中所示意性展示的系统590是所述系统的代表性实例。系统590可包含半导体裸片组合件500、电源592、驱动器594、处理器596及/或其它子系统或组件598。半导体裸片组合件500可包含具有大体上类似于上述半导体装置的构件的构件的半导体装置。所得系统590可执行各种功能的任何者，例如存储器存储、数据处理及/或其它适合功能。因此，代表性系统590可包含(但不限于)手持装置(例如移动电话、平板电脑、数字读取器及数字音频播放器)、计算机及电器。系统590的组件可收纳于单个单元中或分布于多个互连单元上(例如，通过通信网络)。系统590的组件也可包含远程装置及各种计算机可读媒体的任何者。
应从上文了解，本文已为了说明而描述本发明的特定实施例，但可在不背离本发明的情况下作出各种修改。因此，本发明仅受限于随附权利要求书。此外，也可在其它实施例中组合或消除特定实施例的上下文中所描述的新技术的特定方面。再者，尽管已在所述实施例的上下文中描述与新技术的特定实施例相关联的优点，但其它实施例也可展现此类优点且未必需要落入本发明的范围内的所有实施例展现此类优点。因此，本发明和相关联技术可涵盖本文未明确展示或描述的其它实施例。

Claims (24)

1.一种半导体装置，其包括：
重布结构，其具有电介质材料、具有第一导电接点的第一表面、具有第二导电接点的第二表面及通过所述电介质材料将所述第一导电接点的个别者电耦合到所述第二导电接点的对应者的导线，且其中所述重布结构不包含预成形衬底；
半导体裸片，其耦合到所述重布结构的所述第一表面且包含接合垫；
导线接合，其将所述接合垫电耦合到所述第一导电接点的对应者；及
模制材料，其覆盖所述重布结构的至少部分及所述半导体裸片。
2.根据权利要求1所述的半导体装置，其中所述半导体裸片是第一半导体裸片，其中所述接合垫是第一接合垫，且所述半导体装置进一步包括堆叠于所述第一半导体裸片上方且包含第二接合垫的第二半导体裸片。
3.根据权利要求2所述的半导体装置，其中所述导线接合是第一导线接合，且所述半导体装置进一步包括将所述第二接合垫电耦合到所述重布结构的所述第一导电接点的对应者的第二导线接合。
4.根据权利要求2所述的半导体装置，其进一步包括所述第一半导体裸片与所述重布结构的所述第一表面之间的第一裸片附着材料及所述第二半导体裸片与所述第一半导体裸片之间的第二裸片附着材料。
5.根据权利要求2所述的半导体装置，其中所述第一接合垫面向所述第二接合垫，且其中所述第二接合垫电耦合到所述重布结构。
6.根据权利要求1所述的半导体装置，其中所述半导体裸片是第一半导体裸片，且所述半导体装置进一步包括第二半导体裸片，其中：
所述第一半导体裸片堆叠于所述第二半导体裸片上方，且
所述第二半导体裸片耦合到所述重布结构且电耦合到所述第一导电接点的至少一者。
7.根据权利要求6所述的半导体装置，其中所述第二半导体裸片包含经由焊料连接电耦合到所述第一导电接点的对应者的接合垫。
8.根据权利要求6所述的半导体装置，其中所述重布结构进一步包含所述第二半导体裸片下方的裸片附着区域，且其中所述第二半导体裸片仅电耦合到所述裸片附着区域内的第一接点。
9.根据权利要求6所述的半导体装置，其中所述重布结构进一步包含所述第二半导体裸片下方的裸片附着区域，且其中所述接合垫通过所述多个导线接合电耦合到所述裸片附着区域外的第一接点。
10.根据权利要求1所述的半导体装置，其中所述半导体裸片是存储器裸片。
11.根据权利要求1所述的半导体装置，其中：
所述模制材料位于所述重布结构的所述第一表面上方且囊封所述半导体裸片及所述多个导线接合；且
所述装置进一步包括所述半导体裸片与所述重布结构的所述第一表面之间的裸片附着材料。
12.根据权利要求1所述的半导体装置，其中所述第二接点的至少一者比与所述第二接点电耦合的对应第一接点更与所述半导体裸片横向间隔。
13.根据权利要求1所述的半导体装置，其中所述第一表面与所述第二表面之间的所述重布结构的厚度小于约50μm。
14.一种制造半导体装置的方法，所述方法包括：
在载体上形成重布结构，所述重布结构包含绝缘材料、所述重布结构的第一表面处的第一导电接点及所述重布结构的第二表面处的第二导电接点，其中所述第二导电接点经由至少部分延伸穿过所述绝缘材料的导线电耦合到所述第一导电接点的对应者；
将半导体裸片安置于所述重布结构的所述第一表面上方，其中所述半导体裸片包含接合垫；
使用导线接合来将所述接合垫耦合到所述第一导电接点的对应者；
在所述重布结构的所述第一表面的至少部分、所述半导体裸片及所述导线接合上方形成模制材料；及
移除所述载体以暴露所述重布结构的所述第二表面及所述第二导电接点。
15.根据权利要求14所述的方法，其中所述半导体裸片是第一半导体裸片，其中所述接合垫是第一接合垫，且所述方法进一步包括：
将第二半导体裸片堆叠于所述第一半导体裸片上，其中所述第二半导体裸片包含第二接合垫；及
使用导线接合来将所述第二接合垫耦合到所述第一导电接点的对应者。
16.根据权利要求14所述的方法，其中所述半导体裸片是第一半导体裸片，且所述方法包括：
将第二半导体裸片附着到所述重布结构的所述第一表面，其中所述第一半导体裸片堆叠于所述第二半导体裸片上，且其中所述第二半导体裸片电耦合到所述第一导电接点的至少一者。
17.根据权利要求14所述的方法，其进一步包括：在移除所述载体后，将导电构件安置于所述暴露第二导电接点上。
18.根据权利要求14所述的方法，其进一步包括：
将多个半导体裸片耦合到所述重布结构的所述第一表面，其中每一半导体裸片包含接合垫；
使用导线接合来将每一半导体裸片的所述接合垫耦合到所述第一导电接点的对应者；及
在移除所述载体后，分割所得结构以界定多个个别半导体装置。
19.一种半导体装置封装，其包括：
第一半导体裸片；
重布结构，其包含直接形成于所述第一半导体裸片上的堆积电介质材料、具有第一接合垫的第一侧、具有封装接点的第二侧及通过所述电介质材料将所述第一接合垫的个别者电耦合到所述封装接点的对应者的导线，其中所述重布结构的所述第一侧附着到所述第一半导体裸片，且其中所述第一半导体裸片具有电耦合到所述重布结构的所述第一接合垫的对应者的第二接合垫；
第二半导体裸片，其堆叠于所述第一半导体裸片上方且具有第三接合垫；及
第一导线接合，其将所述第三接合垫电耦合到所述第一接合垫的对应者。
20.根据权利要求19所述的半导体装置封装，其中所述第二接合垫经由第二导线接合电耦合到所述第一接合垫的所述对应者。
21.根据权利要求19所述的半导体装置封装，其中所述第二接合垫面向所述重布结构的所述第一侧且经由导电构件电耦合到所述第一接合垫的所述对应者。
22.根据权利要求19所述的半导体装置封装，其进一步包括位于所述重布结构的所述第一侧上方且囊封所述第一半导体裸片、所述第二半导体裸片及所述第一导线接合的模制材料。
23.根据权利要求19所述的半导体装置封装，其进一步包括堆叠于所述第二半导体裸片上方且具有第四接合垫的第三半导体裸片，其中所述第四接合垫电耦合到所述重布结构的所述第一接合垫的对应者。
24.根据权利要求19所述的半导体装置封装，其中所述第一侧与所述第二侧之间的所述重布结构的厚度小于约50μm。
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