CN110996564A - Expansion and shrinkage control method for PCB (printed circuit board) multilayer board - Google Patents
Expansion and shrinkage control method for PCB (printed circuit board) multilayer board Download PDFInfo
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- CN110996564A CN110996564A CN201911396500.0A CN201911396500A CN110996564A CN 110996564 A CN110996564 A CN 110996564A CN 201911396500 A CN201911396500 A CN 201911396500A CN 110996564 A CN110996564 A CN 110996564A
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- 238000000034 method Methods 0.000 title claims abstract description 32
- 238000004519 manufacturing process Methods 0.000 claims abstract description 61
- 238000005553 drilling Methods 0.000 claims abstract description 17
- 230000008602 contraction Effects 0.000 claims abstract description 15
- 238000012545 processing Methods 0.000 claims abstract description 7
- 238000003825 pressing Methods 0.000 claims abstract description 6
- 239000010410 layer Substances 0.000 claims description 81
- 238000005259 measurement Methods 0.000 claims description 10
- 238000012360 testing method Methods 0.000 claims description 10
- 239000011229 interlayer Substances 0.000 claims description 9
- 238000003475 lamination Methods 0.000 abstract description 9
- 238000011161 development Methods 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 150000003071 polychlorinated biphenyls Chemical class 0.000 description 2
- 239000002699 waste material Substances 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 238000004458 analytical method Methods 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000004364 calculation method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000013461 design Methods 0.000 description 1
- 238000003912 environmental pollution Methods 0.000 description 1
- 230000008676 import Effects 0.000 description 1
- 238000011160 research Methods 0.000 description 1
- 238000012827 research and development Methods 0.000 description 1
- 238000004904 shortening Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4638—Aligning and fixing the circuit boards before lamination; Detecting or measuring the misalignment after lamination; Aligning external circuit patterns or via connections relative to internal circuits
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
The invention belongs to the technical field of PCB processing, and provides a method for controlling the expansion and shrinkage of a PCB multi-layer board, which comprises the following steps: s1, before a PCB multi-layer board is processed, a group of targets are arranged at each corner of all inner-layer core boards to facilitate matching; s2, stacking the inner core plates, then pressing, measuring the length and the width of each inner core plate through an X-ray target drilling machine, and collecting the length and the width data of each inner core plate; s3, utilizing the collected length and width data of each inner-layer core plate to deduce a pre-expansion coefficient of each inner-layer core plate; and outputting the pre-expansion coefficient to an inner layer exposure tool in the mass production board manufacturing process for manufacturing, and applying the pre-expansion coefficient to the inner layer exposure tool for manufacturing to prepare a PCB (printed circuit board) multilayer board finished product. The invention provides a method for calculating a pre-expansion coefficient during the manufacturing of an inner layer graph before lamination of a multilayer board, which is applied to ensure that the multilayer board is completely laminated and the expansion and contraction of each layer are matched, so that the difference of finished products can be effectively reduced, the loss is reduced, and the production efficiency and the product quality are improved.
Description
Technical Field
The invention belongs to the technical field of PCB processing, and particularly relates to a method for controlling expansion and shrinkage of a PCB multi-layer board.
Background
The PCB board, also called as printed circuit board, short printed board, uses the insulating board as the base material, cuts into certain size, at least attaches a conductive pattern on it, and distributes the hole (such as component hole, fastening hole, metallized hole, etc.), and realizes the interconnection between the electronic components. Such boards are known as "printed" circuit boards because they are made using electronic printing. The circuit board needs to pass through various operation procedures in the production process, wherein in order to ensure the quality of finished products, the expansion and shrinkage of the core plates at the inner layer need to be controlled by a compensation coefficient in the manufacturing process, so that the sizes of the core plates at all layers are matched after being pressed, and the finished product rate is improved;
with the development of the PCB industry, the production quantity of multi-layer boards in China is steadily increased, and the production value of the multi-layer boards far exceeds that of double-sided boards and other boards, and occupies the top of the total production value. The multilayer, light and thin, and HDI development. However, the problems of inward opening, inward shortening, dimensional tolerance and the like caused by the expansion and contraction and interlayer deviation after the multi-layer board is pressed are always troubling the industry, and although each manufacturer has a certain inner layer compensation coefficient to maintain the dimensional stability of the multi-layer board, the analysis in the industry is few for the real reason of dimensional distortion;
at present, the expansion and shrinkage of the inner core plate are realized by adopting a fixed and uniform pre-expansion compensation coefficient in the PCB industry, the method is feasible for manufacturing simple PCBs, however, with the development of the PCB industry, the multilayer boards have been developed from simple double-sided boards and four-layered boards to high-layered boards, the stacking design of the inner core boards of the high-layered boards is complicated and various, and if the fixed and uniform pre-expansion compensation coefficient is still adopted to expand and contract the inner core boards, because the number of the inner core plates is large, the thickness of all the inner core plates and the residual copper rate among all the layers cannot be controlled uniformly, a little difference is easy to appear, in this case, the fixed and uniform pre-expansion compensation coefficient is adopted, which easily causes the size difference among the layers, the sizes of the core plates of the layers are not matched after lamination, the size difference of the finished product can reach more than 15mil, thereby causing the scrapping of batch, which is more serious especially for the import of large-scale makeup production.
Disclosure of Invention
In view of the above, the invention provides a method for controlling the expansion and contraction of a multilayer board of a PCB, which aims to overcome the defects in the prior art of PCBs and provides a method for calculating a pre-expansion coefficient during the production of an inner layer pattern before the lamination of the multilayer board, so as to ensure that the multilayer board is completely laminated and the expansion and contraction of each layer are matched, thereby effectively reducing the difference of finished products, reducing the loss and improving the production efficiency and the product quality; utilizing the collected length and width data of each inner core plate to deduce the pre-expansion coefficient of each inner core plate; and outputting the pre-expansion coefficient to an inner layer exposure tool in the production process of the mass production plate for production, and applying the pre-expansion coefficient to the inner layer exposure tool for production. The method is simple, clear and definite in operation and easy to master; the size difference of finished products can be controlled within +/-4 mil, the interlayer size range is controlled within 4mil, and the yield is obviously improved.
The technical scheme of the invention is as follows:
a PCB multi-layer board expansion and shrinkage control method is characterized by comprising the following steps:
s1, before processing the PCB multi-layer board, arranging a group of targets at each corner of all inner-layer core boards for matching;
s2, stacking the inner core plates, then pressing, measuring the length and the width of each inner core plate through an X-ray target drilling machine, and collecting the length and the width data of each inner core plate;
s3, utilizing the collected length and width data of each inner-layer core plate to deduce a pre-expansion coefficient of each inner-layer core plate; and outputting the pre-expansion coefficient to an inner layer exposure tool in the mass production board manufacturing process for manufacturing, and applying the pre-expansion coefficient to the inner layer exposure tool for manufacturing to prepare a PCB (printed circuit board) multilayer board finished product.
Furthermore, the target is a concentric circle target, the center of the concentric circle target is provided with a circle center, the outer side of the circle center is provided with a plurality of circular rings, the circular rings are sequentially enlarged from inside to outside, the ring widths of the circular rings are the same, and the distances between the circular rings are the same.
Further, the target quadratic element test has a measurement error of +/-3 um within a 500mm range.
Furthermore, the diameter of the center of the target is 20-60mil, the ring width of the ring is 10-14mil, and the distance between the rings is 1-3 mil.
Furthermore, the diameter of the circle center is 40 mils, the ring width of the ring is 12 mils, and the distance between the rings is 2 mils.
Furthermore, the X-ray target drilling machine is an MMX-888X-ray target drilling machine.
Further, the measurement accuracy of the X-ray target drilling machine is +/-10 um.
Further, in step S3, before the inner layer exposure tool is manufactured, the dimensional change of the tool film needs to be monitored by using a two-dimensional test.
Furthermore, the size difference of the finished PCB multi-layer board can be controlled within +/-4 mil.
Furthermore, the interlayer size range of the PCB multi-layer board is controlled within 4 mil.
The invention researches the research and development of the expansion and shrinkage control technology of the PCB multilayer board, breaks through the technical bottleneck in the prior art, and provides a method for calculating the pre-expansion coefficient during the manufacturing of the inner layer graph before the lamination of the multilayer board so as to ensure that the multilayer board is completely laminated and the expansion and shrinkage matching method of each layer can effectively reduce the difference of finished products, reduce the loss and improve the production efficiency and the product quality;
utilizing the collected length and width data of each inner core plate to deduce the pre-expansion coefficient of each inner core plate; and outputting the pre-expansion coefficient to an inner layer exposure tool in the production process of the mass production plate for production, and applying the pre-expansion coefficient to the inner layer exposure tool for production. The method is simple, clear and definite in operation and easy to master; the size difference of finished products can be controlled within +/-4 mil, the interlayer size range is controlled within 4mil, the error rate of the finished products is effectively reduced, and the generation of a large amount of waste materials is reduced. The technical level of the invention is at the leading level in the same industry in China, and the invention is applied to the production flow, the error rate of the produced product is low, the cost is effectively reduced, the material loss is saved, and the invention can be widely applied to the market and has wide market prospect.
The invention has the beneficial effects that:
1. during the manufacturing period of the inner layer graph before the lamination of the multilayer board, the calculation method of the pre-expansion coefficient ensures that the multilayer board is completely laminated, and the matching method of the expansion and shrinkage of each layer can effectively reduce the difference of finished products, reduce the loss and improve the production efficiency and the product quality;
2. the production device developed by the technology can effectively reduce material loss, waste generation and environmental pollution caused by industrial garbage in the actual production process, and can be widely applied to the circuit board manufacturing industry;
3. due to the application of the technology, the labor intensity is greatly reduced compared with the labor required by the original manual operation, the labor intensity and the labor requirement can be reduced, the production cost of enterprises is reduced, and the production efficiency is improved;
4. the size difference of finished products can be controlled within +/-4 mil, the interlayer size range is controlled within 4mil, and the yield is obviously improved.
The invention provides a method for calculating a pre-expansion coefficient during the manufacturing of an inner layer graph before lamination of a multilayer board, which is applied to ensure that the multilayer board is completely laminated and the expansion and contraction of each layer are matched, so that the difference of finished products can be effectively reduced, the loss is reduced, and the production efficiency and the product quality are improved.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention is further described in detail with reference to the following embodiments. It should be understood that the detailed description and specific examples, while indicating the scope of the invention, are intended for purposes of illustration only and are not intended to limit the scope of the invention.
Example 1
A PCB multi-layer board expansion and shrinkage control method is characterized by comprising the following steps:
s1, before processing the PCB multi-layer board, arranging a group of targets at each corner of all inner-layer core boards for matching;
s2, stacking the inner core plates, then pressing, measuring the length and the width of each inner core plate through an X-ray target drilling machine, and collecting the length and the width data of each inner core plate;
s3, utilizing the collected length and width data of each inner-layer core plate to deduce a pre-expansion coefficient of each inner-layer core plate; and outputting the pre-expansion coefficient to an inner layer exposure tool in the mass production board manufacturing process for manufacturing, and applying the pre-expansion coefficient to the inner layer exposure tool for manufacturing to prepare a PCB (printed circuit board) multilayer board finished product.
Furthermore, the target is a concentric circle target, the center of the concentric circle target is provided with a circle center, the outer side of the circle center is provided with a plurality of circular rings, the circular rings are sequentially enlarged from inside to outside, the ring widths of the circular rings are the same, and the distances between the circular rings are the same.
Further, the target quadratic element test has a measurement error of +/-3 um within a 500mm range.
Furthermore, the diameter of the circle center is 40 mils, the ring width of the ring is 12 mils, and the distance between the rings is 2 mils.
Furthermore, the X-ray target drilling machine is an MMX-888X-ray target drilling machine.
Further, the measurement accuracy of the X-ray target drilling machine is +/-10 um.
Further, in step S3, before the inner layer exposure tool is manufactured, the dimensional change of the tool film needs to be monitored by using a two-dimensional test.
Furthermore, the size difference of the finished PCB multi-layer board can be controlled within +/-4 mil.
Furthermore, the interlayer size range of the PCB multi-layer board is controlled within 4 mil.
The invention provides a method for calculating a pre-expansion coefficient during the manufacturing of an inner layer graph before lamination of a multilayer board, which is applied to ensure that the multilayer board is completely laminated and the expansion and contraction of each layer are matched, so that the difference of finished products can be effectively reduced, the loss is reduced, and the production efficiency and the product quality are improved.
Example 2
A PCB multi-layer board expansion and shrinkage control method is characterized by comprising the following steps:
s1, before processing the PCB multi-layer board, arranging a group of targets at each corner of all inner-layer core boards for matching;
s2, stacking the inner core plates, then pressing, measuring the length and the width of each inner core plate through an X-ray target drilling machine, and collecting the length and the width data of each inner core plate;
s3, utilizing the collected length and width data of each inner-layer core plate to deduce a pre-expansion coefficient of each inner-layer core plate; and outputting the pre-expansion coefficient to an inner layer exposure tool in the mass production board manufacturing process for manufacturing, and applying the pre-expansion coefficient to the inner layer exposure tool for manufacturing to prepare a PCB (printed circuit board) multilayer board finished product.
Furthermore, the target is a concentric circle target, the center of the concentric circle target is provided with a circle center, the outer side of the circle center is provided with a plurality of circular rings, the circular rings are sequentially enlarged from inside to outside, the ring widths of the circular rings are the same, and the distances between the circular rings are the same.
Further, the target quadratic element test has a measurement error of +/-3 um within a 500mm range.
Furthermore, the diameter of the circle center of the target is 20 mils, the ring width of the ring is 10 mils, and the distance between the rings is 1 mil.
Further, the measurement accuracy of the X-ray target drilling machine is +/-10 um.
Further, in step S3, before the inner layer exposure tool is manufactured, the dimensional change of the tool film needs to be monitored by using a two-dimensional test.
Furthermore, the size difference of the finished PCB multi-layer board can be controlled within +/-4 mil.
Furthermore, the interlayer size range of the PCB multi-layer board is controlled within 4 mil.
The invention provides a method for calculating a pre-expansion coefficient during the manufacturing of an inner layer graph before lamination of a multilayer board, which is applied to ensure that the multilayer board is completely laminated and the expansion and contraction of each layer are matched, so that the difference of finished products can be effectively reduced, the loss is reduced, and the production efficiency and the product quality are improved.
Example 3
A PCB multi-layer board expansion and shrinkage control method is characterized by comprising the following steps:
s1, before processing the PCB multi-layer board, arranging a group of targets at each corner of all inner-layer core boards for matching;
s2, stacking the inner core plates, then pressing, measuring the length and the width of each inner core plate through an X-ray target drilling machine, and collecting the length and the width data of each inner core plate;
s3, utilizing the collected length and width data of each inner-layer core plate to deduce a pre-expansion coefficient of each inner-layer core plate; and outputting the pre-expansion coefficient to an inner layer exposure tool in the mass production board manufacturing process for manufacturing, and applying the pre-expansion coefficient to the inner layer exposure tool for manufacturing to prepare a PCB (printed circuit board) multilayer board finished product.
Furthermore, the target is a concentric circle target, the center of the concentric circle target is provided with a circle center, the outer side of the circle center is provided with a plurality of circular rings, the circular rings are sequentially enlarged from inside to outside, the ring widths of the circular rings are the same, and the distances between the circular rings are the same.
Further, the target quadratic element test has a measurement error of +/-3 um within a 500mm range.
Furthermore, the diameter of the circle center of the target is 60 mils, the ring width of the ring is 14 mils, and the distance between the rings is 3 mils.
Further, the measurement accuracy of the X-ray target drilling machine is +/-10 um.
Further, in step S3, before the inner layer exposure tool is manufactured, the dimensional change of the tool film needs to be monitored by using a two-dimensional test.
Furthermore, the size difference of the finished PCB multi-layer board can be controlled within +/-4 mil.
Furthermore, the interlayer size range of the PCB multi-layer board is controlled within 4 mil.
The invention provides a method for calculating a pre-expansion coefficient during the manufacturing of an inner layer graph before lamination of a multilayer board, which is applied to ensure that the multilayer board is completely laminated and the expansion and contraction of each layer are matched, so that the difference of finished products can be effectively reduced, the loss is reduced, and the production efficiency and the product quality are improved.
It will be evident to those skilled in the art that the invention is not limited to the details of the foregoing illustrative embodiments, and that the present invention may be embodied in other specific forms without departing from the spirit or essential attributes thereof. The present embodiments are therefore to be considered in all respects as illustrative and not restrictive, the scope of the invention being indicated by the appended claims rather than by the foregoing description, and all changes which come within the meaning and range of equivalency of the claims are therefore intended to be embraced therein.
Furthermore, it should be understood that although the present description refers to embodiments, not every embodiment may contain only a single embodiment, and such description is for clarity only, and those skilled in the art should integrate the description, and the embodiments may be combined as appropriate to form other embodiments understood by those skilled in the art. It should be noted that the technical features not described in detail in the present invention can be implemented by any prior art in the field.
Claims (10)
1. A PCB multi-layer board expansion and shrinkage control method is characterized by comprising the following steps:
s1, before processing the PCB multi-layer board, arranging a group of targets at each corner of all inner-layer core boards for matching;
s2, stacking the inner core plates, then pressing, measuring the length and the width of each inner core plate through an X-ray target drilling machine, and collecting the length and the width data of each inner core plate;
s3, utilizing the collected length and width data of each inner-layer core plate to deduce a pre-expansion coefficient of each inner-layer core plate; and outputting the pre-expansion coefficient to an inner layer exposure tool in the mass production board manufacturing process for manufacturing, and applying the pre-expansion coefficient to the inner layer exposure tool for manufacturing to prepare a PCB (printed circuit board) multilayer board finished product.
2. The PCB multilayer board expansion and contraction control method of claim 1, wherein the target is a concentric circle target, the center of the concentric circle target is provided with a circle center, the outer side of the circle center is provided with a plurality of circular rings, the circular rings are sequentially enlarged from inside to outside, the ring widths of the circular rings are the same, and the distances between the circular rings are the same.
3. The PCB multi-layer board expansion and contraction control method according to claim 2, wherein a measurement error of the target quadratic element test within a 500mm range is ± 3 um.
4. The PCB multi-layer board expansion and contraction control method of claim 2, wherein the diameter of the center of the target is 20-60mil, the ring width of the ring is 10-14mil, and the distance between the rings is 1-3 mil.
5. The PCB multilayer board expansion and contraction control method of claim 4, wherein the diameter of the circle center is 40mil, the ring width of the ring is 12mil, and the distance between the rings is 2 mil.
6. The PCB multiwall sheet harmomegathus control method of claim 1, wherein the X-ray drilling target machine is an MMX-888X-ray drilling target machine.
7. The PCB multi-layer board expansion and contraction control method according to claim 1, wherein the measurement precision of the X-ray drilling target machine is +/-10 um.
8. The method for controlling the expansion and contraction of a PCB multi-layer board according to claim 1, wherein in step S3, the dimensional change of the tool film is monitored by a quadratic element test before the inner layer exposure tool is manufactured.
9. The method for controlling the expansion and contraction of the PCB multilayer board as recited in claim 8, wherein the finished dimension difference of the PCB multilayer board can be controlled within ± 4 mil.
10. The method of claim 8, wherein the range of interlayer dimension of the PCB multilayer board is controlled within 4 mil.
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911396500.0A CN110996564A (en) | 2019-12-30 | 2019-12-30 | Expansion and shrinkage control method for PCB (printed circuit board) multilayer board |
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| CN201911396500.0A CN110996564A (en) | 2019-12-30 | 2019-12-30 | Expansion and shrinkage control method for PCB (printed circuit board) multilayer board |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113423177A (en) * | 2021-05-13 | 2021-09-21 | 江西景旺精密电路有限公司 | Method for improving position precision of hole-to-hole, line-to-line and line-to-welding prevention |
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| CN101668389A (en) * | 2009-09-04 | 2010-03-10 | 东莞美维电路有限公司 | Method for making high alignment printed circuit board |
| CN102917554A (en) * | 2012-10-17 | 2013-02-06 | 无锡江南计算技术研究所 | Manufacturing method of multilayer double-copper conductor plate |
| CN103747639A (en) * | 2014-02-13 | 2014-04-23 | 遂宁市广天电子有限公司 | Manufacturing method for high-rise board |
| CN105636345A (en) * | 2016-03-18 | 2016-06-01 | 奥士康科技股份有限公司 | Multilayer PCB core material expansion and shrinkage matching method |
-
2019
- 2019-12-30 CN CN201911396500.0A patent/CN110996564A/en active Pending
Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101668389A (en) * | 2009-09-04 | 2010-03-10 | 东莞美维电路有限公司 | Method for making high alignment printed circuit board |
| CN102917554A (en) * | 2012-10-17 | 2013-02-06 | 无锡江南计算技术研究所 | Manufacturing method of multilayer double-copper conductor plate |
| CN103747639A (en) * | 2014-02-13 | 2014-04-23 | 遂宁市广天电子有限公司 | Manufacturing method for high-rise board |
| CN105636345A (en) * | 2016-03-18 | 2016-06-01 | 奥士康科技股份有限公司 | Multilayer PCB core material expansion and shrinkage matching method |
Cited By (1)
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| CN113423177A (en) * | 2021-05-13 | 2021-09-21 | 江西景旺精密电路有限公司 | Method for improving position precision of hole-to-hole, line-to-line and line-to-welding prevention |
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Application publication date: 20200410 |