CN110957399B - Method for producing semiconductor photoelectronic device - Google Patents
Method for producing semiconductor photoelectronic device Download PDFInfo
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- CN110957399B CN110957399B CN201811127157.5A CN201811127157A CN110957399B CN 110957399 B CN110957399 B CN 110957399B CN 201811127157 A CN201811127157 A CN 201811127157A CN 110957399 B CN110957399 B CN 110957399B
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
Abstract
The invention discloses a manufacturing method of a semiconductor photoelectronic device, which comprises the step of growing and forming a photoelectronic device structure on a substrate, wherein the photoelectronic device structure comprises an N-type layer, an active region light-emitting layer and a P-type layer; and further comprising: and arranging a mask on the photoelectronic device structure, and performing ion implantation on any one or more of the N-type layer, the active region light-emitting layer and the P-type layer by using the mask, so as to regulate and control the area and/or the shape of a light-emitting region of the photoelectronic device structure. The manufacturing method of the semiconductor optoelectronic device provided by the invention can improve the effective use area of a chip, reduce the side wall damage effect of materials, eliminate the optical crosstalk problem of the device, improve the luminous efficiency of the device and the like; in actual production, the space between the high-resistance isolation regions can be accurately adjusted by changing the size of the mask, so that the characteristic size of a chip is flexibly defined, and the preparation of a device with the size of several micrometers to hundreds of micrometers is realized.
Description
Technical Field
The invention particularly relates to a manufacturing method of a semiconductor optoelectronic device, and belongs to the technical field of semiconductor device preparation.
Background
The Micro-LED (Micro-LED) technology in the field of semiconductor optoelectronic devices refers to a high-density small-size LED array display technology which is integrated on the same chip and has a point spacing as low as a micron level, namely, an addressing LED which can be independently driven and lightened is used as red, green and blue sub-pixels which are independently controlled to form a display system with characteristics of high speed, high contrast and wide viewing angle. Compared with the LCD and OLED display technologies, the Micro-LED has the advantages of stable material properties, high resolution and color saturation, short response time, no image branding, simple optical system, low power consumption, strong durability and the like, so the Micro-LED is inevitably developed into a new generation of display technology.
At present, the mainstream technical route of Micro-LEDs is to utilize a Micro-processing technology to Micro-fabricate a traditional millimeter-scale LED chip into a Micro-LED chip with a size of tens of microns or even smaller, and then combine a massive parallel transfer technology (massive parallel transfer) or a monolithic integration technology (array monolithic integration) to realize RGB full-color image display. Generally, the chip performance of the Micro-LED is severely restricted by sidewall etching damage caused by dry etching (RIE, ECR, ICP) in the Micro-fabrication process, high-energy etching particles bombard material lattices and form defect dangling bonds on the material surface, and the etching particles are injected into the material, so that the sidewall damage effect caused by the sidewall etching damage can extend to the inside of the chip by a distance of several μm, which greatly reduces the usable area of the Micro-LED device, for example: the sidewall damage effect results in a usable area of the 5 μmx5 μm Micro-LED of only about 4% of the total chip size. Meanwhile, the chip side wall damage defect can form a deep energy level serving as a non-radiative recombination center in the material, so that the non-radiative recombination rate of the device is greatly increased, the peak luminous efficiency of the Micro-LED is usually lower than 10%, and the Micro-LED with the magnitude of tens of microns does not have the advantage of low power consumption at present. In addition, as the size and the adjacent spacing of the Micro-LED device are reduced, the problem of serious optical crosstalk between adjacent devices is caused by transverse light beam expansion, the color uniformity and the resolution of the Micro-LED device are greatly influenced, and color distortion is caused.
The existing Micro-LED chip structure and the manufacturing technology thereof can not enable the Micro-LED to meet the requirement of commercialization. Therefore, aiming at the problems of side wall damage effect and device optical crosstalk in the Micro-LED preparation process, the invention provides a novel preparation method for realizing the Micro-LED through ion implantation.
Disclosure of Invention
Aiming at the practical problems of the side wall damage effect of Micro-LED materials and the optical crosstalk of devices, the invention mainly aims to provide a manufacturing method of a semiconductor optoelectronic device so as to overcome the defects of the prior art.
In order to achieve the purpose, the technical scheme adopted by the invention comprises the following steps:
the embodiment of the invention provides a manufacturing method of a semiconductor optoelectronic device, which comprises the steps of growing and forming an optoelectronic device structure on a substrate, wherein the optoelectronic device structure comprises an N-type layer, an active region light-emitting layer and a P-type layer; and further comprising: and arranging a mask on the photoelectronic device structure, and performing ion implantation on any one or more of the N-type layer, the active region light-emitting layer and the P-type layer by using the mask, so as to regulate and control the area and/or the shape of a light-emitting region of the photoelectronic device structure.
Compared with the prior art, the manufacturing method of the semiconductor optoelectronic device provided by the invention has the advantages that the process is simple and reliable, the method is compatible with the prior art, the effective use area of a chip can be increased, the material side wall damage effect is reduced, the optical crosstalk problem of the device is eliminated, the luminous efficiency of the device is improved, and the like; in actual production, the space between the high-resistance isolation regions can be accurately adjusted by changing the size of the mask, so that the characteristic size of a chip is flexibly defined, and the preparation of a device with the size of several micrometers to hundreds of micrometers is realized.
Drawings
Fig. 1 is a schematic distribution diagram of an ion implantation region in a method of manufacturing a semiconductor optoelectronic device according to embodiment 1 of the present invention;
FIG. 2 is a schematic diagram of a device structure formed in step two of the method for manufacturing a semiconductor optoelectronic device in embodiment 1 of the present invention
FIG. 3 is a schematic structural diagram of a device formed in step four of the method for manufacturing a semiconductor optoelectronic device in embodiment 1 of the present invention
FIG. 4 is a schematic structural diagram of a device formed in step five of the method for manufacturing a semiconductor optoelectronic device in embodiment 1 of the present invention
FIG. 5 is a schematic structural diagram of a semiconductor optoelectronic device fabricated and formed in example 1 of the present invention;
fig. 6 is a schematic distribution diagram of ion implantation regions in the method of manufacturing a semiconductor optoelectronic device according to embodiment 2 of the present invention;
FIG. 7 is a schematic structural diagram of a semiconductor optoelectronic device fabricated and formed in embodiment 2 of the present invention;
fig. 8 is a schematic distribution diagram of ion implantation regions in the method of manufacturing a semiconductor optoelectronic device according to embodiment 3 of the present invention;
FIG. 9 is a schematic structural view of a semiconductor optoelectronic device fabricated and formed in example 3 of the present invention;
fig. 10 is a schematic distribution diagram of ion implantation regions in the method of manufacturing a semiconductor optoelectronic device according to embodiment 4 of the present invention;
fig. 11 is a schematic distribution diagram of ion implantation regions in the method of manufacturing a semiconductor optoelectronic device according to embodiment 4 of the present invention;
fig. 12 is a schematic structural view of a semiconductor optoelectronic device fabricated and formed in embodiment 4 of the present invention.
Detailed Description
In view of the deficiencies in the prior art, the inventors of the present invention have made extensive studies and extensive practices to provide technical solutions of the present invention. The technical solution, its implementation and principles, etc. will be further explained as follows.
The embodiment of the invention provides a manufacturing method of a semiconductor optoelectronic device, which comprises the steps of growing and forming an optoelectronic device structure on a substrate, wherein the optoelectronic device structure comprises an N-type layer, an active region light-emitting layer and a P-type layer; and further comprising: and arranging a mask on the photoelectronic device structure, and performing ion implantation on any one or more of the N-type layer, the active region light-emitting layer and the P-type layer by using the mask, so as to regulate and control the area and/or the shape of a light-emitting region of the photoelectronic device structure.
Further, the manufacturing method comprises the following steps: during the ion implantation, the depth and width of the ion implantation region are controlled at least by independently adjusting the energy and/or dose of the implanted ions.
Further, the manufacturing method comprises the following steps: in the ion implantation process, part or all of the region of the optoelectronic device structure, which is in contact with implanted ions, forms an implanted isolation region in a high-resistance state, and the implanted isolation region surrounds and forms the light emitting region.
In some specific embodiments, the injection isolation region includes a first injection isolation region and a second injection isolation region, the first injection isolation region continuously penetrates through the P-type layer and the active region light-emitting layer and reaches the N-type layer, and the second injection isolation region continuously penetrates through the P-type layer, the active region light-emitting layer and the N-type layer.
Further, the manufacturing method comprises the following steps: in the ion implantation process, an implantation doping area is formed on the part or the whole area of the photoelectronic device structure and the ion implantation contact area, and the implantation doping area continuously penetrates through the P-type layer and the active area light-emitting layer and reaches the N-type layer, so that an N-type conductive table-board is formed.
Further, the implantation ions for forming the implantation doping region include, but are not limited to, silicon ions.
In some more specific embodiments, the injection isolation region includes a third isolation injection region that continuously penetrates the P-type layer, the active region light emitting layer, the N-type layer, and the substrate.
Further, the manufacturing method further comprises the following steps: and performing secondary ion implantation in the implantation isolation region or performing ion implantation between two implantation isolation regions of adjacent semiconductor optoelectronic devices to form an ion implantation barrier layer.
Further, the implantation ions forming the implantation isolation region and the ion implantation barrier layer include any one of hydrogen ions, helium ions, nitrogen ions, and fluorine ions, but are not limited thereto.
Further, the area of the light emitting region is controlled to be micrometer scale.
Further, the material of the mask includes any one of photoresist, silicon dioxide, silicon nitride, and metal, but is not limited thereto.
Furthermore, the manufacturing method also comprises the step of manufacturing electrodes matched with the P-type layer and the N-type layer of the photoelectronic device structure.
Furthermore, the optoelectronic device structure comprises a buffer layer, a high-resistance layer, an N-type layer, an active region light-emitting layer and a P-type layer.
Further, the material of the substrate includes any one of sapphire, gallium nitride, silicon carbide and silicon, but is not limited thereto.
Further, the semiconductor optoelectronic device includes any one of Micro-LED, VCSEL, SLD, LED device, but is not limited thereto.
Further, the structure of the semiconductor optoelectronic device includes any one of a front-loading structure, a flip-chip structure and a vertical structure, but is not limited thereto.
The technical solution, the implementation process and the principle thereof will be further explained with reference to the drawings and the specific embodiments.
According to the manufacturing method of the semiconductor optoelectronic device, the LED structure is epitaxially grown on different substrate materials through a metal organic chemical vapor deposition method, the traditional dry etching process is replaced by an ion implantation method, and meanwhile, the depth of an ion implantation area is accurately controlled by independently adjusting the energy and the dosage of different implanted ions, so that the ion implantation isolation and the implantation doping of the semiconductor optoelectronic device are realized.
The manufacturing method of the semiconductor optoelectronic device provided by the embodiment of the invention adopts the ion implantation isolation and doping process to replace the etching processes of mesa isolation, N conductive mesa and the like in the traditional manufacturing process, and the ion implantation has the characteristics of large-area doping uniformity, high directionality, low transverse effect and the like to avoid etching damage to the chip, so that the effective use area of the chip is obviously increased, the peak light-emitting efficiency of the chip is improved, and meanwhile, the ion implantation barrier layer is further adopted to avoid optical crosstalk between adjacent devices.
According to the embodiment of the invention, the high-resistance isolation region is formed by injecting hydrogen (or helium, nitrogen and fluorine) ions, and the depth of the high-resistance isolation region is adjusted according to the actual thickness of the LED epitaxial structure, so that the high-resistance isolation region can be used for mutual isolation among devices, and can also be used for isolation among a P-type layer material, an active region light-emitting layer material and an N-type conductive table surface.
In the method for manufacturing the semiconductor optoelectronic device, the ion implantation process can select a proper ion source for N-type or P-type doping, a high-conductivity region (i.e. an implanted doping region) is formed by silicon ion implantation, and the depth of the high-conductivity region is adjusted according to the actual thickness of the LED epitaxial structure to form an N-type conductive table top.
Due to the low temperature of the ion implantation process, photoresist, media (silicon dioxide, silicon nitride and the like) or metal (such as aluminum and the like) can be selected as a mask for ion implantation, which provides great flexibility for a self-alignment masking technology in the preparation of semiconductor optoelectronic devices, so that the distance between high-resistance state isolation regions can be accurately adjusted by changing the size of the mask in actual production, thereby flexibly defining the characteristic size of a chip and realizing the preparation of devices with the size of several micrometers to hundreds of micrometers.
The embodiment of the invention adopts the ion injection blocking layer to avoid the optical crosstalk between the adjacent semiconductor optoelectronic devices, the ion injection blocking layer can be realized by carrying out common ion injection on the injection blocking layer, and can also be realized by carrying out ion injection in the area between the injection blocking layers of the adjacent devices, and the ion injection blocking layer can effectively avoid the transverse light beam expansion, thereby eliminating the optical crosstalk problem between the adjacent devices and greatly improving the color uniformity and the resolution of the semiconductor optoelectronic devices.
Furthermore, the embodiment of the invention is suitable for the preparation of high-performance chips based on the forward mounting structure, the inverted mounting structure and the vertical structure of different substrates by adjusting the type of the implanted ions and the sequence of the implantation, and is very favorable for the industrialized preparation of semiconductor optoelectronic devices.
The following three examples are given below based on a method of fabricating a semiconductor optoelectronic device.
Production equipment and materials:
1. the planet disk type 2-inch 11-piece Metal Organic Chemical Vapor Deposition (MOCVD) preparation system is used for preparing semiconductor optoelectronic devices such as Micro-LEDs, light-emitting diodes, super-radiation light-emitting diodes, vertical cavity surface generation lasers and the like;
2. plasma Enhanced Chemical Vapor Deposition (PECVD), Low Pressure Chemical Vapor Deposition (LPCVD), and magnetron sputtering are used to prepare the mask material required for the ion implantation process;
3. the ion implanter is used for ion implantation of elements such as hydrogen, helium, nitrogen, fluorine, and silicon.
Example 1: Micro-LED (light emitting diode) forward mounting structure
Referring to fig. 1 to 5, a specific preparation process of a Micro-LED chip normal mounting structure based on ion implantation includes the following steps:
the method comprises the following steps: sequentially epitaxially growing a buffer nucleation layer material, an N-type layer material, an active region light-emitting layer material and a P-type layer material on a sapphire substrate material by utilizing MOCVD (metal organic chemical vapor deposition) to form an LED structure;
step two: defining an ion implantation area by utilizing a photoresist (or silicon dioxide, silicon nitride, metal aluminum and the like) mask, forming an implantation isolation area 1 in a high resistance state by implanting hydrogen (or helium, nitrogen and fluorine) ions, and adjusting the energy and the dose of implanted ions to accurately control the ion implantation depth, so that the implantation isolation area 1 penetrates through a P-type layer and an active region light-emitting layer to reach the material of an N-type layer;
step three: further carrying out secondary ion implantation on the ion implantation isolation region 1 to form an ion implantation barrier layer of the device;
step four: defining an ion implantation area by utilizing a photoresist (or silicon dioxide, silicon nitride, metal aluminum and the like) mask, forming an implantation doping area 2 by Si ion implantation, and adjusting the energy and the dosage of implanted ions to accurately control the ion implantation depth, so that the implantation doping area 2 penetrates through the materials of a P-type layer and an active area light-emitting layer to reach the materials of an N-type layer to form an N-type conductive table board;
step five: defining an ion implantation area by utilizing a photoresist (or silicon dioxide, silicon nitride, metal aluminum and the like) mask, forming an implantation isolation area 3 in a high-resistance state by implanting hydrogen (or helium, nitrogen and fluorine) ions, and adjusting the energy and the dosage of implanted ions to accurately control the ion implantation depth, so that the depth of the implantation isolation area 3 reaches the sapphire substrate to form the isolation of an LED device;
step six: further carrying out secondary ion implantation on the ion implantation isolation region 3 to form an ion implantation barrier layer of the device;
step seven: n, P electrode metals are respectively formed by an electron beam evaporation process, and rapid thermal annealing is carried out to form ohmic contact, so that the preparation of the Micro-LED device is completed.
Example 2: Micro-LED (light emitting diode) forward mounting structure
Referring to fig. 6-7, a specific preparation process of the Micro-LED chip front-mounting structure based on ion implantation includes the following steps:
the method comprises the following steps: sequentially epitaxially growing a buffer nucleation layer material, a high-resistance layer material, an N-type layer material, an active region light-emitting layer and a P-type layer material on a sapphire substrate by using MOCVD (metal organic chemical vapor deposition) to form an LED structure;
step two: defining an ion implantation area by utilizing a photoresist (or silicon dioxide, silicon nitride, metal aluminum and the like) mask, forming an implantation isolation area 4 in a high resistance state by implanting hydrogen (or helium, nitrogen, fluorine) ions, and adjusting the energy and the dose of implanted ions to accurately control the ion implantation depth, so that the implantation isolation area 4 penetrates through the materials of a P-type layer and an active region light-emitting layer to enter the materials of an N-type layer;
step three: further carrying out secondary ion implantation on the ion implantation isolation region 4 to form an ion implantation isolation layer of the LED device;
step four: defining an ion implantation area by utilizing a photoresist (or silicon dioxide, silicon nitride, metal aluminum and the like) mask, forming an implantation doping area 5 by Si ion implantation, and adjusting the energy and the dosage of implanted ions to accurately control the ion implantation depth, so that the implantation doping area 5 penetrates through the materials of a P-type layer and an active area light-emitting layer to reach the materials of an N-type layer to form an N-type conductive table board;
step five: defining an ion implantation area by utilizing a photoresist (or silicon dioxide, silicon nitride, metal aluminum and the like) mask, forming an ion implantation isolation area 7 in a high-resistance state by implanting hydrogen (or helium, nitrogen and fluorine) ions, and adjusting the energy and the dosage of implanted ions to accurately control the ion implantation depth, so that the depth of the implanted isolation area 6 reaches the high-resistance layer to form the isolation of an LED device;
step six: further carrying out secondary ion implantation on the ion implantation isolation region 6 to form an ion implantation barrier layer of the device;
step seven: n, P electrode metals are respectively formed by an electron beam evaporation process, and rapid thermal annealing is carried out to form ohmic contact, so that the preparation of the Micro-LED device is completed.
Example 3: Micro-LED vertical structure
Referring to fig. 8-9, the specific preparation process steps of the Micro-LED chip vertical structure based on ion implantation are as follows:
the method comprises the following steps: sequentially epitaxially growing an N-type layer material, an active region light-emitting layer and a P-type layer material on a GaN or SiC substrate by utilizing MOCVD (metal organic chemical vapor deposition) to form an LED structure;
step two: defining an ion implantation area by using a photoresist mask, forming an ion implantation isolation area 7 in a high-resistance state by implanting hydrogen (or helium, nitrogen and fluorine) ions, and adjusting the energy and the dose of implanted ions to accurately control the ion implantation depth, so that the implanted isolation area 7 completely penetrates through the GaN or SiC substrate to form the isolation of an LED device;
step three: further carrying out secondary ion implantation on the ion implantation isolation region 7 to form an ion implantation barrier layer of the device;
step four: n, P electrode metals are respectively formed by an electron beam evaporation process, and rapid thermal annealing is carried out to form ohmic contact, so that the preparation of the Micro-LED device is completed.
Example 4: Micro-LED flip-chip structure
Referring to fig. 10-12, a specific fabrication process of the ion implantation-based Micro-LED flip chip structure includes the following steps:
the method comprises the following steps: sequentially epitaxially growing an N-type layer material, an active region light-emitting layer and a P-type layer material on a sapphire substrate by using MOCVD (metal organic chemical vapor deposition) to form an LED structure, and then removing the sapphire substrate and thinning the N-type layer material by using a stripping technology;
step two: defining an ion implantation area by using a photoresist mask, forming a high-resistance ion implantation isolation area 8 by implanting hydrogen (or helium, nitrogen and fluorine) ions, and adjusting the energy and the dose of implanted ions to accurately control the ion implantation depth, so that the depth of the implanted isolation area 8 completely penetrates through an N-type layer material to form the isolation of an LED device;
step three: further carrying out secondary ion implantation on the ion implantation isolation region 8 to form an ion implantation barrier layer of the device;
step four: n, P electrode metals are respectively formed by an electron beam evaporation process, and rapid thermal annealing is carried out to form ohmic contact, so that the preparation of the Micro-LED device is completed.
As can be seen from embodiments 1 to 4, the method of ion implantation can completely avoid the side wall etching damage to the chip caused by the etching process in the conventional mesa isolation and N mesa formation processes, thereby significantly increasing the effective usable area of the chip and improving the peak light-emitting efficiency of the chip, and meanwhile, the barrier layer formed by the method of ion implantation can effectively absorb the lateral light propagation, thereby effectively eliminating the optical crosstalk problem of the semiconductor optoelectronic device.
The ion implantation isolation, doping and isolation process adopted by the embodiment of the invention is not only applied to Micro-LEDs, but also applied to other III-nitride light emitting devices, such as light emitting diodes, super-radiation light emitting diodes, vertical cavity surface generation lasers and the like. Furthermore, the invention is suitable for the preparation of high-performance chips based on the forward mounting structure, the inverted mounting structure and the vertical structure of different substrates by adjusting the type of the implanted ions and the implantation sequence, and is beneficial to the industrialized preparation of semiconductor optoelectronic devices.
The method has the advantages of simple and reliable process, compatibility with the prior art, improvement of the effective use area of the chip, reduction of the material side wall damage effect, elimination of the optical crosstalk problem of the device, improvement of the light emitting efficiency of the device and the like.
It should be understood that the above-mentioned embodiments are merely illustrative of the technical concepts and features of the present invention, which are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and therefore, the protection scope of the present invention is not limited thereby. All equivalent changes and modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.
Claims (10)
1. A manufacturing method of a semiconductor photoelectronic device comprises the steps of growing and forming a photoelectronic device structure on a substrate, wherein the photoelectronic device structure comprises an N-type layer, an active region light-emitting layer and a P-type layer; it is characterized by also comprising: arranging a mask on the photoelectronic device structure, and performing ion implantation on any one or more of the N-type layer, the active region light-emitting layer and the P-type layer by using the mask so as to regulate and control the area and/or shape of a light-emitting region of the photoelectronic device structure,
in the ion implantation process, forming an injection isolation region in a high-resistance state in a part or all of a region, which is in contact with implanted ions, of the photoelectronic device structure, wherein the injection isolation region surrounds and forms the light emitting region, the injection isolation region comprises a first injection isolation region, a second injection isolation region and a third injection isolation region, the first injection isolation region continuously penetrates through the P-type layer and the active region light emitting layer and reaches the N-type layer, the second injection isolation region continuously penetrates through the P-type layer, the active region light emitting layer and the N-type layer, and the third injection isolation region continuously penetrates through the P-type layer, the active region light emitting layer, the N-type layer and the substrate;
performing secondary ion implantation in the implantation isolation region or performing ion implantation between two implantation isolation regions of adjacent semiconductor optoelectronic devices to form an ion implantation barrier layer;
and in the ion implantation process, forming an implantation doping region on the structure of the photoelectronic device and part or all of the region of the contact region of the implanted ions, wherein the implantation doping region continuously penetrates through the P-type layer and the active region light-emitting layer and reaches the N-type layer, so as to form an N-type conductive table-board;
wherein, in the ion implantation process, the depth and the width of the ion implantation area are controlled at least by independently adjusting the energy and/or the dose of the implanted ions.
2. The method of manufacturing according to claim 1, wherein: the implanted ions that form the implanted doped region comprise silicon ions.
3. The method of manufacturing according to claim 1, wherein: the implantation ions forming the implantation isolation region and the ion implantation barrier layer include any one of hydrogen ions, helium ions, nitrogen ions, and fluorine ions.
4. The method of manufacturing according to claim 1, wherein: the area of the light emitting region is controlled to be micrometer scale.
5. The method of manufacturing according to claim 1, wherein: the mask is made of any one of photoresist, silicon dioxide, silicon nitride and metal.
6. The method of manufacturing according to claim 1, further comprising: and manufacturing electrodes matched with the P-type layer and the N-type layer of the photoelectronic device structure.
7. The method of manufacturing according to claim 1, wherein: the photoelectronic device structure comprises a buffer layer, a high-resistance layer, an N-type layer, an active region light-emitting layer and a P-type layer.
8. The method of manufacturing according to claim 1, wherein: the substrate is made of any one of sapphire, gallium nitride, silicon carbide and silicon.
9. The method of manufacturing according to claim 1, wherein: the semiconductor optoelectronic device comprises any one of a VCSEL device, an SLD device and an LED device.
10. The method of manufacturing according to claim 1, wherein: the structure of the semiconductor optoelectronic device includes any one of a face-up structure, a flip-chip structure, and a vertical structure.
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