CN110957204A - Method for manufacturing III-nitride optoelectronic device - Google Patents
Method for manufacturing III-nitride optoelectronic device Download PDFInfo
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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Abstract
The invention discloses a method for manufacturing a III-nitride optoelectronic device. The manufacturing method comprises the steps of growing and forming an optoelectronic device structure on a substrate, wherein the optoelectronic device structure comprises an N-type layer, an active region light-emitting layer and a P-type layer; and further comprising: and arranging a mask on the optoelectronic device structure, and selectively oxidizing at least one or more of the N-type layer, the active region light-emitting layer and the P-type layer by using the mask, thereby regulating and controlling the area and/or shape of a light-emitting region of the optoelectronic device structure. According to the manufacturing method of the III-nitride photoelectronic device, the light emitting area of the device is controlled by adopting the oxidation process, the oxidation process has the characteristics of controllable width and depth and the like, the etching damage to the side wall of the chip is avoided by the low transverse effect, the outlet area of the active area of the device can be controlled at the micron level, the shape of the light emitting hole can be controlled, the active area is not damaged, and the peak value light emitting efficiency of the chip can be improved.
Description
Technical Field
The invention particularly relates to a manufacturing method of a III-group nitride optoelectronic device, belonging to the technical field of semiconductor device preparation.
Background
Group III nitride optoelectronic devices have been rapidly developed and widely used due to their unique advantages and excellent performance, for example, GaN-based LEDs have been widely used in the fields of general illumination, backlight sources of display screens, signal indication lamps, etc., and the typical size of the LED chips used is in the order of mm. By further reducing the size of the LED chip, for example to dozens of micrometers, Micro-LEDs are prepared, and hundreds of Micro-LEDs can be prepared in the millimeter-scale range to form a Micro-LED array.
Because the Micro-LED has the advantages of localized light emission, uniform current expansion, high saturation current density, high output light power density, high photoelectric modulation bandwidth and the like, the Micro-LED has potential application prospects in multiple fields including Micro-LED display, high-speed parallel visible light communication, optogenetics, maskless lithography, high-voltage lighting chips, optical tweezers and the like.
With the popularization of mobile internet and intelligent devices, people have increasingly strong demand for diversification of information presentation modes. How to achieve better display in small-sized devices becomes a problem to be solved in a great number of application fields. In the display field, compared with the LCD (liquid crystal display) and OLED (organic light emitting diode) display technologies, the Micro-LED display has the advantages of high luminous efficiency, high brightness, high contrast, short response time and the like, and has great market potential.
The Micro-LED display is accepted behind the traditional LCD and OLED and is regarded as a new generation display technology which can possibly subvert the industry, the structure is a miniaturized LED array, namely, the LED structure is designed to be thinned, miniaturized and arrayed, so that the volume of the Micro-LED display is about 1% of the size of the current mainstream LED, and the distance between pixel points is reduced from the original millimeter level to the micron level. On another technical level, compared with the OLED, the Micro-LED can make the LED unit smaller than 100 micrometers, thereby solving the problem of screen burning, prolonging the service life, and meanwhile, being thinner and more power-saving, and the brightness, screen response time, resolution and display effect are far superior to the OLED.
In the aspect of visible light communication, the photoelectric modulation bandwidth and the communication rate of a single Micro-LED are far higher than those of a common lighting LED, and the Micro-LED array also has the advantage of parallel communication. In the field of optogenetics, Micro-LED arrays can be integrated on a needle point, the size of each Micro-LED is close to that of a neuron cell, the needle point can be inserted into the cerebral cortex of a white mouse in a low-damage mode, the neuron is stimulated by multi-point light of the Micro-LED arrays, a neural network is controlled, and the Micro-LED array is expected to be used for treating diseases such as Parkinson's syndrome, blindness and the like.
The LED scaling and matrixing techniques refer to high-density small-size LED array display techniques with pixel dot spacing down to micron order integrated on the same chip, i.e., individually driven and lighted addressed LED light sources are used as independently controlled red, green and blue sub-pixels to form a display system with high speed, high contrast and wide viewing angle characteristics. Compared with the LCD and OLED display technologies, the Micro-LED has the advantages of stable material property, high resolution and color saturation, short response time, no image branding, simple optical system, low power consumption, strong durability and the like, so the Micro-LED is considered to be a new generation display technology which can replace the LED small-distance display.
At present, the mainstream technical route of Micro-LEDs is to utilize a Micro-processing technology to Micro-fabricate a traditional millimeter-scale LED chip into a Micro-LED chip with a size of tens of microns or even smaller, and then combine a massive parallel transfer technology (massively parallel transfer) or a monolithic integration technology (array monolithic integration) to realize RGB full-color image display. However, the performance of the Micro-LED chip is severely restricted by the sidewall etching damage caused by the dry etching process in the Micro-processing technology, the high-energy etching particles bombard the material lattice and form a defect dangling bond on the material surface, and the etching particles are injected into the material, so that the sidewall damage effect caused by the sidewall etching damage can extend to the inside of the chip for a distance of several μm, which greatly reduces the usable area of the Micro-LED device, for example: the sidewall damage effect results in a usable area of the 5 μm x 5 μm Micro-LED of only about 4% of the total chip size. Meanwhile, the chip side wall damage defect can form a deep energy level serving as a non-radiative recombination center in the material, so that the non-radiative recombination rate of the device is greatly increased, the peak luminous efficiency of the Micro-LED is usually lower than 10%, and the Micro-LED with the magnitude of tens of microns does not have the advantage of low power consumption at present.
The main method for improving the light emitting efficiency of the Micro-LED is to reduce the damage defect of the side wall of the chip and to enable the current to be transported away from the edge of the chip, and the current method for designing a novel chip structure and improving the manufacturing technology still cannot enable the Micro-LED to meet the requirement of commercialization.
Disclosure of Invention
The invention mainly aims to provide a III-nitride optoelectronic device, a manufacturing method and application thereof, so as to overcome the defects of the prior art.
In order to achieve the purpose, the technical scheme adopted by the invention comprises the following steps:
the embodiment of the invention provides a manufacturing method of a III-nitride optoelectronic device, which comprises the steps of growing and forming an optoelectronic device structure on a substrate, wherein the optoelectronic device structure comprises an N-type layer, an active region light-emitting layer and a P-type layer; and the manufacturing method further comprises the following steps: and arranging a mask on the optoelectronic device structure, and selectively oxidizing at least one or more of the N-type layer, the active region light-emitting layer and the P-type layer by using the mask, thereby regulating and controlling the area and/or shape of a light-emitting region of the optoelectronic device structure.
Compared with the prior art, the method for manufacturing the III-nitride optoelectronic device provided by the embodiment of the invention has the advantages that the oxidation process is adopted to replace the etching process in the traditional III-nitride optoelectronic device preparation process to control the light emitting area of the device, the oxidation process has the characteristics of controllable width and depth and the like, the low transverse effect avoids etching damage to the side wall of the chip, the outlet area of the active area of the device can be controlled at the micron level, the shape of a light emitting hole can be controlled, the active area is not damaged, and the peak light emitting efficiency of the chip can be improved.
Drawings
Fig. 1 is a schematic structural view of a method for manufacturing a group III nitride optoelectronic device according to embodiment 1 of the present invention.
Detailed Description
In view of the deficiencies in the prior art, the inventors of the present invention have made extensive studies and extensive practices to provide technical solutions of the present invention. The technical solution, its implementation and principles, etc. will be further explained as follows.
The embodiment of the invention provides a manufacturing method of a III-nitride optoelectronic device, which comprises the steps of growing and forming an optoelectronic device structure on a substrate, wherein the optoelectronic device structure comprises an N-type layer, an active region light-emitting layer and a P-type layer; and the manufacturing method further comprises the following steps: and arranging a mask on the optoelectronic device structure, and selectively oxidizing at least one or more of the N-type layer, the active region light-emitting layer and the P-type layer by using the mask, thereby regulating and controlling the area and/or shape of a light-emitting region of the optoelectronic device structure.
Further, the manufacturing method comprises the following steps: in the selective oxidation process, at least the width and depth of the oxidized region are controlled by independently adjusting the temperature and/or atmosphere of the oxidation process.
Preferably, the temperature of the oxidation process is 600-2Atmosphere, O2And N2Mixed atmosphere, N2Any one of an O atmosphere and an air atmosphere or a combined atmosphere of two or more of them is not limited thereto.
Preferably, the oxidized region has a width of 10nm to 10 μm and a depth of 10nm to 10 μm.
Further, the manufacturing method comprises the following steps: in the selective oxidation process, gallium nitride and/or gallium nitride alloy materials in the contact area of the optoelectronic device structure and the oxidation reagent are oxidized to form high-resistance gallium oxide.
Further, the oxidizing agent includes, but is not limited to, oxygen or a mixture of oxygen and nitrogen.
Further, the area of the light emitting region is controlled to be micrometer scale.
Further, the material of the mask includes any one of silicon dioxide, silicon nitride, aluminum oxide, and photoresist, but is not limited thereto.
Further, the manufacturing method comprises the following steps: and forming an ion injection region in the photoelectronic device structure by adopting an ion injection mode, wherein the ion injection region continuously penetrates through the P-type layer and the active region light-emitting layer and reaches the N-type layer, and then arranging a mask on the photoelectronic device structure and carrying out selective oxidation.
In some more specific embodiments, the manufacturing method comprises: and processing a mesa structure on the optoelectronic device structure, then arranging a mask on the optoelectronic device structure, and carrying out the selective oxidation.
In some more specific embodiments, the selective oxidation specifically comprises: and in an oxidizing atmosphere, laterally oxidizing the optoelectronic device structure with the mesa structure, and controlling the light emitting area and/or shape of the light emitting area at least by controlling the oxidizing time.
Further, the selective oxidation manner includes a wet oxidation, a dry oxidation, or a dry-wet mixed oxidation, but is not limited thereto.
Furthermore, the manufacturing method also comprises the step of manufacturing electrodes matched with the P-type layer and the N-type layer of the photoelectronic device structure.
In some more specific embodiments, the optoelectronic device structure includes a buffer layer, an N-type layer, a quantum well light emitting layer, an electron blocking layer, and a P-type layer sequentially formed on a substrate.
Further, the material of the buffer layer includes, but is not limited to, GaN.
Preferably, the material of the N-type layer includes, but is not limited to, N-GaN.
Preferably, the quantum well light emitting layer includes InGaN/GaN multiple quantum wells or AlGaN/GaN multiple quantum wells, but is not limited thereto.
Preferably, the material of the electron blocking layer includes AlGaN, but is not limited thereto.
Preferably, the material of the P-type layer includes P-GaN, but is not limited thereto.
Preferably, the material of the substrate includes any one of Si, GaN, SiC, SOI, and sapphire, but is not limited thereto.
Further, the group III nitride optoelectronic device includes any one of group III nitride Micro-LED, VCSEL, SLD, LED device, but is not limited thereto.
Further, the structure of the group III nitride optoelectronic device includes any one of a front-mount structure, a flip-chip structure, and a vertical structure, but is not limited thereto.
The technical solution, the implementation process and the principle thereof will be further explained with reference to the drawings and the specific embodiments.
Aiming at the requirements of the III-nitride photoelectronic device on the light emitting area and the practical problems of etching side wall damage effect and low luminous efficiency in the prior Micro-LED, VCSEL, SLD, LED and other devices, the invention provides a process method for manufacturing the devices without etching by ion implantation.
The invention epitaxially grows the light-emitting quantum well structure on different commercial-grade substrate materials by the methods of MOCVD (metal organic chemical vapor deposition), MBE (molecular beam epitaxy) and the like, replaces the traditional dry etching process (RIE, ECR and ICP) by adopting an oxidation method, accurately controls the width and the depth of an oxidized region by independently adjusting the temperature and the atmosphere of the oxidation process, realizes the accurate control of the light-emitting area of the III-nitride photoelectronic device, carries out different processes aiming at different devices and meets the actual requirements.
The invention can accurately adjust the area, the interval and the shape of the oxidation region by adjusting the size of the mask in the actual production. Because the temperature of the oxidation process is relatively high, silicon dioxide, silicon nitride and aluminum oxide are preferably selected as the oxidation mask, the characteristic size of the device can be flexibly controlled by adjusting different sizes of the mask, and the device with the size of several micrometers to hundreds of micrometers can be prepared.
In some specific embodiments, the active region of the device can be isolated by an etching method, i.e., a mesa is formed, then lateral oxidation is performed, the oxidation is performed from the side to the middle in an oxidizing atmosphere, parameters such as time and the like are controlled, and the light emitting region in the middle is reserved, so that the control of the light emitting area, the shape and the like is realized, and the preparation of the device emitting light in a micro scale is realized.
Furthermore, the process method provided by the invention is suitable for the preparation and application of high-performance III-nitride optoelectronic devices based on the normal structure, the inverted structure and the vertical structure of the same substrate, and is very beneficial to the industrial development of the devices.
The main structure of the III-nitride photoelectronic device provided by the embodiment of the invention is grown on Si, sapphire, GaN, SiC, SOI and other substrates, and comprises a GaN buffer layer, an n-GaN, InGaN/GaN multi-quantum well or AlGaN/GaN multi-quantum well or other light-emitting active region structures, an AlGaN electronic barrier layer and a p-GaN layer.
Example 1: fabrication of Micro-LED
Referring to fig. 1, step one: sequentially epitaxially growing a buffer layer material, an N-type layer material, an active region light-emitting layer material and a P-type layer material of the LED structure on a substrate by using MOCVD (metal organic chemical vapor deposition) to form the LED structure;
wherein, the substrate material can be sapphire, silicon, SOI, silicon carbide, gallium nitride, gallium oxide, glass and the like, and the thickness of the substrate is 100-5000 μm; the epitaxial growth equipment can be various CVD, PVD, MBE and the like; the N-type layer material can be GaN doped with Si or other impurities or other multi-element alloy materials; the active region luminescent layer material can be InGaN/GaN multiple quantum well or AlGaN/GaN multiple quantum well or other luminescent material structure; the P-type layer material can be GaN doped with Mg or other impurities or other multi-element alloy materials;
step two: defining an ion implantation area by using an implantation mask, forming the high-resistance ion implantation area by adopting an H, He, F or N plasma implantation mode, and adjusting the energy and the dose of implanted ions to accurately control the ion implantation depth, so that the ion implantation area penetrates through a P-type layer material and an active area light-emitting layer material to reach an N-type layer material;
the implantation mask can be photoresist or other materials such as silicon oxide, the thickness and the type of the implantation mask are determined according to the ion implantation depth, and the thickness can be 0.1-20 μm; the implanted ion species may be F, N, H, He, O, or the like; the energy of ion implantation is 1KeV-100 MeV; the width of the ion implantation area is 0.1-1 μm, and the depth is 10nm-10 μm; the resistance of the high-resistance state ion implantation area is more than 1M omega;
step three: setting an oxidation mask to block a light emergent area of the device, then controlling parameters such as time and the like in an oxidation atmosphere, and oxidizing other areas except the middle light emergent area so as to realize the control of the light emergent area, the shape and the like;
wherein, the material of the oxidation mask can be silicon oxide or silicon nitride, and the thickness of the oxidation mask is 10nm-1 μm; the oxidizing atmosphere can be formed by mixing any one or more than two of oxygen, oxygen and nitrogen mixed gas, air and laughing gas; the oxidation time can be 10min-10 hr; the width of the oxidation area is 10nm-10 μm, and the depth is 10nm-10 μm; the shape of the light-emitting surface can be circular, oval, triangular or other polygons;
step four: n, P electrode metals are respectively formed by an electron beam evaporation process, and rapid thermal annealing is carried out to form ohmic contact so as to finish the preparation of the Micro-LED device;
wherein, the N-type electrode material can be Ti/Al/Ni/Au (i.e. a Ti layer, an Al layer, a Ni layer and an Au layer which are sequentially stacked, the same applies below), and the thickness of each layer is 1nm-1 μm; the P-type electrode material can be Ti/Pt/Au, and the thickness of each layer is 1nm-1 μm; the rapid annealing temperature is 500-1000 ℃.
Example 2: vertical structure light emitting device
The substrate material, the N-type layer material, the active region light-emitting layer material, the P-type layer material, and the like in embodiment 2, and the manufacturing conditions, processes, and the like are substantially the same as those in embodiment 1;
the method comprises the following steps: sequentially epitaxially growing an N-type layer material, an AlGaN or InGaN quantum well active region light-emitting layer material and a P-type layer material on a GaN or Si substrate by using MOCVD (metal organic chemical vapor deposition), and forming a light-emitting device structure;
step two: defining an active area table top by using photoresist or silicon oxide as a mask, and performing table top etching with a certain depth on the periphery of the active area table top by an etching process until the bottom electrode material layer is exposed or a substrate serving as the bottom electrode material layer is exposed;
step three: in an oxidizing atmosphere, oxidizing from the side surface to the middle in all directions, controlling parameters such as time and the like, and reserving a light emergent area in the middle so as to realize the control of the light emergent area, the shape and the like;
step four: n, P electrode metals are respectively formed by an electron beam evaporation process, and rapid thermal annealing is carried out to form ohmic contact, so that the preparation of the vertical light-emitting device is completed.
The method has the advantages of simple, stable and reliable process, reasonable design of the preparation process of the III-nitride optoelectronic device based on the oxidation process, reduction of the side wall damage effect in the traditional etching process, improvement of the luminous efficiency of the device, compatibility with the existing process and the like.
According to the manufacturing method of the III-nitride optoelectronic device provided by the embodiment of the invention, an oxidation process is adopted to replace an etching process in the traditional III-nitride optoelectronic device manufacturing process to control the light emitting area of the device, the oxidation process has the characteristics of controllable width and depth and the like, the low transverse effect avoids etching damage to the side wall of a chip, the area of an outlet (namely a light emitting area) of an active area of the device can be controlled at the micron level, the shape of a light emitting hole can be controlled, the active area is not damaged, and the peak light emitting efficiency of the chip can be improved.
The oxidation process can select proper oxidation temperature and oxidation atmosphere according to different materials, gallium nitride and alloy materials thereof on the surface of the device are oxidized at a certain temperature by oxygen or mixed gas of oxygen and nitrogen, and the oxidized materials become oxidized gallium or high-resistance gallium oxide, so that the oxidized gallium nitride can be used as a passivation material of the device, the light emitting area can be controlled in a micron range, and the output of tiny light spots and the control of the shape of a light beam are realized.
It should be understood that the above-mentioned embodiments are merely illustrative of the technical concepts and features of the present invention, which are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and therefore, the protection scope of the present invention is not limited thereby. All equivalent changes and modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.
Claims (15)
1. A manufacturing method of a III-nitride optoelectronic device comprises the step of growing and forming an optoelectronic device structure on a substrate, wherein the optoelectronic device structure comprises an N-type layer, an active region light-emitting layer and a P-type layer; it is characterized by also comprising: and arranging a mask on the optoelectronic device structure, and selectively oxidizing at least one or more of the N-type layer, the active region light-emitting layer and the P-type layer by using the mask, thereby regulating and controlling the area and/or shape of a light-emitting region of the optoelectronic device structure.
2. The method of manufacturing according to claim 1, comprising: in the selective oxidation process, at least the width and the depth of the oxidized area are controlled by independently adjusting the temperature and/or the atmosphere of the oxidation process; preferably, the temperature of the oxidation process is 600-2Atmosphere, O2And N2Mixed atmosphere, N2O atmosphere and air atmosphere or a combination of two or more of them; preferably, the oxidized region has a width of 10nm to 10 μm and a depth of 10nm to 10 μm.
3. The method of manufacturing according to claim 1, comprising: in the selective oxidation process, gallium nitride and/or gallium nitride alloy materials in the contact area of the optoelectronic device structure and the oxidation reagent are oxidized to form high-resistance gallium oxide.
4. The method of manufacturing according to claim 3, wherein: the oxidizing agent comprises oxygen or a mixed gas of oxygen and nitrogen.
5. The method of manufacturing according to claim 1, wherein: the area of the light emitting region is controlled to be micrometer scale.
6. The method of manufacturing according to claim 1, wherein: the mask is made of any one of silicon dioxide, silicon nitride, aluminum oxide and photoresist.
7. The method of manufacturing according to claim 1, comprising: and forming an ion injection region in the photoelectronic device structure by adopting an ion injection mode, wherein the ion injection region continuously penetrates through the P-type layer and the active region light-emitting layer and reaches the N-type layer, and then arranging a mask on the photoelectronic device structure and carrying out selective oxidation.
8. The method of manufacturing according to claim 1, comprising: and processing a mesa structure on the optoelectronic device structure, then arranging a mask on the optoelectronic device structure, and carrying out the selective oxidation.
9. The method according to claim 8, wherein the selective oxidation specifically comprises: and in an oxidizing atmosphere, laterally oxidizing the optoelectronic device structure with the mesa structure, and controlling the light emitting area and/or shape of the light emitting area at least by controlling the oxidizing time.
10. The method of manufacturing according to claim 1, wherein: the selective oxidation mode comprises wet oxidation, dry oxidation or dry-wet mixed oxidation.
11. The method of claim 1, further comprising the step of forming electrodes associated with the P-type and N-type layers of the optoelectronic device structure.
12. The method of manufacturing according to claim 1, wherein: the photoelectronic device structure comprises a buffer layer, an N-type layer, a quantum well light-emitting layer, an electron blocking layer and a P-type layer which are sequentially formed on a substrate.
13. The method of manufacturing according to claim 12, wherein: the buffer layer is made of GaN; preferably, the material of the N-type layer comprises N-GaN; preferably, the quantum well light emitting layer comprises an InGaN/GaN multi-quantum well or an AlGaN/GaN multi-quantum well; preferably, the material of the electron blocking layer comprises AlGaN; preferably, the material of the P-type layer comprises P-GaN; preferably, the material of the substrate includes any one of Si, GaN, SiC, SOI, and sapphire.
14. The method of manufacturing according to claim 1, wherein: the III-nitride optoelectronic device comprises any one of a III-nitride Micro-LED, a VCSEL, an SLD and an LED device.
15. The method of manufacturing according to claim 1, wherein: the structure of the group III nitride optoelectronic device comprises any one of a forward mounting structure, a flip-chip structure and a vertical structure.
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| CN201811127175.3A CN110957204A (en) | 2018-09-26 | 2018-09-26 | Method for manufacturing III-nitride optoelectronic device |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| WO2023142147A1 (en) * | 2022-01-31 | 2023-08-03 | Jade Bird Display (Shanghai) Company | Micro led structure and micro display panel |
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