CN117116962A - Micro-size LED (light-emitting diode) forward-mounted array chip and preparation method thereof - Google Patents
Micro-size LED (light-emitting diode) forward-mounted array chip and preparation method thereof Download PDFInfo
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Abstract
The invention discloses a micro-size LED forward array chip and a preparation method thereof. The positive array chip adopts a common cathode and anode independent control mode. Each light-emitting unit is prepared from a GaN-based epitaxial layer, and is sequentially provided with a substrate, an n-GaN layer, an insulating medium layer and a p electrode from bottom to top, wherein the insulating medium layer is provided with a multi-quantum well layer and a p-GaN layer. The invention adopts a selective growth mode to avoid surface damage caused by dry etching of the chip. And a side wall field plate is formed by the anode electrode and the insulating medium layer, so that carriers at the edge of the p-GaN layer are exhausted, and the hole concentration at the edge of the device is reduced. Thereby weakening non-radiative recombination at the edge portion of the device and improving hole injection efficiency and External Quantum Efficiency (EQE) of the device. Each light-emitting unit is mutually isolated through the insulating medium layer and the anode electrode, so that crosstalk can be prevented, and the display effect is improved.
Description
Technical Field
The invention relates to the technical field of Micro-LED devices for display, in particular to a Micro-sized LED forward-mounted array chip and a preparation method thereof.
Background
With the development of the information age, display technology has become a key link for realizing information interaction. Micro-LEDs are a focus of attention for many companies and researchers at present due to their advantages of self-luminescence, high integration, high efficiency, high stability and low power consumption. Micro-LEDs can have more obvious display advantages than liquid crystal displays (liquid crystal display, LCDs) and organic light-emitting diodes (OLEDs).
As the LED chip size decreases to the micrometer level, the ratio of its specific surface area (sidewall area/volume) gradually increases, so that the influence of the sidewall dangling bonds as a whole increases. In addition, in the process of preparing the chip, the etching process can damage the side wall of the chip, so that the Micro-LED is faced with more serious surface defect. Eventually reducing the External Quantum Efficiency (EQE) of the device. Meanwhile, the side wall defect easily generates a leakage channel, so that carriers in the device are easy to diffuse like the edge direction, thereby SRH recombination and leakage current are increased, and the performance of the device is affected.
At present, epitaxial wafers are mostly used for forming mesa structures in the field of Micro-LED preparation, and an N-type GaN layer is exposed. For example, in Shenzhen Chuan vitamin-RGB electronic limited company, "a preparation method of GaN-based Micro-LED chip and chip", a method of etching to expose an N-GaN layer and then performing surface pretreatment on the etched surface is adopted to eliminate etching damage. However, damage to the epitaxial wafer caused by etching is difficult to repair completely, so that the method has limited improvement on the luminous efficiency of the Micro chip, and the problem of side wall damage caused by etching cannot be solved fundamentally.
Disclosure of Invention
Aiming at a GaN-based Micro-LED device, the invention discloses a Micro-sized LED forward array device structure with a side wall field plate and reduced optical crosstalk and a preparation method thereof. The anode metal is evaporated on the insulating medium between the light-emitting units to form a side wall field plate structure, so that the electric field at the edge of the light-emitting units can be enhanced, the hole concentration at the edge of the table top can be reduced, the leakage current at the edge of the device can be weakened, the radiation recombination probability between holes and electrons can be effectively enhanced, the SRH recombination probability can be reduced, and the light-emitting efficiency of the LED chip can be improved. Meanwhile, the insulating medium layer and the anode electrode at the edge of the side wall can isolate each light-emitting unit, so that optical crosstalk is reduced.
The object of the invention is achieved by at least one of the following technical solutions.
The epitaxial layer of the micro-size LED forward-mounted array chip is formed by selective growth; the epitaxial layer comprises a substrate, an n-GaN layer and an insulating medium layer;
the n-GaN layer is positioned on the substrate, and the insulating medium layer is arranged on the upper surface of the n-GaN layer;
in the insulating medium layer, a plurality of light emitting units forming an array of X rows and Y columns are grown through epitaxial selective regions, and each light emitting unit comprises a multi-quantum well layer and a p-GaN layer; in each light emitting unit, the multiple quantum well layer is positioned on the upper surface of the n-GaN layer, and the p-GaN layer is positioned on the upper surface of the multiple quantum well layer;
each group of light-emitting units is separated by an insulating medium layer, anode electrodes are arranged in the insulating medium layers between adjacent light-emitting units in the same row, and the anode electrodes and the insulating medium layers between the anode electrodes and the light-emitting units form a side wall field plate structure; a common cathode is arranged between two adjacent rows of light emitting units.
Further, p-electrodes are arranged on the upper surface of the p-GaN layer in each light-emitting unit and led out to the insulating medium layer to form p-electrode bonding pads, and the bonding pads are of square structures.
Further, the length of the common cathode in the horizontal direction is larger than the total length of the chips in the same row, and n electrode pads with square structures are arranged at two ends of the common cathode.
Further, in the array of X rows and Y columns, X is an even number greater than 2 and less than 8, and Y is a number greater than 4 and less than 16.
Further, in the array of X rows and Y columns, anode electrodes between light emitting units in two adjacent rows are symmetrically distributed based on a common cathode between the two rows of light emitting units;
the p-electrode pads corresponding to the light emitting cells in two adjacent rows are symmetrically distributed based on the common cathode between the light emitting cells in two rows.
Further, the multiple quantum well layer and the p-GaN layer are both in cylindrical structures, and the diameter of the bottom surface circle is 5-10 mu m.
Further, the height of the multiple quantum well layer plus the p-GaN layer in the vertical direction is 300-500 nm, which is equal to the height of the insulating medium layer in the vertical direction.
Further, the anode electrode is arranged on the insulating medium layer, the thickness of the insulating medium layer below the anode electrode is the same as that of the multiple quantum well layer, and the upper surface of the anode electrode is flush with the upper surface of the p-GaN layer;
the length of the insulating medium layer between the anode electrode and the light emitting unit in the vertical direction is 1-2 μm.
Further, the material of the insulating layer is obtained by PECVD deposition and is one of SiO2, al2O3 and Si3N 4.
The method for preparing the micro-size LED forward array chip comprises the following steps:
s1, growing an n-GaN layer on a substrate by MOCVD; then growing an insulating medium layer on the n-GaN layer by adopting PECVD; then preparing a mask layer on the insulating medium layer by adopting a photoetching technology, and then selectively etching by adopting an ICP etching technology to obtain a circular micropore array penetrating through the whole insulating medium layer; and a strip array of n-GaN layers exposed between the circular micropore row arrays to facilitate subsequent common cathode electrode deposition;
s2, growing a multi-quantum well layer and a p-GaN layer at the round micropore array by adopting an MOCVD technology to obtain an epitaxial layer penetrating through the insulating medium layer;
s3, forming a photoresist mask layer by combining a mask plate with a strip-shaped micropore array structure with a common ultraviolet lithography technology, etching by utilizing an ICP (inductively coupled plasma) etching technology, transferring the strip-shaped micropore structure to an insulating medium layer between light-emitting units, wherein the depth of the strip-shaped micropore is the depth of a p-GaN layer, and facilitating the deposition of an anode electrode between subsequent light-emitting units;
s4, preparing a common cathode and an n electrode pad on a region where the n-GaN layer is exposed by etching between the row arrays of the light-emitting units by using a mask plate with a strip array, adopting negative photoresist and electron beam evaporation cathode metal and combining a metal stripping technology;
s5, evaporating anode metal by adopting a negative photoresist and electron beam evaporation technology, preparing a p electrode and a p electrode bonding pad on the exposed p-GaN epitaxy by combining a metal stripping technology, and preparing the anode electrode on the insulating dielectric layer etched with the strip-shaped holes.
Compared with the prior art, the invention has the following advantages and beneficial effects:
1) The side wall field plate and the micro-size LED forward array chip for reducing optical crosstalk prepared by the invention avoid the side wall damage problem caused by ICP etching in the traditional preparation process by a selective epitaxial growth mode, and effectively improve the photoelectric performance of the chip.
2) The side wall field plate and the micro-size LED forward array chip for reducing optical crosstalk prepared by the invention can utilize the side wall field plate structure to deplete the hole concentration at the edge of an epitaxial layer by etching and evaporating an anode electrode on an insulating layer between light-emitting units, reduce the non-radiative recombination probability, effectively utilize current carriers of a device and improve the internal quantum efficiency.
3) The side wall field plate and the micro-size LED forward array chip for reducing optical crosstalk are prepared by adopting a mode of independently controlling a common cathode and an anode, so that the micro-size preparation is convenient to realize; and each light emitting unit is independently controlled, so that mutual interference is reduced.
Drawings
FIG. 1 is a schematic top view of a micro-sized LED front-mounted array chip according to an embodiment of the present invention;
FIG. 2 is a schematic cross-sectional view on the dashed line CC' of FIG. 1;
FIG. 3a is a schematic top view of a micro-scale LED front-mounted array chip with micro-hole circular arrays and bar arrays etched thereon;
FIG. 3b is a schematic cross-sectional view of a micro-sized LED front-mounted array chip after epitaxial selective growth in accordance with one embodiment;
FIG. 3c is a schematic top view of a micro-scale LED front-mounted array chip after epitaxial selective growth in accordance with one embodiment;
FIG. 3d is a schematic cross-sectional view of a micro-sized LED front-mounted array chip for preparing a strip-shaped micro-porous array structure according to an embodiment;
FIG. 3e is a schematic top view of a micro-scale LED front-mounted array chip for preparing a stripe-shaped micro-porous array structure according to an embodiment;
fig. 3f is a schematic top view of a micro-scale LED front-mounted array chip for preparing a common cathode metal according to an embodiment.
Detailed Description
The following description of the embodiments of the invention is further illustrated in the accompanying drawings and examples, but the embodiments and protection of the invention are not limited thereto, and it should be noted that the following processes or parameters, if any, are not specifically described in detail, can be implemented by those skilled in the art with reference to the prior art.
Examples:
as shown in fig. 1 and 2, an epitaxial layer of the micro-sized LED forward array chip is formed by selective growth; the epitaxial layer comprises a substrate 1, an n-GaN layer 2 and an insulating medium layer 5;
wherein, the n-GaN layer 2 is positioned on the substrate 1, and the insulating medium layer 5 is arranged on the upper surface;
in the insulating medium layer 5, a plurality of light emitting units forming an array of X rows and Y columns are grown through epitaxial selective regions, and each light emitting unit comprises a multi-quantum well layer 3 and a p-GaN layer 4; in each light emitting unit, the multiple quantum well layer 3 is positioned on the upper surface of the n-GaN layer 2, and the p-GaN layer 4 is positioned on the upper surface of the multiple quantum well layer 3;
each group of light emitting units is separated by an insulating medium layer 5, anode electrodes 7 are arranged in the insulating medium layers 5 between adjacent light emitting units in the same row, and the anode electrodes 7 and the insulating medium layers 5 between the anode electrodes 7 and the light emitting units form a side wall field plate structure; a common cathode 8 is arranged between two adjacent rows of light emitting units.
The p-GaN layer 4 in each light-emitting unit has a p-electrode 6 on its upper surface and led out onto the insulating dielectric layer 5 to form a p-electrode pad 9, which in one embodiment is of square configuration.
Further, the length of the common cathode 8 in the horizontal direction is greater than the total length of the chips of the same row, and both ends of the common cathode 8 are provided with n-electrode pads 10 of square structure.
Further, in the array of X rows and Y columns, X is an even number greater than 2 and less than 8, and Y is a number greater than 4 and less than 16.
Further, in the array of X rows and Y columns, the anode electrodes 7 between the light emitting units in two adjacent rows are symmetrically distributed based on the common cathode 8 between the light emitting units in two rows;
the p-electrode pads 9 corresponding to the light emitting cells in the adjacent two rows are symmetrically distributed based on the common cathode 8 between the light emitting cells in the two rows.
Further, the multiple quantum well layer 3 and the p-GaN layer 4 are both in a cylindrical structure, and the diameter of the bottom circle is 5-10 μm.
Further, the height of the multiple quantum well layer 3 plus the p-GaN layer 4 in the vertical direction is equal to the height of the insulating medium layer 5 in the vertical direction and is 300-500 nm.
Further, the anode electrode 7 is arranged on the insulating dielectric layer 5, the thickness of the insulating dielectric layer 5 below the anode electrode 7 is the same as the thickness of the multiple quantum well layer 3, and the upper surface of the anode electrode 7 is flush with the upper surface of the p-GaN layer 4;
the length of the insulating medium layer 5 between the anode electrode 7 and the light emitting unit in the vertical direction is 1 μm to 2 μm.
Further, the material of the insulating layer 5 is deposited by PECVD, and is one of SiO2, al2O3, and Si3N 4.
The method for preparing the micro-size LED forward array chip comprises the following steps:
s1, growing an n-GaN layer 2 on a substrate by MOCVD; then growing an insulating medium layer 5 on the n-GaN layer 2 by adopting PECVD; then, after a mask layer is prepared on the insulating medium layer 5 by adopting a photoetching technology, selective etching is carried out by adopting an ICP etching technology, and a circular micropore array penetrating through the whole insulating medium layer 5 is obtained; and a strip array of n-GaN layers 2 exposed between the circular micropore row arrays to facilitate subsequent common cathode electrode deposition;
s2, growing a multi-quantum well layer 3 and a p-GaN layer 4 at the round micropore array by adopting an MOCVD technology to obtain an epitaxial layer penetrating through the insulating medium layer 5;
s3, forming a photoresist mask layer by combining a mask plate with a strip-shaped micropore array structure with a common ultraviolet lithography technology, etching by utilizing an ICP (inductively coupled plasma) etching technology, transferring the strip-shaped micropore structure to an insulating medium layer 5 between light-emitting units, wherein the depth of the strip-shaped micropore is the depth of a p-GaN layer 4, and facilitating the deposition of anode electrodes between subsequent light-emitting units;
s4, preparing a common cathode 8 and an n electrode pad 10 on a region where the n-GaN layer is exposed by etching between the row arrays of the light-emitting units by using a mask plate with a strip array, adopting negative photoresist and electron beam evaporation cathode metal, and combining a metal stripping technology;
s5, evaporating anode metal by adopting a negative photoresist and electron beam evaporation technology, preparing a p electrode 6 and a p electrode pad 9 on the exposed p-GaN epitaxy by combining a metal stripping technology, and preparing an anode electrode 7 on the insulating dielectric layer 5 with the strip-shaped holes etched.
In one embodiment, a method for manufacturing a micro-sized LED front-mounted array chip includes the steps of:
a1, growing an n-GaN layer 2 with the thickness of 1.8 mu m on a substrate 1 by adopting MOCVD technology; siO2 of 500nm is deposited by PECVD at RF power of 50W and temperature of 300 ℃, O element is provided by N2O, and Si element is provided by SiN 4. Then, after a mask layer is prepared on the SiO2 insulating layer 5 by adopting a photoetching technology, selecting RF power of 200W, ICP power of 400W and etching SiO2 of 500nm by adopting an ICP etching technology to obtain a circular micropore array 11 with the radius of 5 mu m penetrating through the bottom surface of the whole insulating medium layer; and a stripe array 12 exposing the n-GaN layer 2 between the circular micro-hole row arrays 11, the stripe array 12 having a length of 1445 μm and a width of 20 μm. As shown in fig. 3 a;
a2, growing a 180nm multi-quantum well layer 3 and a 320nm p-GaN layer 4 at the round micropore array 11 by adopting MOCVD technology through selective growth to obtain an epitaxial layer penetrating through the SiO2 insulating layer; as shown in fig. 3b and 3 c;
a3, forming a photoresist mask layer by combining a mask plate with a strip-shaped micropore array 13 structure with a common ultraviolet lithography technology, selecting RF power of 100W and performing low-damage etching under the ICP power of 200W by utilizing an ICP etching technology, transferring the strip-shaped micropore array 13 to SiO2 between light emitting units, wherein the etching depth is 320nm, the length of the strip-shaped micropore array is 1 mu m, and the width is 10 mu m. As shown in fig. 3d and 3 e;
a4, taking a mask plate with a strip array, adopting negative photoresist and electron beam evaporation of 700nm Cr/Au as a cathode electrode, carrying out ultrasonic treatment for 20min by stripping acetone in a plasma cleaning machine, carrying out ultrasonic treatment for 10min by adopting cleaning acetone, and stripping redundant metal to prepare an n-electrode 8 and an n-electrode bonding pad 10; as shown in fig. 3 f;
a5, evaporating 700nm Ni/Au serving as anode metal by adopting a negative photoresist and electron beam evaporation technology, carrying out ultrasonic treatment on stripping acetone in a plasma cleaning machine for 20min, and then carrying out ultrasonic treatment on cleaning acetone for 10min to strip redundant metal, so as to prepare a p electrode 6, a p electrode bonding pad 9 and an anode electrode 7, as shown in figure 1;
the micro-sized LED front-mounted array chip with the side wall field plate and the reduced optical crosstalk can be well completed.
In another embodiment, a method for manufacturing a micro-sized LED front-mounted array chip includes the steps of:
b1, the initial preparation steps are the same as those of A1 to A3 in example 1;
b2, preparing Cr/Al/Ti/Au metal with the thickness of 700nm by utilizing negative photoresist and electron beam evaporation technology, and preparing a p electrode 6, a p electrode bonding pad 9, an n electrode 8, an n electrode bonding pad 10 and an anode electrode 7 respectively on the central area of the top of the exposed p-GaN layer 4, the area of the etched and exposed n-GaN layer 2 and the strip-shaped micropore array 13 with partial SiO2 by combining metal stripping technology, namely, firstly adopting acetone at 60 ℃ for 10 minutes, then adopting a blue film for stripping the metal, as shown in figure 1.
Claims (10)
1. The micro-size LED forward-mounted array chip is characterized in that an epitaxial layer of the forward-mounted array chip is formed by selective area growth; the epitaxial layer comprises a substrate (1), an n-GaN layer (2) and an insulating medium layer (5);
wherein, the n-GaN layer (2) is positioned on the substrate (1), and the insulating medium layer (5) is arranged on the upper surface;
in the insulating medium layer (5), a plurality of light emitting units forming an array of X rows and Y columns are grown through epitaxial selective regions, and each light emitting unit comprises a multi-quantum well layer (3) and a p-GaN layer (4); in each light emitting unit, the multi-quantum well layer (3) is positioned on the upper surface of the n-GaN layer (2), and the p-GaN layer (4) is positioned on the upper surface of the multi-quantum well layer (3);
each group of light-emitting units are separated by an insulating medium layer (5), anode electrodes (7) are arranged in the insulating medium layers (5) between adjacent light-emitting units in the same row, and the anode electrodes (7) and the insulating medium layers (5) between the anode electrodes (7) and the light-emitting units form a side wall field plate structure; a common cathode (8) is arranged between two adjacent rows of light emitting units.
2. The micro-sized LED forward array chip according to claim 1, wherein the p-GaN layer (4) in each light emitting unit has a p-electrode (6) on its upper surface and LED out onto the insulating dielectric layer (5) to form a p-electrode pad (9).
3. The micro-sized LED front-mounted array chip according to claim 1, wherein the length of the common cathode (8) in the horizontal direction is larger than the total length of the chips in the same row, and n electrode pads (10) are provided at both ends of the common cathode (8).
4. The micro-LED front-mounted array chip of claim 1, wherein in the array of X rows and Y columns, X is an even number greater than 2 and less than 8 and Y is a number greater than 4 and less than 16.
5. A micro-sized LED front-mounted array chip according to claim 3, characterized in that in the X-row Y-column array, anode electrodes (7) between light emitting units in two adjacent rows are symmetrically distributed based on a common cathode (8) between the light emitting units in two rows;
the p-electrode pads (9) corresponding to the light emitting units in two adjacent rows are symmetrically distributed based on the common cathode (8) between the light emitting units in two rows.
6. The micro-sized LED forward array chip according to claim 1, wherein the multi-quantum well layer (3) and the p-GaN layer (4) are both in a cylindrical structure, and the diameter of the bottom circle is 5-10 μm.
7. The micro-sized LED forward array chip according to claim 1, wherein the height of the multi-quantum well layer (3) plus the p-GaN layer (4) in the vertical direction is 300-500 nm, which is equal to the height of the insulating medium layer (5) in the vertical direction.
8. The micro-sized LED forward array chip according to claim 1, wherein an anode electrode (7) is arranged on the insulating medium layer (5), the thickness of the insulating medium layer (5) below the anode electrode (7) is the same as the thickness of the multi-quantum well layer (3), and the upper surface of the anode electrode (7) is flush with the upper surface of the p-GaN layer (4);
the length of the insulating medium layer (5) between the anode electrode (7) and the light-emitting unit in the vertical direction is 1-2 mu m.
9. The micro-sized LED front-mounted array chip according to claim 1, wherein the material of the insulating layer (5) is deposited by PECVD, and is one of SiO2, al2O3 and Si3N 4.
10. A method for preparing a micro-sized LED front-mounted array chip according to any one of claims 1 to 9, comprising the steps of:
s1, growing an n-GaN layer (2) on a substrate by MOCVD; then growing an insulating medium layer (5) on the n-GaN layer (2) by adopting PECVD; then, after a mask layer is prepared on the insulating medium layer (5) by adopting a photoetching technology, selective etching is carried out by adopting an ICP etching technology, and a circular micropore array penetrating through the whole insulating medium layer (5) is obtained; and a strip array of n-GaN layers (2) exposed between the circular micropore row arrays to facilitate subsequent common cathode electrode deposition;
s2, growing a multi-quantum well layer (3) and a p-GaN layer (4) at the round micropore array by adopting an MOCVD technology to obtain an epitaxial layer penetrating through the insulating medium layer (5);
s3, forming a photoresist mask layer by combining a mask plate with a strip-shaped micropore array structure with a common ultraviolet lithography technology, etching by utilizing an ICP (inductively coupled plasma) etching technology, transferring the strip-shaped micropore structure onto an insulating medium layer (5) between light-emitting units, wherein the depth of the strip-shaped micropore is the depth of a p-GaN layer (4), and facilitating the deposition of anode electrodes between subsequent light-emitting units;
s4, preparing a common cathode (8) and an n-electrode bonding pad (10) on the area where the n-GaN layer is exposed by etching between the row arrays of the light-emitting units by using a mask plate with a strip array, adopting negative photoresist and electron beam evaporation cathode metal and combining a metal stripping technology;
s5, evaporating anode metal by adopting a negative photoresist and electron beam evaporation technology, preparing a p electrode (6) and a p electrode pad (9) on the exposed p-GaN epitaxy by combining a metal stripping technology, and preparing an anode electrode (7) on the insulating dielectric layer (5) with the strip-shaped holes etched.
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| CN117613168A (en) * | 2024-01-24 | 2024-02-27 | 西安交通大学 | Size-adjustable light-emitting chip for optical sighting telescope and preparation method thereof |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
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| CN117613168A (en) * | 2024-01-24 | 2024-02-27 | 西安交通大学 | Size-adjustable light-emitting chip for optical sighting telescope and preparation method thereof |
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