CN110911480A - Reverse conducting IGBT containing floating space area surrounding back groove grid - Google Patents
Reverse conducting IGBT containing floating space area surrounding back groove grid Download PDFInfo
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- CN110911480A CN110911480A CN201911185204.6A CN201911185204A CN110911480A CN 110911480 A CN110911480 A CN 110911480A CN 201911185204 A CN201911185204 A CN 201911185204A CN 110911480 A CN110911480 A CN 110911480A
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- 239000012535 impurity Substances 0.000 claims description 4
- 210000003850 cellular structure Anatomy 0.000 claims description 3
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- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 5
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
Abstract
The invention provides a Reverse Conducting Insulated Gate Bipolar Transistor (RC-IGBT) device, which comprises a back groove type Gate structure. The back groove type grid structure is indirectly contacted with the drift region of the first conduction type through the floating space region of the second conduction type. The built-in potential difference between the floating-out areas and the drift area leads the drift area between the two floating-out areas to be exhausted, so that a snap-back phenomenon is restrained.
Description
Technical Field
The invention belongs to a semiconductor device, in particular to a semiconductor power device.
Background
A Reverse Conducting Insulated Gate bipolar transistor (RC-IGBT) is a device in which an IGBT and an antiparallel diode are integrated into one chip. The reverse conducting insulated gate bipolar transistor (RC-IGBT) can improve the integration level, reduce the parasitic inductance and reduce the packaging cost. However, the conventional RC-IGBT generates a phenomenon in which a current varies with a voltage flyback (Snap-back), which adversely affects power consumption and reliability of the device. The chinese invention patent (application number: 2018103973557) proposes a reverse conducting IGBT with a back side trench gate. The idea of the structure is as follows: heavily doped p-type polysilicon is adopted in the back side groove gates, and the built-in potential of the p-type polysilicon and the n-type drift region is utilized to deplete the n-type drift region between the two back side groove gates, so that the purpose of eliminating the folding back phenomenon is achieved. However, when the gate oxide of the back-side trench gate has some fixed charges or interface charges with positive charges, these charges affect the depletion width of the n-type drift region between two back-side trench gates, thereby weakening the effect of the structure in suppressing the folding back phenomenon.
Disclosure of Invention
The invention aims to provide a reverse conducting type insulated gate bipolar transistor (RC-IGBT) device, compared with a common RC-IGBT, the RC-IGBT device eliminates a Snap-back phenomenon, and the influence of gate oxide charges in a back groove type gate structure on the restraint of the Snap-back phenomenon is small.
The invention provides a reverse conducting type insulated gate bipolar transistor device, wherein a cellular structure of the device comprises: a reverse conducting type insulated gate bipolar transistor device, the cellular structure of which comprises: a drift region 21 of a lightly doped first conductivity type, a collector structure (composed of 10, 11 and 20) in contact with a bottom plane of the drift region 21, a base region (composed of 30 and 32) of a second conductivity type in contact with a top plane of the drift region 21, an emitter region 31 of the heavily doped first conductivity type in contact with at least part of the base region (composed of 30 and 32), a trench gate structure (composed of 33 and 34) for controlling a switch in contact with all of the emitter region 31, the base region (composed of 30 and 32) and the drift region 21, a collector C formed of a conductor 1 covering the collector structure (composed of 10, 11 and 20), an emitter E formed of a conductor 2 covering the emitter region 31 and the base region (composed of 30 and 32), a gate G formed of a conductor 3 covering the trench gate structure (composed of 33 and 34) for controlling a switch, characterized in that (see fig. 1-4):
the collection structure (made up of 10, 11 and 20) is made up of at least one collector region 10 of the second conductivity type, at least one collector region 11 of the first conductivity type and at least one buffer region 20 of the first conductivity type; the bottom plane of the buffer region 20 is in direct contact with both the collector region 10 of the second conductivity type and the collector region 11 of the first conductivity type, and the top plane of the buffer region 20 is in direct contact with the bottom plane of the drift region 21;
the collector region 10 of the second conductivity type is isolated from the collector region 11 of the first conductivity type by at least one first kind of back side trench gate structure (consisting of 12 and 35); the first type of back side trench gate structure (consisting of 12 and 35) is in direct contact with the floating space region 22 of the second conductivity type; the first kind of back side trench gate structure (composed of 12 and 35) is not in direct contact with the drift region 21 but in indirect contact with the drift region 21 through the floating regions 22 of the second conductivity type; the first type of back trench gate structure (composed of 12 and 35) includes at least one insulating dielectric layer 35 and at least one conductor region 12, the insulating dielectric layer 35 is in direct contact with the collector region 10 of the second conductivity type, the collector region 11 of the first conductivity type, the buffer region 20 and the floating region 22 of the second conductivity type, the conductor region 12 is in direct contact with the insulating dielectric layer 35 and is isolated from the collector region 10 of the second conductivity type, the collector region 11 of the first conductivity type, the buffer region 20 and the floating region 22 of the second conductivity type by the insulating dielectric layer 35, and the conductor region 12 is composed of a polycrystalline semiconductor material or a metal with heavy doping; the collector region 10 of the second conductivity type, the collector region 11 of the first conductivity type, and the conductor region 12 of the first kind of back side trench gate structure (composed of 12 and 35) are in direct contact with the collector C;
the cell structure comprises a second type of back groove type grid structure (composed of 12 and 35) or does not comprise the second type of back groove type grid structure (composed of 12 and 35); the second type of back side trench gate structure (consisting of 12 and 35) is in direct contact with the second conductivity type of the floating-out region 22; the second type of back side trench gate structure (consisting of 12 and 35) is not in direct contact with the drift region 21 but in indirect contact with the drift region 21 through the floating regions 22 of the second conductivity type; the second type of back trench gate structure (composed of 12 and 35) includes at least one insulating dielectric layer 35 and at least one conductor region 12, the insulating dielectric layer 35 is in direct contact with the collector region 11 of the first conductivity type, the buffer region 20 and the floating region 22 of the second conductivity type, but not in direct contact with the collector region 10 of the second conductivity type, the conductor region 12 is in direct contact with the insulating dielectric layer 35 and is isolated from the collector region 11 of the first conductivity type, the buffer region 20 and the floating region 22 of the second conductivity type by the insulating dielectric layer 35, the conductor region 12 is composed of a heavily doped polycrystalline semiconductor material or metal, and the conductor region 12 is in direct contact with the collector C;
the cell structure comprises a third back groove type grid structure (composed of 12 and 35) or does not comprise the third back groove type grid structure (composed of 12 and 35); the third backside trench gate structure (consisting of 12 and 35) is in direct contact with the floating-out region 22 of the second conductivity type; the third kind of back side trench gate structure (composed of 12 and 35) is not in direct contact with the drift region 21 but in indirect contact with the drift region 21 through the floating regions 22 of the second conductivity type; the third back trench gate structure (composed of 12 and 35) includes at least one insulating dielectric layer 35 and at least one conductor region 12, the insulating dielectric layer 35 directly contacts the collector region 10 of the second conductivity type, the buffer region 20 and the floating region 22 of the second conductivity type without directly contacting the collector region 11 of the first conductivity type, the conductor region 12 directly contacts the insulating dielectric layer 35 and is isolated from the collector region 10 of the second conductivity type, the buffer region 20 and the floating region 22 of the second conductivity type by the insulating dielectric layer 35, the conductor region 12 is composed of a heavily doped polycrystalline semiconductor material or metal, and the conductor region 12 directly contacts the collector C;
the trench gate structure (composed of 33 and 34) for controlling the switch comprises at least one insulating medium layer 34 and at least one conductor region 33, wherein the insulating medium layer 34 is in direct contact with the emitter region 31, the base region (composed of 30 and 32) and the drift region 21, the conductor region 33 is in direct contact with the insulating medium layer 34 and is isolated from the emitter region 31, the base region (composed of 30 and 32) and the drift region 21 through the insulating medium layer 34, the conductor region 33 is composed of heavily doped polycrystalline semiconductor material or metal, and the conductor region 33 is in direct contact with the gate G;
at least one heavily doped region 32 of the base region (consisting of 30 and 32) is in direct contact with the emitter E so as to form an ohmic contact.
Referring to fig. 6 to 8, the drift region 21 is not in direct contact with the base region (composed of 30 and 32) but in indirect contact with the base region (composed of 30 and 32) through a carrier storage layer 23 of the first conductivity type; the doping concentration of the carrier storage layer 23 is higher than that of the drift region 21; the insulating layer dielectric 34 of the trench type gate structure (composed of 33 and 34) for controlling the switch is in direct contact with the carrier storage layer 23.
Referring to fig. 9 to 11, the doping concentration and thickness of the region of the buffer region 20 in contact with the collector region 10 of the second conductivity type are required to be such that applying a high positive voltage between the collector C and the emitter E will not cause an electric field to pass through to the collector region 10 of the second conductivity type; the doping concentration of the region of the buffer region 20 in contact with both the collector region 11 of the first conductivity type and the drift region 21 is equal to the doping concentration of the drift region 21, so that the region of the buffer region 21 in contact with both the collector region 11 of the first conductivity type and the drift region 21 becomes a part of the drift region 21; the doping concentration of the region of the buffer region 20 in contact with both the collector region 11 of the first conductivity type and the floating region 22 of the second conductivity type is equal to the doping concentration of the floating region 22 of the second conductivity type, so that the region of the buffer region 20 in contact with both the collector region 11 of the first conductivity type and the floating region 22 of the second conductivity type becomes a part of the floating region 22 of the second conductivity type.
Referring to fig. 12, the cell structure includes a trench gate structure (composed of 34 and 36) connected to an emitter E; the groove-shaped gate structure (composed of 34 and 36) connected with the emitter E comprises at least one insulating medium layer 34 and at least one conductor region 36, wherein the insulating medium layer 34 is in direct contact with the base region (composed of 30 and 32) and the drift region 21, the conductor region 36 is in direct contact with the insulating medium layer 34 and is isolated from the base region (composed of 30 and 32) and the drift region 21 through the insulating medium layer 34, the conductor region 36 is composed of heavily doped polycrystalline semiconductor material or metal, and the conductor region 36 is in direct contact with the emitter E.
Referring to fig. 13, the cell structure includes a trench gate structure (composed of 34 and 36) connected to an emitter E; the groove-shaped gate structure (composed of 34 and 36) connected with the emitter E comprises at least one insulating medium layer 34 and at least one conductor region 36, the insulating medium layer 34 is in direct contact with the base region (composed of 30 and 32), the carrier storage layer 23 and the drift region 21, the conductor region 36 is in direct contact with the insulating medium layer 34 and is isolated from the base region (composed of 30 and 32), the carrier storage layer 23 and the drift region 21 through the insulating medium layer 34, the conductor region 36 is composed of heavily doped polycrystalline semiconductor materials or metal, and the conductor region 36 is in direct contact with the emitter E.
Referring to fig. 1 to 13, under a zero volt applied between the collector C and the emitter E, the drift region 21 between two adjacent floating regions 22 of the second conductivity type in direct contact with the first type of back side trench gate structure (composed of 12 and 35) is completely depleted, the drift region 21 between two adjacent floating regions 22 of the second conductivity type in direct contact with the second type of back side trench gate structure (composed of 12 and 35) is completely depleted, and the drift region 21 between two adjacent floating regions 22 of the second conductivity type in direct contact with the first type of back side trench gate structure (composed of 12 and 35) and the floating region 22 of the second conductivity type in direct contact with the second type of back side trench gate structure (composed of 12 and 35) is completely depleted.
Referring to fig. 1 to 13, the total number of effective impurity dopings in the floating-out region 22 of the second conductive type is smaller than the total number of effective impurity dopings in the buffer region 20.
Drawings
FIG. 1 is a RC-IGBT of the present invention having a first back side trench gate structure;
FIG. 2 is a further RC-IGBT of the present invention having a first back side trench gate structure and a second back side trench gate structure;
FIG. 3 is a schematic diagram of another RC-IGBT according to the present invention, which has a second type of back trench gate structure between the first type of back trench gate structures and has no second type of back trench gate structure between the first type of back trench gate structures;
FIG. 4 is a schematic diagram of yet another RC-IGBT of the present invention having a first, a second and a third back trench gate structure;
FIG. 5 shows another RC-IGBT of the present invention, which has two second back trench gate structures between two first back trench gate structures;
FIG. 6 shows a further RC-IGBT according to the present invention with a carrier storage layer between the base region and the drift region according to FIG. 1;
FIG. 7 shows a further RC-IGBT according to the present invention with a carrier storage layer between the base region and the drift region according to FIG. 2;
FIG. 8 is a view showing another RC-IGBT according to the present invention, in which a carrier storage layer is disposed between the base region and the drift region, according to FIG. 4;
FIG. 9 shows a further RC-IGBT according to the present invention, in which the buffer region has a part of the drift region in contact with the collector region and the drift region of the first conductivity type, and the buffer region has a part of the floating region of the second conductivity type in contact with the collector region and the floating region of the second conductivity type, according to FIG. 1;
FIG. 10 shows a further RC-IGBT according to the present invention, in which the buffer region has a part of the drift region in contact with the collector region and the drift region of the first conductivity type, and the buffer region has a part of the floating region of the second conductivity type in contact with the collector region and the floating region of the second conductivity type, according to FIG. 2;
FIG. 11 is a view showing another RC-IGBT according to the present invention, in which the buffer region has a part of the drift region in contact with the collector region and the drift region of the first conductivity type, and the buffer region has a part of the floating region of the second conductivity type in contact with the collector region and the floating region of the second conductivity type, according to FIG. 4;
FIG. 12 is a further RC-IGBT of the present invention having a trench gate structure connected to the emitter according to FIG. 1;
FIG. 13 is a further RC-IGBT of the present invention having a trench gate structure connected to the emitter according to FIG. 6;
FIG. 14 forward direction of the RC-IGBT of FIG. 1I-VCurve and reverseI-VA curve;
FIG. 15 shows the forward direction of FIG. 1 with the second conductivity type of the floating space region removedI-VCurve line.
Detailed Description
The present invention will be described in detail below with reference to the accompanying drawings.
The main purpose of the present invention is to suppress the Snap-back phenomenon of an RC-IGBT.
Fig. 1 is a schematic diagram of an RC-IGBT cell structure according to the present invention, which includes two types of trench gate structures. One is a trench gate structure (composed of 33 and 34) connected with the gate (G) and used for controlling the switch, and the other is a back trench gate structure (composed of 12 and 35) connected with the collector (C), wherein the insulating dielectric layers (34 and 35) can be SiO2The conductor region (33) of the groove-type grid structure used for controlling the switch can be a heavily doped n-type or p-type polycrystalline silicon material, the conductor region (12) of the back groove-type grid structure can be a heavily doped n-type or p-type polycrystalline silicon material, the back groove-type grid structure is indirectly contacted with the drift region (n-region 21) through a second conduction type floating region (p-float region 22), and the second conduction type floating region (p-float region 22) is directly contacted with the drift region (n-region 21). The first back trench gate structure (consisting of 12 and 35) connects the collector region of the second conductivity type (p-collector region 10) with the collector region of the first conductivity type (n)+The zones 11) are isolated from each other. The first type of back-side trench gate structure (composed of 12 and 35) extends deep into the body of the drift region (n-region 21) and is of the second conductivity typeCollector region (p-collector region 10), collector region of the first conductivity type (n)+Region 11), the buffer region (n-buffer region 20), and the floating region of the second conductivity type (p-float region 22) are all in contact. Note that the base region (formed by p-base regions 30 and p)+Region 32) is formed) of a heavily doped region (p)+Region 32) is a heavily doped region (p-base region 30) in the base region when the doping concentration at the surface of the base region is sufficiently high to form a good ohmic contact with the emitter (E)+Region 32) is not required.
At zero bias, depletion of the drift region (n-region 21) between two floating regions of the second conductivity type (p-float regions 22) occurs due to the built-in potential, e.g. 0.7V, between the floating regions of the second conductivity type (p-float regions 22) and the drift region (n-region 21). When the distance between two floating regions of the second conductivity type (p-float regions 22) is sufficiently small, the drift region (n-region 21) between them can be completely depleted, which leads from the neutral region of the drift region (n-region 21) to the collector region of the first conductivity type (n-region 21)+Region 11) is closed. Further, when a positive voltage applied between the gate (G) and the emitter (E) is larger than a threshold voltage of the trench type gate structure (composed of 33 and 34) for controlling the switch, an electron accumulation layer channel is formed near an interface of the base region (p-base region 30) and the trench type gate structure (composed of 33 and 34) for controlling the switch, and the emitter region (n) is formed+Region 31) to the drift region (n-region 21). If a positive voltage is applied between the collector (C) and the emitter (E), electrons pass from the emitter (E) through the emitter region (n)+Region 31) and electron accumulation layer channel into the drift region (n-region 21). From the neutral region of the drift region (n-region 21) to the collector region (n) of the first conductivity type+Region 11) is turned off and electrons entering the drift region (n-region 21) enter the collector region of the second conductivity type (p-collector region 10), causing holes to be injected from the collector region of the second conductivity type (p-collector region 10) into the drift region (n-region 21), and the device is finally turned on.
In FIG. 2, the same as in FIG. 1The main difference of the structure of (1) is that a second back groove type grid structure (composed of 12 and 35) is also arranged in the unit cell. The second type of back side trench gate structure (composed of 12 and 35) is different from the first type of back side trench gate structure (composed of 12 and 35) in that the former is not in contact with the collector region (p-collector region 10) of the second conductivity type. The second type of back side trench gate structure (formed by 12 and 35) has the same function as the first type of back side trench gate structure (formed by 12 and 35), and the drift region (n-region 21) is depleted by the potential difference between the floating region (p-float region 22) and the drift region (n-region 21) of the second conductivity type in contact with the first type of back side trench gate structure to increase the amount of the drift region (n-region 21) to the collector region (n) of the first conductivity type+Resistance on the electron path of region 11); the difference between the two structures is mainly the difference of positions, and the second type of back groove type gate structure (composed of 12 and 35) is positioned between the two first type of back groove type gate structures (composed of 12 and 35). From the foregoing discussion, it is known that, in order to avoid the snapback phenomenon, the width of the drift region (n-region 21) between two floating regions (p-float regions 22) of the second conductivity type is limited, such as to be less than or equal to 3 μm; in fig. 1, only the first type of back-side trench gate structure (consisting of 12 and 35), the collector region of the first conductivity type (n)+The width of the region 11) is also limited, for example, 3 μm or less. After adding a second back-side trench gate structure (consisting of 12 and 35) in fig. 2, a collector region of the first conductivity type (n) in a cell+Region 11) can be increased, and collector region (n) of the first conductivity type+The ratio of the length of region 11) to the second conductivity type collector region (p-collector region 10) can be increased.
In fig. 3, there are two first type back side trench gate structures (consisting of 12 and 35) with the second type back side trench gate structure (consisting of 12 and 35) in between, and there are two first type back side trench gate structures (consisting of 12 and 35) with no second type back side trench gate structure (consisting of 12 and 35) in between. Therefore, the second back groove type grid structure (composed of 12 and 35) is added to be flexibleAdjusting the collector region (n) of the first conductivity type+Region 11) to the area of the collector region of the second conductivity type (p-collector region 10).
In fig. 4, the main difference from the structure of fig. 3 is that there is a third kind of back trench gate structure (consisting of 12 and 35) in the cell. The third type of back side trench gate structure (consisting of 12 and 35) differs from the first type of back side trench gate structure (consisting of 12 and 35) in that the former is not distinguished from the collector region of the first conductivity type (n)+Zone 11) are in contact.
In fig. 5, the main difference from the structure of fig. 2 is that there are two second middle back trench gate structures (consisting of 12 and 35) between two first back trench gate structures (consisting of 12 and 35) in the cell.
In FIG. 6, the main difference from the structure of FIG. 1 is that the base region (formed by p-base region 30 and p)+Region 32) and the drift region (n-region 21) has an n-type carrier storage layer (n-cs region 23). The doping concentration of the n-type carrier storage layer (n-cs region 23) is higher than that of the drift region (n-region 21), and the in-vivo carrier storage effect or the conductivity modulation effect can be enhanced, so that the conduction voltage drop is reduced.
In FIG. 7, the main difference from the structure of FIG. 2 is that the base region (formed by p-base region 30 and p)+Region 32) and the drift region (n-region 21) has an n-type carrier storage layer (n-cs region 23).
In FIG. 8, the main difference from the structure of FIG. 4 is that the base region (formed by p-base region 30 and p)+Region 32) and the drift region (n-region 21) has an n-type carrier storage layer (n-cs region 23).
In fig. 9, the main difference from the structure of fig. 1 is that a collector region (n) of the first conductivity type is included in a buffer region (n-buffer region 20)+The doping concentration of the region in contact with both the region 11) and the drift region (n-region 21) is the same as the doping concentration of the drift region (n-region 21), and the buffer region (n-buffer region 20) has a collector region (n-region 21) of the first conductivity type+Zone 11) and a floating zone of the second conductivity type (p-float zone 22) are in homogeneous contactThe doping concentration of the region is the same as that of the floating region (p-float region 22) of the second conductivity type. This allows to increase the thickness of the drift region (n-region 21) between two floating regions (p-float regions 22) of the second conductivity type, thereby increasing the distance from the drift region (n-region 21) to the collector region (n-region 21) of the first conductivity type+Region 11) to further suppress the snap-back phenomenon. In fact, the structure of fig. 9 is based on the structure of fig. 1, and the buffer region (n-buffer region 20) is connected to the collector region (n) of the first conductivity type+Region 11) and drift region (n-region 21) become a part of drift region (n-region 21), and a collector region (n-region 20) of the first conductivity type in buffer region (n-buffer region)+Region 11) and the second conductivity-type floating region (p-float region 22) are in contact with each other, and become a part of the second conductivity-type floating region (p-float region 22).
In fig. 10, the main difference from the structure of fig. 2 is that a collector region (n) of the first conductivity type is provided in the buffer region (n-buffer region 20)+The doping concentration of the region in contact with both the region 11) and the drift region (n-region 21) is the same as the doping concentration of the drift region (n-region 21), and the buffer region (n-buffer region 20) has a collector region (n-region 21) of the first conductivity type+Region 11) and the floating region of the second conductivity type (p-float region 22) are in contact with each other, and the doping concentration of the region is the same as the doping concentration of the floating region of the second conductivity type (p-float region 22). In fact, the structure of fig. 10 is based on the structure of fig. 2, and the buffer region (n-buffer region 20) is connected to the collector region (n) of the first conductivity type+Region 11) and drift region (n-region 21) become a part of drift region (n-region 21), and a collector region (n-region 20) of the first conductivity type in buffer region (n-buffer region)+Region 11) and the second conductivity-type floating region (p-float region 22) are in contact with each other, and become a part of the second conductivity-type floating region (p-float region 22).
In fig. 11, the main difference from the structure of fig. 4 is that a collector region (n) of the first conductivity type is included in a buffer region (n-buffer region 20)+The doping concentration of the region in contact with both the region 11) and the drift region (n-region 21) is the same as the doping concentration of the drift region (n-region 21), and the buffer region (n-buffer region 20) has a collector region (n-region 21) of the first conductivity type+Region 11) and the floating region of the second conductivity type (p-float region 22) are in contact with each other, and the doping concentration of the region is the same as the doping concentration of the floating region of the second conductivity type (p-float region 22). In fact, the structure of fig. 12 is based on the structure of fig. 4, and the buffer region (n-buffer region 20) is connected to the collector region (n) of the first conductivity type+Region 11) and drift region (n-region 21) become a part of drift region (n-region 21), and a collector region (n-region 20) of the first conductivity type in buffer region (n-buffer region)+Region 11) and the second conductivity-type floating region (p-float region 22) are in contact with each other, and become a part of the second conductivity-type floating region (p-float region 22).
In fig. 12, the main difference from the structure of fig. 1 is that the cell further includes a trench gate structure (composed of 34 and 36) connecting the emitters. The trench gate structure (composed of 34 and 36) for connecting the emitters differs from the trench gate structure (composed of 33 and 34) for controlling the switches in that the former conductor region (36) connects the emitters (E).
In fig. 13, the main difference from the structure of fig. 5 is that the cell further includes a trench gate structure (composed of 34 and 36) connecting the emitters.
In order to illustrate the superiority of the RC-IGBT of the present invention, the RC-IGBT structure of the present invention in fig. 1 is taken as an example for simulation calculation here. Half of the cells (width 8 μm) of the structure of fig. 1 were used in the simulation; si material is adopted; the minority carrier lifetime of both electrons and holes is 10 mus; the insulating medium layers (34 and 35) adopt SiO2The thickness of which is 0.1 μm, and the thickness and doping concentration of the drift region (n-region 21) are 105 μm and 6X 10, respectively13cm-3(ii) a The thickness and doping concentration of the buffer region (n-buffer region 20) were 1.4 μm and 1X 10, respectively17cm-3(ii) a Control switch trench gate structure (consisting of 33 and 34) and back trench gate structure: (35 and 12) are respectively 2 μm and 5 μm in width and depth, and the conductor region 12 of the back groove-type gate structure is made of heavily doped p-type polysilicon; the peak concentration at the junction of the second conductivity type floating region (p-float region 22) and the back trench gate structure is 3 × 1016cm-3The diffusion length is 0.2 μm; collector region of the second conductivity type (p-collector region 10) and collector region of the first conductivity type (n)+Region 11) has a thickness and doping concentration of 0.6 μm and 3 × 10, respectively18cm-3Collector region of the first conductivity type (n)+Region 11) has a width of 1.5 μm and the collector region of the second conductivity type (p-collector region 10) has a width of 4.5 μm;
FIG. 14 shows the forward conduction of the RC-IGBT of the present invention in FIG. 1I-VCurve and reverse conductionI-VCurve line. The RC-IGBT of the invention in figure 1 has the capability of bidirectional conduction. Even the gate-oxide interface charge of the back trench gate structure (composed of 35 and 12)D iUp to 1 × 1011cm-2When the gate oxide interface charges are still not rightI-VThe curve has an influence. When inD iUp to 6X 1011cm-2The snap-back phenomenon occurs. FIG. 15 is a view showing the forward direction of FIG. 1 with the floating space region of the second conductivity type removedI-VCurve line. Although the structure used in FIG. 15 is inD iNo snap-back phenomenon at = 0, but the structure used in fig. 15 is as followsD iUp to 5X 1010cm-2A snap-back phenomenon occurs. As can be seen from a comparison of fig. 14 and 15, the forward turn-on characteristics of the RC-IGBT of the present invention are less affected by the gate oxide interface charges.
In the above description of many embodiments of the present invention, the n-type semiconductor material can be regarded as a first conductive type semiconductor material, and the p-type semiconductor material can be regarded as a second conductive type semiconductor material. Obviously, according to the principle of the present invention, the n-type and the p-type in the embodiments can be interchanged without affecting the content of the present invention. It is obvious to a person skilled in the art that many other embodiments are possible within the inventive idea without going beyond the claims of the invention.
Claims (7)
1. A reverse conducting type insulated gate bipolar transistor device, the cellular structure of which comprises: the drift region of lightly doped first conduction type, with the collection electric structure that the bottom plane of drift region contacted, with the base region of second conduction type that the top plane of drift region contacted, with the emitter region of heavily doped first conduction type that the base region has at least partial contact, with emitter region, base region and the drift region all contact be used for the control switch's cell type grid structure, cover in the collector electrode that the conductor of collection electric structure formed, cover in the emitter region with the emitter electrode that the conductor of base region formed, cover in the grid that the conductor that is used for the control switch's cell type grid structure formed, its characterized in that:
the current collection structure is composed of at least one collector region of a second conduction type, at least one collector region of a first conduction type and at least one buffer region of a first conduction type; the bottom plane of the buffer region is in direct contact with the collector region of the second conduction type and the collector region of the first conduction type, and the top plane of the buffer region is in direct contact with the bottom plane of the drift region;
the collector region of the second conduction type is mutually isolated from the collector region of the first conduction type through at least one first back groove type grid structure; the first back groove type grid structure is directly contacted with a second conductive type floating space area; the first type of back groove type gate structure is not in direct contact with the drift region but in contact with the drift region through the floating region of the second conductivity type; the first back groove type grid structure comprises at least one insulating medium layer and at least one conductor region, the insulating medium layer is directly contacted with the collector region of the second conduction type, the collector region of the first conduction type, the buffer region and the floating region of the second conduction type, the conductor region is directly contacted with the insulating medium layer and is separated from the collector region of the second conduction type, the collector region of the first conduction type, the buffer region and the floating region of the second conduction type through the insulating medium layer, and the conductor region is made of heavily doped polycrystalline semiconductor materials or metal; the collector region of the second conductivity type, the collector region of the first conductivity type and the conductor region of the first type of back side trench gate structure are in direct contact with the collector;
the cell structure comprises a second type of back groove type grid structure or does not comprise the second type of back groove type grid structure; the second back groove type grid structure is directly contacted with a second conductive type floating space area; the second type of back groove type gate structure is not in direct contact with the drift region but in contact with the drift region through the floating region of the second conductivity type; the second type of back groove type grid structure comprises at least one insulating medium layer and at least one conductor region, the insulating medium layer is in direct contact with the collector region of the first conduction type, the buffer region and the floating region of the second conduction type but not in direct contact with the collector region of the second conduction type, the conductor region is in direct contact with the insulating medium layer and is isolated from the collector region of the first conduction type, the buffer region and the floating region of the second conduction type through the insulating medium layer, the conductor region is made of heavily doped polycrystalline semiconductor materials or metal, and the conductor region is in direct contact with the collector;
the cell structure comprises a third back groove type grid structure or does not comprise the third back groove type grid structure; the third back groove type grid structure is directly contacted with the floating space area of the second conduction type; the third back groove type grid structure is not in direct contact with the drift region but in contact with the drift region through the floating region of the second conduction type; the third back groove type grid structure comprises at least one insulating medium layer and at least one conductor region, the insulating medium is in direct contact with the collector region of the second conduction type, the buffer region and the floating region of the second conduction type but not in direct contact with the collector region of the first conduction type, the conductor region is in direct contact with the insulating medium layer and is isolated from the collector region of the second conduction type, the buffer region and the floating region of the second conduction type through the insulating medium layer, the conductor region is made of heavily doped polycrystalline semiconductor materials or metal, and the conductor region is in direct contact with the collector;
the groove-shaped grid structure for controlling the switch comprises at least one insulating medium layer and at least one conductor region, wherein the insulating medium layer is in direct contact with the emitter region, the base region and the drift region, the conductor region is in direct contact with the insulating medium layer and is isolated from the emitter region, the base region and the drift region through the insulating medium layer, the conductor region is made of heavily-doped polycrystalline semiconductor materials or metal, and the conductor region is in direct contact with the grid;
at least one heavily doped region in the base region is in direct contact with the emitter to form an ohmic contact.
2. The igbt device of claim 1, wherein:
the drift region is not in direct contact with the base region but in indirect contact with the base region through a carrier storage layer of the first conductivity type; the doping concentration of the carrier storage layer is higher than that of the drift region; and the insulating layer medium of the groove-shaped grid structure for controlling the switch is in direct contact with the carrier storage layer.
3. The igbt device of claim 1, wherein:
the doping concentration and thickness of the region of the buffer region in contact with the collector region of the second conductivity type are such that a high positive voltage is applied between the collector and the emitter without passing an electric field through to the collector region of the second conductivity type; the doping concentration of a region in the buffer region, which is in contact with both the collector region of the first conductive type and the drift region, is equal to that of the drift region, so that the region in the buffer region, which is in contact with both the collector region of the first conductive type and the drift region, becomes a part of the drift region; the doping concentration of a region in the buffer region, which is in contact with both the collector region of the first conductivity type and the floating region of the second conductivity type, is equal to the doping concentration of the floating region of the second conductivity type, so that the region in the buffer region, which is in contact with both the collector region of the first conductivity type and the floating region of the second conductivity type, becomes a part of the floating region of the second conductivity type.
4. The igbt device of claim 1, wherein:
the cell structure comprises a groove-shaped grid structure connected with an emitter; the groove-shaped grid structure connected with the emitter comprises at least one insulating medium layer and at least one conductor region, the insulating medium layer is in direct contact with the base region and the drift region, the conductor region is in direct contact with the insulating medium layer and is isolated from the base region and the drift region through the insulating medium layer, the conductor region is made of heavily doped polycrystalline semiconductor materials or metal, and the conductor region is in direct contact with the emitter.
5. The igbt device of claim 2, wherein:
the cell structure comprises a groove-shaped grid structure connected with an emitter; the groove-shaped grid structure connected with the emitter comprises at least one insulating medium layer and at least one conductor region, the insulating medium layer is in direct contact with the base region, the carrier storage layer and the drift region, the conductor region is in direct contact with the insulating medium layer and is isolated from the base region, the carrier storage layer and the drift region through the insulating medium layer, the conductor region is made of heavily-doped polycrystalline semiconductor materials or metal, and the conductor region is in direct contact with the emitter.
6. The igbt device of claim 1, wherein:
under the condition that zero volt is applied between the collector and the emitter, the drift region between two adjacent floating empty regions of the second conductivity type directly contacted with the first back groove type grid structure is completely depleted, the drift region between two adjacent floating empty regions of the second conductivity type directly contacted with the second back groove type grid structure is completely depleted, and the drift region between two adjacent floating empty regions of the second conductivity type directly contacted with the first back groove type grid structure and the second conductivity type directly contacted with the second back groove type grid structure is completely depleted.
7. The igbt device of claim 1, wherein:
the total number of effective doping impurities in the floating space region of the second conduction type is smaller than the total number of effective doping impurities in the buffer region.
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