CN111276537A - Reverse conducting RC-LIGBT device with polycrystalline silicon voltage-resistant layer - Google Patents

Reverse conducting RC-LIGBT device with polycrystalline silicon voltage-resistant layer Download PDF

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Publication number
CN111276537A
CN111276537A CN202010092684.8A CN202010092684A CN111276537A CN 111276537 A CN111276537 A CN 111276537A CN 202010092684 A CN202010092684 A CN 202010092684A CN 111276537 A CN111276537 A CN 111276537A
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region
layer
type
heavily doped
voltage
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Inventor
黄东
易波
孔谋夫
程骏骥
黄海猛
赵青
杨瑞丰
蔺佳
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University of Electronic Science and Technology of China
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
    • H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
    • H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
    • H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors

Abstract

The invention belongs to the field of semiconductor power devices, and provides an RC-LIGBT device with a polysilicon voltage-resistant layer; on the basis of a traditional RC-IGBT device, a polysilicon voltage-withstanding layer is introduced above a surface voltage-withstanding region and an oxide layer to form an anti-parallel diode; when the device is in a reverse working state, a current circulation path is formed, so that the device has reverse conducting capacity; when the device works in the forward direction, the contradiction relation between the conduction voltage drop and the turn-off loss of the RC-LIGBT is optimized; more importantly, when the device is conducted in the forward direction, the diode formed by the polysilicon voltage-resisting layer is reversely biased, so that the structure of the invention does not have the voltage folding phenomenon, and the electrical performance of the device is improved.

Description

Reverse conducting RC-LIGBT device with polycrystalline silicon voltage-resistant layer
Technical Field
The invention belongs to the field of semiconductor power devices, and relates to a transverse voltage-resistant structure; the RC-LIGBT (Reverse-inverting laterally-insulated-Gate Bipolar Transistor) device has low conduction voltage drop, high switching speed and capability of eliminating voltage folding phenomenon.
Background
Miniaturization and integration of power electronic systems are important research directions of power semiconductor devices. Semiconductor power devices with Lateral voltage-withstanding structures, such as LDMOS (Lateral Double-Diffused MOSFET), ligbt (Lateral Insulated Gate Bipolar transistor), are widely used on power integrated chips due to their characteristics of easy integration, easy driving, high voltage withstanding, low power consumption, etc. The LIGBT based on the SOI technology is widely applied due to the excellent isolation characteristic, and as a bipolar power device, the LIGBT has the characteristics of high input impedance of an MOSFET and high current density of a BJT at the same time, and a large number of unbalanced electron-hole pairs gathered in a drift region during conduction enhance the conductance modulation effect of the device, so that the LI GBT device has lower conduction voltage drop; however, the presence of a large number of non-equilibrium carriers increases the carrier extraction time and turn-off loss during turn-off of the device; therefore, the Turn-off loss (Turn-off: E) of the device is optimizedoff) And an On-state voltage drop (On-state voltage drop: von) The compromise relationship between the two is one of the key problems in designing the LIGBT.
An RC-IGBT (Reverse-converting IGBT) device is a novel IGBT device integrating a diode and an IGBT together through a process, and the device has Reverse conduction capability through an integrated freewheeling diode, thereby being greatly helpful for improving the performance of the IGBT. However, as shown in fig. 1, when the conventional RC-LIGBT device is in forward conduction, when the forward voltage of the anode is small, the PN junction of the anode is not conducted, and the device operates in MOS mode; with the continuous increase of the anode voltage, the anode PN junction is conducted, and the hole injection makes the device working mode switched from MOS to IGBT, so that a voltage folding phenomenon occurs, which seriously affects the reliability of the device working, and therefore, how to eliminate the voltage folding phenomenon is also one direction of research on RC-LIGBT devices.
In order to further reduce the on-resistance R of the transverse power deviceonL. Vestling et al, in A novel high-frequency high-voltage LDMOS transistor using an Extended Gate RESURF Technology, proposes an Extended Gate LDMOS structure as shown in FIG. 2; covering a layer of P-type polycrystalline silicon on the surface of a drift region of a transverse power device, and isolating the P-type polycrystalline silicon through a thin oxide layer; when the voltage is withstand, the N-type drift region and the P-type polycrystalline silicon layer are depleted, and after the depletion, the ionization donor of the N-type drift region and the ionization acceptor of the P-type polycrystalline silicon layer have charge compensation, so that the impurity concentrations of the N-type drift region and the P-type polycrystalline silicon layer can be improved to a certain extent without affecting the withstand voltage, and the on-resistance RonThus achieving a reduction.
Disclosure of Invention
The invention aims to provide an RC-LIGBT device with a polysilicon voltage-resisting layer aiming at the problems of the conventional RC-IGBT (Reverse-converting IGBT) device; the RC-LIGBT device can eliminate the voltage folding phenomenon, and has the advantages of low turn-on voltage drop, low turn-off loss and the like, so that the device has a better compromise relationship between turn-off loss and turn-on voltage drop.
In order to achieve the purpose, the invention adopts the following technical scheme:
an RC-LIGBT device with a polysilicon voltage-resisting layer, the cellular structure of which comprises:
the structure comprises a semiconductor substrate layer 1, an oxygen burying layer 2 positioned on the substrate layer 1, a semiconductor layer positioned on the oxygen burying layer, and a polycrystalline silicon pressure-resistant layer positioned on the semiconductor layer;
the semiconductor layer includes: the semiconductor device comprises a P-type semiconductor base region 6 positioned on one side of a semiconductor layer, an N-type semiconductor buffer region 14 positioned on the other side of the semiconductor layer, a surface voltage-withstanding region 3 positioned between the P-type semiconductor base region 6 and the N-type semiconductor buffer layer 14, and an oxide layer 17 covering the surface voltage-withstanding region 3; the P-type semiconductor base region 6 is divided into three sub-regions by two groove gates, a heavily doped N-type semiconductor region 4 which is contacted with the groove gates and a heavily doped P-type semiconductor region 5 which is adjacent to the heavily doped N-type semiconductor region 4 are respectively arranged in each sub-region, emitter metal 10 covers the heavily doped P-type semiconductor region 5 and the heavily doped N-type semiconductor region 4, the two groove gates consist of a heavily doped N-type polycrystalline silicon region 7 and an outer layer oxide layer 8, and gate electrode metal 9 covers the heavily doped N-type polycrystalline silicon region 7; a P-type collector region 15 is arranged in the N-type semiconductor buffer region 14, and a collector metal 16 covers the P-type collector 15;
the polysilicon voltage-withstanding layer consists of a heavily doped P-type polysilicon region 11, a P-type polysilicon region 12 and a heavily doped N-type polysilicon region 13 and is positioned above the oxide layer 17; an emitter metal 10 covers the heavily doped P-type polycrystalline silicon region 11, and a collector metal 16 covers the heavily doped N-type polycrystalline silicon region 13.
The invention has the beneficial effects that:
the invention provides an RC-LIGBT which can eliminate voltage reverse effect, reduce conduction voltage drop and turn-off loss; on the basis of a traditional RC-IGBT device, a polysilicon voltage-withstanding layer is introduced above a surface voltage-withstanding region and an oxide layer to form an anti-parallel diode; when the device is in a reverse working state, a current circulation path is formed, so that the device has reverse conducting capacity; when the device works in the forward direction, the N-type semiconductor buffer layer 14 and the P-type collector region 15 are not short-circuited, so that the change from the LDMOS to the LIGBT working mode in the traditional device can not occur, the voltage folding phenomenon is thoroughly eliminated, and the electrical performance of the device is improved.
Drawings
FIG. 1 is a schematic diagram of a conventional RC-LIGBT device.
Fig. 2 is a schematic diagram of an extended-gate LDMOS structure.
Fig. 3 is a schematic structural diagram of an RC-LIGBT device with a polysilicon voltage-withstanding layer according to an embodiment of the present invention;
in the figure, 1 is a P-type substrate, 2 is a buried oxide layer region, 3 is a surface voltage-resistant region, 4 is a heavily doped N-type semiconductor region, 5 is a heavily doped P-type semiconductor region, 6 is a P-type semiconductor base region, 7 is a polysilicon gate, 8 is a gate dielectric layer, 9 is a gate electrode metal, 10 is an emitter metal, 11 is a heavily doped P-type polysilicon region, 12 is a P-type polysilicon region, 13 is a heavily doped N-type polysilicon region, 14 is an N-type semiconductor buffer layer, 15 is a P-type collector region, 16 is a collector metal, and 17 is an oxide layer.
FIG. 4 is a comparison graph of I-V relationships obtained by simulation of an embodiment of the present invention and a conventional RC-LIGBT.
FIG. 5 shows the conduction voltage drop V obtained by simulation of the RC-LIGBT according to the embodiment of the present invention and the conventional RC-LIGBTonAnd turn-off loss EoffThe relationship is compared with the graph.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples.
Examples
The embodiment provides an RC-LIGBT device with polysilicon voltage-withstanding layer, the cell structure of which is shown in fig. 3, and includes:
the structure comprises a semiconductor substrate layer 1, an oxygen burying layer 2 positioned on the substrate layer 1, a semiconductor layer positioned on the oxygen burying layer, and a polycrystalline silicon pressure-resistant layer positioned on the semiconductor layer;
the semiconductor layer includes: the semiconductor device comprises a P-type semiconductor base region 6 positioned on the left side of a semiconductor layer, an N-type semiconductor buffer region 14 positioned on the right side, a surface voltage-withstanding region 3 positioned between the P-type semiconductor base region 6 and the N-type semiconductor buffer layer 14, and an oxide layer 17, wherein the surface voltage-withstanding region 3 is formed by an N-type semiconductor layer;
the P-type semiconductor base region 6 is divided into three sub-regions by two groove gates extending into the surface voltage-resisting region 3, the three sub-regions are a first sub-region, a second sub-region and a third sub-region in sequence from left to right, the first sub-region is internally provided with an adjacent heavily doped P-type semiconductor region 5 and an adjacent heavily doped N-type semiconductor region 4, the second sub-region is internally provided with an adjacent heavily doped P-type semiconductor region 5 and an adjacent heavily doped N-type semiconductor region 4, all the heavily doped P-type semiconductor regions 5 and the heavily doped N-type semiconductor regions 4 are covered with emitter metal 10, and all the heavily doped N-type semiconductor regions 4 are used as source regions of the LIGBT channel base region and are contacted with gate dielectric; the groove gate consists of a gate dielectric layer 8, a polysilicon gate 7 filled in the gate dielectric layer and a gate electrode 9 covering the polysilicon gate; the heavily doped N-type semiconductor region 4, the heavily doped P-type semiconductor region 5, the trench gate, the P-type semiconductor base region 6 and part of the surface voltage-resisting region 3 together form a LIGBT channel N-MOS structure, namely a first active region;
a P-type collector region 15 is arranged in the N-type semiconductor buffer region 14, collector metal 16 covers the P-type collector 15, and the N-type semiconductor buffer layer 14, the P-type collector region 15 and the collector metal 16 jointly form a second active region;
the oxide layer 17 covers part of the third sub-region of the P-type semiconductor base region 6, part of the heavily doped P-type semiconductor region 5 in the third sub-region, the surface voltage-resisting region 3, part of the N-type semiconductor buffer layer 14 and part of the P-type collector region 15;
the polysilicon voltage-withstanding layer consists of a heavily doped P-type polysilicon region 11, a P-type polysilicon region 12 and a heavily doped N-type polysilicon region 13 and is positioned above the oxide layer 17; an emitter metal 10 covers the heavily doped P-type polycrystalline silicon region 11, and a collector metal 16 covers the heavily doped N-type polycrystalline silicon region 13.
Based on the above embodiments, the following detailed description will be made on the working principle of the present invention with reference to the accompanying drawings:
compared with the traditional RC-LIGBT, the invention mainly introduces the polysilicon voltage-resistant layer above the oxide layer; in connection with an embodiment, when the device is operated in a reverse state, the emitter is at a forward voltage with respect to the collector; the diode formed by the heavily doped P-type polycrystalline silicon 11, the P-type polycrystalline silicon 12 and the heavily doped N-type polycrystalline silicon 13 is conducted to form a current circulation path, so that the reverse conduction type LED lamp has reverse conduction capability;
when the device works in a forward conduction state, electrons flow into the drift region from the n-MOS channel and reach the P-type collector 15, and the introduced polysilicon diode is in a reverse bias state; meanwhile, the N-type semiconductor buffer layer 14 and the P-type collector region 15 are not directly short-circuited, so that the change from the LDMOS to the LIGBT working mode in the conventional device is avoided, the voltage folding phenomenon is thoroughly eliminated, and the compromise relationship between the on-state voltage drop and the off-state loss is optimized.
As shown in fig. 4, which is a comparison graph of I-V relationship obtained by conventional RC-LIGBT simulation in the embodiment of the present invention, it can be seen from the graph that, when conducting in the forward direction, the embodiment can eliminate the voltage reverse phenomenon, and at the same time, under the same collector doping concentration, the conducting voltage drop is reduced from 1.35V of the conventional structure to 1.09V in the embodiment of the present invention, so that the conducting voltage drop of the device is greatly reduced; when conducting reversely, the reverse conducting voltage drop of the embodiment of the invention is slightly superior to that of the traditional structure.
FIG. 5 shows a V obtained by simulation of a conventional RC-LIGBT according to an embodiment of the present inventionon-EoffThe trade-off relationship is compared with the graph, and it can be seen from the graph that the turn-off loss E of the device is 1.48V at the same turn-on voltage dropoff3.64mJ/cm from the conventional structure2Down to 1.89mJ/cm for the inventive example2The turn-off loss of the device is optimized.
While the invention has been described with reference to specific embodiments, any feature disclosed in this specification may be replaced by alternative features serving the same, equivalent or similar purpose, unless expressly stated otherwise; all of the disclosed features, or all of the method or process steps, may be combined in any combination, except mutually exclusive features and/or steps.

Claims (1)

1. A reverse conducting RC-LIGBT device with a polysilicon voltage-resisting layer comprises a cellular structure:
the structure comprises a semiconductor substrate layer 1, an oxygen burying layer 2 positioned on the substrate layer 1, a semiconductor layer positioned on the oxygen burying layer, and a polycrystalline silicon pressure-resistant layer positioned on the semiconductor layer;
the semiconductor layer includes: the semiconductor device comprises a P-type semiconductor base region 6 positioned on one side of a semiconductor layer, an N-type semiconductor buffer region 14 positioned on the other side of the semiconductor layer, a surface voltage-withstanding region 3 positioned between the P-type semiconductor base region 6 and the N-type semiconductor buffer layer 14, and an oxide layer 17 covering the surface voltage-withstanding region 3; the P-type semiconductor base region 6 is divided into three sub-regions by two groove gates, a heavily doped N-type semiconductor region 4 which is contacted with the groove gates and a heavily doped P-type semiconductor region 5 which is adjacent to the heavily doped N-type semiconductor region 4 are respectively arranged in each sub-region, emitter metal 10 covers the heavily doped P-type semiconductor region 5 and the heavily doped N-type semiconductor region 4, the two groove gates consist of a heavily doped N-type polycrystalline silicon region 7 and an outer layer oxide layer 8, and gate electrode metal 9 covers the heavily doped N-type polycrystalline silicon region 7; a P-type collector region 15 is arranged in the N-type semiconductor buffer region 14, and a collector metal 16 covers the P-type collector 15;
the polysilicon voltage-withstanding layer consists of a heavily doped P-type polysilicon region 11, a P-type polysilicon region 12 and a heavily doped N-type polysilicon region 13 and is positioned above the oxide layer 17; an emitter metal 10 covers the heavily doped P-type polycrystalline silicon region 11, and a collector metal 16 covers the heavily doped N-type polycrystalline silicon region 13.
CN202010092684.8A 2020-02-14 2020-02-14 Reverse conducting RC-LIGBT device with polycrystalline silicon voltage-resistant layer Pending CN111276537A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113078211A (en) * 2021-03-25 2021-07-06 电子科技大学 Integrated MOS self-adaptive control SOI LIGBT

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928507A (en) * 2014-04-15 2014-07-16 东南大学 Reverse-conducting double-insulated-gate bipolar transistor
CN105047702A (en) * 2015-07-13 2015-11-11 电子科技大学 Manufacturing method of LDMOS device
CN107068744A (en) * 2017-05-11 2017-08-18 电子科技大学 A kind of landscape insulation bar double-pole-type transistor
CN107170816A (en) * 2017-05-11 2017-09-15 电子科技大学 A kind of landscape insulation bar double-pole-type transistor
CN108321195A (en) * 2018-02-05 2018-07-24 电子科技大学 A kind of short-circuit anode SOI LIGBT with anode clamp fault trough
CN108389900A (en) * 2018-03-19 2018-08-10 电子科技大学 A kind of slot grid short circuit anode SOI LIGBT
CN110504308A (en) * 2019-08-29 2019-11-26 电子科技大学 A kind of low-loss multiple-grooved grid high voltage power device of high speed

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103928507A (en) * 2014-04-15 2014-07-16 东南大学 Reverse-conducting double-insulated-gate bipolar transistor
CN105047702A (en) * 2015-07-13 2015-11-11 电子科技大学 Manufacturing method of LDMOS device
CN107068744A (en) * 2017-05-11 2017-08-18 电子科技大学 A kind of landscape insulation bar double-pole-type transistor
CN107170816A (en) * 2017-05-11 2017-09-15 电子科技大学 A kind of landscape insulation bar double-pole-type transistor
CN108321195A (en) * 2018-02-05 2018-07-24 电子科技大学 A kind of short-circuit anode SOI LIGBT with anode clamp fault trough
CN108389900A (en) * 2018-03-19 2018-08-10 电子科技大学 A kind of slot grid short circuit anode SOI LIGBT
CN110504308A (en) * 2019-08-29 2019-11-26 电子科技大学 A kind of low-loss multiple-grooved grid high voltage power device of high speed

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113078211A (en) * 2021-03-25 2021-07-06 电子科技大学 Integrated MOS self-adaptive control SOI LIGBT

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Application publication date: 20200612