CN113497113A - Novel insulated gate bipolar transistor with ultra-low turn-on voltage - Google Patents
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7398—Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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Abstract
The invention relates to a novel insulated gate bipolar transistor with ultralow turn-on voltage, which comprises: a substrate having a first conductivity type; a drift region having a second conductivity type disposed on the substrate; the semiconductor stacking structure is arranged on the drift region and sequentially comprises a first well region with a first conduction type, a second well region with a second conduction type and a base region with the first conduction type from bottom to top; a first contact source region with a first conductive type and a second contact source region with a second conductive type are arranged on the first conductive type base region and are adjacent to but separated from each other; the emitter electrode contacts the first contact source region and the second contact source region; the first grid is arranged in the corresponding first groove above the substrate; the second grid is arranged in a corresponding second groove above the substrate, and a grid insulation layer is formed on the side wall of the groove and is filled with polycrystalline silicon; and the first and second trenches vertically extend from the second and first contact source regions to the drift region, respectively.
Description
Technical Field
The invention relates to the technical field of power semiconductor devices, in particular to a novel insulated gate bipolar transistor with ultra-low on-state voltage.
Background
An Insulated Gate Bipolar Transistor (IGBT) is a power semiconductor device having a composite structure including a metal-oxide-semiconductor field effect transistor (MOSFET) and a Bipolar Junction Transistor (BJT). IGBTs can achieve higher current densities than MOSFETs, and faster, more efficient switching performance and better control than BJTs. In addition, the drift region is lightly doped to improve the latch-up resistance. Meanwhile, since the lightly doped drift region is subjected to high-energy carrier injection (high-level carrier injection) from the bottom P collector region, an on mode is formed, and thus the device can still have good conductivity. With the performance of the MOSFET such as easy control of the gate electrode and the bipolar current mechanism, and the advantages of short switching time, low power loss, etc., the IGBT is widely used in the high voltage and high power fields.
Fig. 1A to 1C show the basic structure of an IGBT and its equivalent circuit. Referring to FIG. 1A, the IGBT has a structure similar to that of a MOSFET, basically a MOSFET has an n + -n-structure and an IGBT has a p + -n + -n-structure. Therefore, the IGBT and the MOSFET can be manufactured by similar process technology.
Referring to fig. 1B to fig. 1C, an equivalent circuit of the IGBT corresponds to a thyristor (thyristor) structure, and is formed by coupling PNP and NPN transistors. However, with the circuit configuration shown in fig. 1B, the thyristor does not operate properly because the base and emitter of the NPN transistor are shorted by aluminum lines (using a resistor located in the P-base layer). Thus, an IGBT and its operating principle can be considered equivalent to an inverted darlington configuration using an enhanced N-channel MOSFET as the input stage and a PNP transistor as the output stage.
An IGBT is a monolithic structure (monolithic structure) composed of a MOSFET and a PNP transistor, and its operation is made by n-region conductance modulation (modulation) plus the operation of the equivalent circuit. The conductance modulation occurs in the n-region because minority carriers are injected into the n-region via the p + -n + region. Conductance modulation causes the MOSFET drain-source resistance to decrease. IGBTs have very low turn-on voltage drops due to conductance modulation, which is very difficult to achieve with high voltage MOSFETs.
As shown in fig. 1C, a typical thyristor is a bistable switch (with on and off states) with three PN junctions. The currents (#2 and #3) flowing through the anode (anode) and the cathode (cathode) can be controlled by the gate current (# 1). The gate current (#1) turns on the first transistor 101, and then the second transistor 103 turns on. This produces positive feedback, where one transistor keeps the other on. Once the thyristor turns on, it cannot simply be turned off with the removal of the gate current, but must be turned off by its load side.
The saturation voltage V of the IGBT can be known from the equivalent circuitCE(sat) can be expressed as:
VCE(sat)＝VBE+IMOS(RN-(MOD)+Rch) (1)
wherein, VBEPNP transistor base-emitter voltage;
IMOSdrain current of MOSFET;
RN-(MOD)the resistance of the n-region after the conductance modulation;
RchMOSFET channel resistance.
The PNP transistor collector current and DC current gain are respectively IC(PNP)And hFE(PNP)，IMOSCan be calculated by equation (2).
IMOS＝IC(PNP)/hFE(PNP) (2)
IGBT total current IIGBTCan be represented by formula IIGBT＝IMOS+IC(PNP)And (4) calculating.
Equation (1) shows the saturation voltage V of the IGBTCE(sat) and IMOSIn which IMOSIs PNP transistor DC current gain hFE(PNP)See equation (2)). Due to the gain h of the direct currentFE(PNP)There is a trade-off between switching characteristics (switching characteristics), so the DC gain h of PNP transistorFE(PNP)Greatly influencing the saturation voltage V of the IGBTCE(sat)A trade-off with switching characteristics (switching characteristics).
In view of the needs of industrial applications, the power loss of the present IGBT is still large, thereby reducing the IGBThe depletion of T has been one of the focuses of international research. But in order to reduce the saturation voltage VCE(sat)) The manufacturing cost is increased. Conventional techniques for configuring and fabricating IGBT devices still face many challenges and limitations in further improving the performance of the devices due to various trade-offs. In IGBT devices, conduction losses and turn-off losses EoffThere are trade offs between. At rated current, the conduction loss depends on the collector-to-emitter saturation voltage VCE(sat). More carrier injection can increase the conductivity of the device when the device is on, thus reducing conduction losses, but more minority carriers flow in also resulting in higher turn-off losses when turned off due to the energy consumed to scavenge injected minority carriers.
IGBT devices have different structures, such as planar gate devices and trench gate IGBT devices, among others.
In an IGBT device, conduction loss VCE(sat) (depending on the collector to emitter saturation voltage V at rated currentCE(sat)) and the off-switching loss Eoff. When the device is turned on, more minority carriers are injected, increasing the conductivity of the device, thus reducing conduction losses, but when turned off, the energy consumption is required to drain the injected minority carriers, so that more minority carriers flow in also resulting in a higher Eoff. Unlike planar gate IGBT devices, in trench gate IGBT devices, the gate is buried in a trench that traverses the n + -emitter and p-base regions. Such a gate structure having a trench can greatly increase the device density and can reduce a channel voltage drop (channel voltage drop) compared to a planar gate structure. In addition, a Junction Field Effect Transistor (JFET) is formed between channels of the planar gate structure IGBT, but the trench gate structure IGBT does not form the JFET, so that the trench gate structure IGBT does not have a voltage drop (voltage drop) due to the JFET, and thus it is possible to reduce the on-state voltage drop. In addition, the collector-emitter voltage V of the IGBT is saturatedCE(sat) and breakdown voltage V thereofBDThere is another trade-off between. The IGBT device with the high-density deep groove can overcome the defectAnd (4) simultaneously achieving optimization.
The invention mainly provides a double-gate groove type insulated gate bipolar transistor DG-TIGBT with a novel structure, which has ultra-low on-state voltage, compared with the traditional groove type IGBT, the performance of the double-gate groove type insulated gate bipolar transistor DG-TIGBT is improved by 33 percent, the power loss can be effectively reduced, and the performance optimization of the device is further realized, so that the double-gate groove type insulated gate bipolar transistor DG-TIGBT can become a mainstream device in the field of power electronic application.
Disclosure of Invention
The invention provides a novel insulated gate bipolar transistor with ultralow turn-on voltage, which comprises: a substrate having a first conductivity type; a drift layer of a second conductivity type opposite to the first conductivity type disposed on the substrate; the semiconductor stacking structure is arranged on the drift layer and sequentially comprises a first well region with a first conduction type, a second well region with a second conduction type and a base region with the first conduction type from bottom to top; a first contact source region with a first conductive type and a second contact source region with a second conductive type are arranged on the first conductive type base region and are adjacent to but separated from each other; an emitter electrode contacting the first contact source region and the second contact source region; the first grid is arranged in the corresponding first groove above the substrate; a second grid arranged in a corresponding second groove above the substrate, wherein a grid insulation layer is respectively formed on the side wall of the groove by the first groove and the second groove and is filled with polysilicon; and the first and second trenches respectively extend from the second contact source region and the first contact source region formed in the first conductive type base region to the drift layer vertically.
According to an aspect of the present invention, the first conductivity type is P-type and the second conductivity type is N-type.
According to an aspect of the invention, the P-type base region, the N-type second well region, and the P-type first well region form a low-gain PNP-BJT transistor.
According to an aspect of the invention, wherein the on and off states of the novel insulated gate bipolar transistor with ultra-low turn-on voltage are controlled by the first gate.
According to an aspect of the invention, the second gate provides a minority carrier removal path when the novel insulated gate bipolar transistor with ultra-low turn-on voltage is turned off.
According to an aspect of the invention, widths of the first conductivity type base region and the first well region in a gate depth direction may be used to adjust a start voltage of the insulated gate bipolar transistor.
Drawings
The features, nature and advantages of the present invention may be understood by reference to the detailed description of the preferred embodiments and the accompanying drawings, which are summarized in the description below:
fig. 1A to 1C show a basic structure of an IGBT according to the prior art and an equivalent circuit thereof.
Fig. 2 shows a schematic diagram of an improved double-gate trench IGBT structure according to a preferred embodiment of the invention.
Fig. 3A shows a simulation structure diagram of a conventional double-gate trench IGBT.
Fig. 3B shows a simulation structure diagram of the improved double-gate trench IGBT device.
Fig. 4 shows the output I-V characteristics of the improved double-gate trench IGBT device according to the invention compared to the conventional double-gate trench IGBT device.
Fig. 5 shows a comparison of the turn-on characteristics of the improved double-gate trench IGBT device and the conventional double-gate trench IGBT device, according to a preferred embodiment of the present invention.
Fig. 6A-6B show simulated current flow profiles for a modified double-gate trench IGBT device in an on-state and an off-state, respectively, according to a preferred embodiment of the present invention.
Symbolic description of main devices
101 first transistor 103 second transistor 201 gate oxide
203 polysilicon 204a emitter P + doped region 204b emitter N + doped region
205P + substrate 206N buffer layer 213P-well region
209P base region 211N well 301 gate oxide
307N-type well region 303 gate electrode 305P-type base region
503 curve 601 first gate 603 second gate
Detailed Description
Some preferred embodiments of the invention will now be described in more detail. It should be understood, however, that the description of the preferred embodiments of the present invention is provided for purposes of illustration and not limitation. Furthermore, the invention may be practiced in a wide variety of other embodiments in addition to those specifically described, and the scope of the invention is not specifically limited except as specified in the appended claims.
As mentioned above, with a new structure of double-gate trench-type insulated gate bipolar transistor (DG-TIGBT), a more effective compromise between turn-on voltage (turn-on voltage) and turn-off loss (Eoff) can be provided.
Fig. 2 is a schematic diagram of an improved dual-gate trench IGBT structure according to the present invention, which is improved based on the conventional dual-gate trench IGBT structure. The trench structure has a gate oxide layer (gate oxide layer)201 formed on the sidewall of the trench, and the trench is filled with a polysilicon (polysilicon)203 as a gate electrode. The vertical trench Gate includes a first Gate (Gate 1) and a second Gate (Gate 2), both having a depth extending from a P +/N + doped region (204a/204b) of an emitter (emitter) through a P-base (P-base)209, an N-well (N-well)211, and a P-well (P-well)213 to an N-drift (N-drift) region 215. In a preferred embodiment, the depth of the vertical trench gate is in the range of 5-10 mm. In addition, an N-type buffer layer (N-buffer)206 is formed on the P + (anode/collector) substrate 205, and the N-type drift region 215 is formed on the N-type buffer layer (N-buffer) 206. Compared with the traditional double-grid groove IGBT structure, the improved double-grid groove IGBT structure has more P-base 209 and N-well211, wherein the P-base 209, the N-well211 and the P-well 213 form a PNP transistor with low gain (low-gain), and the conductance modulation effect of the N-drift region 215 is enhanced.
It is clear from fig. 2 that only the first Gate (Gate 1) controls the N-channel in the new and improved structure, i.e., Gate 1 controls the N-channel MOSFET (N + doped region 207, P-base 209, and N-well 211), and current flows only when in the on state. The second Gate (Gate 2) is formed without an N-channel, because in the off state of the device, the low-gain PNP-BJT transistor formed by the P-base 209, the N-well211, and the P-well 213 forms a similar barrier that inhibits minority carriers injected from the collector through the P + substrate 205 from flowing through the channel to the emitter, but allows the minority carriers to be rapidly removed through the Gate 2 path, which can allow the inversion layer (P-channel) to be formed near the surface area of the Gate oxide 201 of the Gate 2 in the off state of the device by properly adjusting the doping concentrations of the P-base 209 and the P-well 213. Meanwhile, in the on state, part of the electron current flows through the sidewall of the Gate 1 trench, and part of the electron current flows through the N-channel formed in the P-base 209 region and then is injected into the P + substrate 205 through the NPN transistor formed by the N-well 211/P-well 213/N-drift 215, so that the operation speed of the switching device is not affected by the additional minority carriers as much as possible.
Wherein the doping concentration of the P-type well region (first well region) 213 is 3 × 1014cm-3To 5X 1014cm-3In between, the doping concentration of the N-type well region (second well region) 211 is 2 × 1016cm-3To 4X 1016cm-3To (c) to (d); wherein the doping concentration of the P-type base region 209 is 1 × 1018cm-3To 2X 1018cm-3To (c) to (d); the doping concentration of the P-type first contact source region 204a is 2.7 × 1019cm-3To 2.8X 1019cm-3To (c) to (d); the doping concentration of the N-type second contact source region 204b is 9.5 × 1019cm-3To 9.6X 1019cm-3In the meantime.
In addition, the improvement proposed by the present inventionIn the structure of the double-grid groove type IGBT, if the doping concentration of one of the P-base layer 209 and the P-well layer 213 is changed, the surface area relative to the depth direction of the groove is not easy to invert to form an N-type channel when the doping concentration is higher, and then the starting voltage V isGEThe larger (th) is. On the contrary, when the doping concentration is lower, the surface area corresponding to the depth direction of the groove is easy to form an N-type channel in an inversion mode, and the starting voltage V isGEThe smaller the tendency (th) will be. Meaning that the P-base layer 209 and the P-well layer 213 can be used to adjust the starting voltage V of the IGBT deviceGE(th)。
Fig. 3A and 3B are schematic structural diagrams of a conventional dual-gate trench IGBT (fig. 3A) and a modified dual-gate trench IGBT device (fig. 3B), respectively. The trench structure has a gate oxide layer 301 formed on the sidewall of the trench, and the trench is filled with polysilicon as a gate electrode 303 (diagonal region), and the improved double-gate trench IGBT device structure has an extra P-base layer 305 and an extra N-well layer 307.
Fig. 4-5 show the characteristics of the improved double-gate trench IGBT device compared to the conventional double-gate trench IGBT device.
FIG. 4 is a comparison of the output I-V characteristics of the improved double-gate trench IGBT device and the conventional double-gate trench IGBT device, showing the collector-emitter current (I) obtained from simulating individual devicesCE) To collector-emitter turn-on voltage (V)CE) Characteristic curve. Curve 401 is the collector-emitter current (I) of the improved double-gate trench IGBT device proposed by the present inventionCE) To collector-emitter turn-on voltage (V)CE) Characteristic curve, curve 403 is collector-emitter current (I) of conventional double-gate trench IGBT deviceCE) To collector-emitter turn-on voltage (V)CE) Characteristic curve. From the simulation results, at the rated current density (J-150A/cm)2) Saturation voltage V of lower improved double-grid groove type IGBT deviceCE(sat) is 1.24V, while the conventional double-gate trench IGBT device is 1.85V, which is a reduction of 0.61V, i.e. a device performance improvement of 33%.
FIG. 5 shows an improved double-gate trench IGBT device and methodComparison of the turn-on characteristics of conventional dual-gate trench IGBT devices shows the collector-emitter current (I) resulting from the simulation of individual devicesCE) For gate-emitter start voltage (V)GE) Characteristic curve. Curve 501 is the collector-emitter current (I) of the improved double-gate trench IGBT device proposed by the present inventionCE) To gate-emitter voltage (V)GE) Curve 503 shows the collector-emitter current (I) of a conventional double-gate trench IGBT deviceCE) To gate-emitter voltage (V)CE) Characteristic curve. From the simulation results, the starting voltage VGE(th) are almost close to both 5.9V (modified) and 6.0V (conventional), respectively, and the device can operate normally.
Fig. 6A-6B show simulated current profiles of the improved double-gate trench IGBT device in the on-state and off-state of the device. As shown in fig. 6A, in the on-state of the device, the first Gate (Gate 1)601 controls the N channel (N + to N-well region on the right side of the drawing) on a single side, and only on this side, the current flows, and the second Gate (Gate 2)603 has no channel formed, so no current flows. In the off-state of the device, as shown in fig. 6B, the leakage current is distributed and flows, and the leakage current passes through each of Gate 1 and Gate 2.
The invention provides a novel double-gate trench IGBT with ultralow turn-on voltage, which has lower saturation voltage V compared with the traditional double-gate trench IGBT deviceCE(sat), the performance is improved by 33%, and the new device characteristic is to add a low-gain PNP-BJT, which replaces the original P-well minority carrier subcollector from the drift region to the emitter to form a similar potential barrier, and can prohibit the minority carrier injected from the collector through the P + anode substrate from flowing to the emitter through the channel, but can rapidly remove the minority carrier through the second Gate (Gate 2) path. So that the operating speed of the switching device is as little affected as possible by the additional minority carriers. And the PNP transistor with low gain enhances the power of the N drift regionLeading to a modulation effect.
As will be appreciated by those skilled in the art, the foregoing preferred embodiments of the present invention are provided for illustration and not for the purpose of limiting the invention. Having described the invention in connection with preferred embodiments, modifications will occur to those skilled in the art. Therefore, the present invention is not limited to the technical contents described in the embodiments, but the present invention is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims, the scope of which should be accorded the broadest interpretation so as to encompass all such modifications and similar structures. While the preferred embodiments of the invention have been illustrated and described, it will be appreciated that various changes can be made therein without departing from the spirit and scope of the invention.
Claims (3)
1. A novel insulated gate bipolar transistor, comprising: a substrate having a first conductivity type; a drift layer of a second conductivity type opposite to the first conductivity type disposed on the substrate; a semiconductor stack structure is arranged on the drift layer, and the stack structure sequentially comprises a first well region with a first conduction type, a second well region with a second conduction type and a base region with the first conduction type from bottom to top; a first contact source region with a first conductive type and a second contact source region with a second conductive type are arranged on the first conductive type base region and are adjacent to but separated from each other; an emitter electrode contacting the first contact source region and the second contact source region; the first grid is arranged in the corresponding first groove above the substrate; a second grid arranged in a corresponding second groove above the substrate, wherein a grid insulation layer is respectively formed on the side wall of the groove by the first groove and the second groove and is filled with polysilicon; the first and second trenches respectively extend from the second contact source region and the first contact source region formed in the first conductive type base region to the drift layer.
2. The novel insulated gate bipolar transistor according to claim 1, wherein the first conductivity type semiconductor is an N-type semiconductor, and the second conductivity type semiconductor is a P-type semiconductor; or the first conductivity type semiconductor is a P-type semiconductor and the second conductivity type semiconductor is an N-type semiconductor.
3. The novel insulated gate bipolar transistor according to claim 1, wherein the P-type base region, the N-type second well region, and the P-type first well region form a low-gain PNP-BJT transistor; the on and off states of the novel insulated gate bipolar transistor with the ultra-low turn-on voltage are controlled by the first grid; wherein the second gate provides a minority carrier removal path when the novel insulated gate bipolar transistor with ultra-low turn-on voltage is turned off; the widths of the first conductivity type base region and the first well region in the depth direction of the gate electrode can be used for adjusting the starting voltage of the insulated gate bipolar transistor.
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN114628496A (en) * | 2022-05-13 | 2022-06-14 | 江苏游隼微电子有限公司 | Multi-groove power MOSFET structure and manufacturing method thereof |
| CN116053139A (en) * | 2023-01-09 | 2023-05-02 | 深圳吉华微特电子有限公司 | Manufacturing method of semiconductor device with groove-type double-gate structure |
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| CN114628496A (en) * | 2022-05-13 | 2022-06-14 | 江苏游隼微电子有限公司 | Multi-groove power MOSFET structure and manufacturing method thereof |
| CN116053139A (en) * | 2023-01-09 | 2023-05-02 | 深圳吉华微特电子有限公司 | Manufacturing method of semiconductor device with groove-type double-gate structure |
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