CN110911377B - 具有半导体芯片端子的dc-dc转换器 - Google Patents

具有半导体芯片端子的dc-dc转换器 Download PDF

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Publication number
CN110911377B
CN110911377B CN201911107083.3A CN201911107083A CN110911377B CN 110911377 B CN110911377 B CN 110911377B CN 201911107083 A CN201911107083 A CN 201911107083A CN 110911377 B CN110911377 B CN 110911377B
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chip
pad
terminal
recessed portion
semiconductor device
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Chinese (zh)
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CN110911377A (zh
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奥斯瓦尔多·乔治·洛佩斯
乔纳森·阿尔梅里亚·努吉尔
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Texas Instruments Inc
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Texas Instruments Inc
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Priority claimed from US14/173,147 external-priority patent/US9184121B2/en
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/811Multiple chips on leadframes
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00Conversion of DC power input into DC power output
    • H02M3/02Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/10Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M3/145Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M3/155Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
    • HELECTRICITY
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    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40Leadframes
    • H10W70/411Chip-supporting parts, e.g. die pads
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    • H10W70/40Leadframes
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    • H10W70/40Leadframes
    • H10W70/461Leadframes specially adapted for cooling
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    • H10W70/40Leadframes
    • H10W70/464Additional interconnections in combination with leadframes
    • H10W70/465Bumps or wires
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    • H10W70/464Additional interconnections in combination with leadframes
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    • H10W70/481Leadframes for devices being provided for in groups H10D8/00 - H10D48/00
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    • H10W74/00Encapsulations, e.g. protective coatings
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    • H10W74/012Manufacture or treatment of encapsulations on active surfaces of flip-chip devices, e.g. forming underfills
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    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
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    • H10W74/15Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
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    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07331Connecting techniques
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    • H10W72/00Interconnections or connectors in packages
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    • H10W72/321Structures or relative sizes of die-attach connectors
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    • H10W72/351Materials of die-attach connectors
    • H10W72/353Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
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    • H10W72/541Dispositions of bond wires
    • H10W72/5445Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
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    • H10W72/541Dispositions of bond wires
    • H10W72/5449Dispositions of bond wires not being orthogonal to a side surface of the chip, e.g. fan-out arrangements
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    • H10W72/60Strap connectors, e.g. thick copper clips for grounding of power devices
    • H10W72/651Materials of strap connectors
    • H10W72/655Materials of strap connectors of outermost layers of multilayered strap connectors, e.g. material of a coating
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    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
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    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
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    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink
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    • H10W90/761Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/763Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between laterally-adjacent chips
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    • H10W90/761Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors
    • H10W90/766Package configurations characterised by the relative positions of pads or connectors relative to package parts of strap connectors between a chip and a stacked lead frame, conducting package substrate or heat sink

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Dc-Dc Converters (AREA)
CN201911107083.3A 2014-02-05 2015-02-05 具有半导体芯片端子的dc-dc转换器 Active CN110911377B (zh)

Applications Claiming Priority (6)

Application Number Priority Date Filing Date Title
US14/173,147 2014-02-05
US14/173,147 US9184121B2 (en) 2014-02-05 2014-02-05 Stacked synchronous buck converter having chip embedded in outside recess of leadframe
US14/481,204 US9171828B2 (en) 2014-02-05 2014-09-09 DC-DC converter having terminals of semiconductor chips directly attachable to circuit board
US14/481,204 2014-09-09
CN201580007418.8A CN105981170B (zh) 2014-02-05 2015-02-05 具有半导体芯片端子的dc-dc转换器
PCT/US2015/014655 WO2015120173A1 (en) 2014-02-05 2015-02-05 Dc-dc converter having terminals of semiconductor chips

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
CN201580007418.8A Division CN105981170B (zh) 2014-02-05 2015-02-05 具有半导体芯片端子的dc-dc转换器

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CN110911377A CN110911377A (zh) 2020-03-24
CN110911377B true CN110911377B (zh) 2022-07-22

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CN201911107083.3A Active CN110911377B (zh) 2014-02-05 2015-02-05 具有半导体芯片端子的dc-dc转换器
CN201580007418.8A Active CN105981170B (zh) 2014-02-05 2015-02-05 具有半导体芯片端子的dc-dc转换器

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US (4) US9171828B2 (https=)
EP (1) EP3130009B1 (https=)
JP (1) JP6509885B2 (https=)
CN (2) CN110911377B (https=)
WO (1) WO2015120173A1 (https=)

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US9171828B2 (en) * 2014-02-05 2015-10-27 Texas Instruments Incorporated DC-DC converter having terminals of semiconductor chips directly attachable to circuit board
US20170018487A1 (en) * 2015-07-15 2017-01-19 Broadcom Corporation Thermal enhancement for quad flat no lead (qfn) packages
JP6011737B1 (ja) * 2016-03-14 2016-10-19 富士電機株式会社 降圧チョッパ回路
JP6011736B1 (ja) * 2016-03-14 2016-10-19 富士電機株式会社 昇圧チョッパ回路
FR3073080B1 (fr) * 2017-10-26 2021-01-08 St Microelectronics Srl Circuit integre en boitier qfn
CN108345712B (zh) * 2018-01-10 2021-10-15 杭州士兰集成电路有限公司 计算半导体器件的频率与电流关系的方法和装置
US11476232B2 (en) 2019-03-25 2022-10-18 Analog Devices International Unlimited Company Three-dimensional packaging techniques for power FET density improvement
JP6709313B1 (ja) * 2019-05-31 2020-06-10 アオイ電子株式会社 半導体装置および半導体装置の製造方法
US11024564B2 (en) 2019-06-19 2021-06-01 Texas Instruments Incorporated Packaged electronic device with film isolated power stack
US11742267B2 (en) * 2020-10-12 2023-08-29 Toyota Motor Engineering And Manufacturing North America, Inc. Power electronics assembly having flipped chip transistors
EP4057341A1 (en) * 2021-03-12 2022-09-14 Nexperia B.V. Packaged half-bridge circuit
DE102021133665A1 (de) 2021-12-17 2023-06-22 Infineon Technologies Ag Halbleitervorrichtung mit einem Premolded-Leadframe und einem Halbleiterpackage
US12261101B2 (en) * 2022-06-28 2025-03-25 Alpha And Omega Semiconductor International Lp Semiconductor package having wettable lead flanks and tie bars and method of making the same
IT202300006201A1 (it) * 2023-03-30 2024-09-30 St Microelectronics Int Nv Modulo di potenza multi-livello con effetti parassitici ridotti

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