CN110824336A - Test system and test method - Google Patents
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- CN110824336A CN110824336A CN201910959351.8A CN201910959351A CN110824336A CN 110824336 A CN110824336 A CN 110824336A CN 201910959351 A CN201910959351 A CN 201910959351A CN 110824336 A CN110824336 A CN 110824336A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/2851—Testing of integrated circuits [IC]
- G01R31/2855—Environmental, reliability or burn-in testing
- G01R31/286—External aspects, e.g. related to chambers, contacting devices or handlers
- G01R31/2868—Complete testing stations; systems; procedures; software aspects
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Abstract
The embodiment of the invention provides a test system and a test method, which comprise at least two test boards, communication boards, an exchanger and terminals, wherein the number of the communication boards is the same as that of the test boards; each test board and one communication board are connected with the terminal through serial ports and used for sending test instructions corresponding to the at least two communication boards to the switch through network connection; the switch is used for respectively forwarding the received test instructions to the corresponding communication boards; the communication board is used for analyzing the received test instruction and sending the analyzed test instruction to the corresponding test board through the serial port; the test board is used for executing a test function according to the received analyzed test instruction. Therefore, the test reliability and the resource utilization rate can be improved.
Description
Technical Field
The present application relates to the field of electronic technologies, and in particular, to a test system and a test method.
Background
At present, before chips enter the market, some high and low temperature reliability tests are required, including high and low temperature power cycle tests, high and low temperature dynamic cycle tests, high and low temperature life cycle aging tests and the like.
In the existing reliability test system, a test board, an out-of-box communication board and a direct current voltage stabilizing source are connected through a high temperature resistant wire, and a data wire is connected with a terminal and the communication board. The test device has the following problems: one test board needs at least one computer, so that under the condition of multiple test items, a plurality of computers are needed, the resource utilization rate is low due to the fact that management is not easy, and then the problem that the test reliability is low due to too many external wires is caused, and the like, and the test requirement is not met.
Disclosure of Invention
An object of the embodiments of the present application is to provide a test system, which can control a plurality of test items through a terminal, and is beneficial to unified and standardized management and control of testing, and improves testing efficiency.
In order to solve the above problems, an embodiment of the present invention discloses a test system, where the test system includes at least two test boards, communication boards, switches, and terminals, where the number of the communication boards is the same as that of the test boards;
each test board is connected with one communication board through a serial port;
the terminal is used for sending test instructions corresponding to the at least two communication boards to the switch through network connection;
the switch is used for respectively forwarding the received test instructions to the corresponding communication boards;
the communication board is used for analyzing the received test instruction and sending the analyzed test instruction to the corresponding test board through the serial port;
the test board is used for executing a test function according to the received analyzed test instruction.
On the other hand, the embodiment of the invention discloses a test method which is applied to a test system and is characterized in that the test system comprises at least two test boards, communication boards, an exchanger and terminals, wherein the number of the communication boards is the same as that of the test boards; each test board is connected with one communication board through a serial port; the method comprises the following steps:
sending test instructions corresponding to the at least two communication boards to the switch through the terminal;
respectively forwarding the received test instructions to corresponding communication boards through the switch;
analyzing the received test instruction through the communication board, and sending the analyzed test instruction to a corresponding test board through the serial port;
and executing a test function according to the received analyzed test instruction through the test board.
The embodiment of the invention has the following advantages:
the embodiment of the invention provides a test system, which can execute chip test tasks through at least two test boards, communication boards with the same number as the test boards, a switch and a terminal in the test system, wherein each test board is connected with one communication board through a serial port, so that the number of wires between equipment can be reduced, and the test reliability is improved. In addition, the terminal is used for sending test instructions corresponding to the at least two communication boards to the switch through network connection; the switch is used for respectively forwarding the received test instructions to the corresponding communication boards; the communication board is used for analyzing the received test instruction and sending the analyzed test instruction to the corresponding test board through the serial port; the test board is used for executing a test function according to the received analyzed test instruction. Therefore, the test efficiency can be improved, mutual interference among projects can be avoided, and the resource utilization rate can be improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings needed to be used in the description of the embodiments of the present invention will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other drawings can be obtained according to these drawings without inventive labor.
Fig. 1 is a schematic structural diagram of a test system according to a first embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a test system according to a second embodiment of the present invention;
fig. 3 is a flowchart illustrating steps of a testing method according to a third embodiment of the present invention.
Detailed Description
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in further detail below.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Fig. 1 is a schematic structural diagram of a test system 100 according to an embodiment of the present invention, where the test system includes: at least two test boards 101, communication boards 102 in the same number as the test boards, a switch 103, and terminals 104. Wherein, each test board is connected with a communication board through the serial ports.
Currently, a communication board and a PC (Personal Computer) are usually connected through a USB (universal serial Bus), so that each communication board needs at least one PC during a test process, which wastes resources and results in low test efficiency. Therefore, the embodiment of the invention changes the existing connection mode, connects the communication boards to the switch through the network cable, and the switch is uniformly converged to the local area network, so that a plurality of test boards can be operated through one terminal, and the resource utilization rate and the test efficiency can be improved.
The terminal specifically includes but is not limited to: smart phones, tablet computers, electronic book readers, MP3 (Moving Picture Experts Group Audio Layer III) players, MP4 (Moving Picture Experts Group Audio Layer 4) players, laptop portable computers, car-mounted computers, desktop computers, set-top boxes, smart televisions, wearable devices, and the like.
And the terminal is used for sending the test instructions corresponding to the at least two communication boards to the switch through network connection.
In the embodiment of the invention, the test tasks respectively corresponding to the at least two communication boards can be created through the terminal, the test instructions corresponding to the test tasks are generated, and the terminal sends the test instructions respectively corresponding to the at least two communication boards to the switch through the local area network in an Ethernet communication mode.
The switch is used for respectively forwarding the received test instructions to the corresponding communication boards, and the communication boards are connected to the switch through network cables.
The communication boards are connected with the switch through network cables for communication, and the switch receives test instructions which are sent by the terminal and respectively correspond to at least two communication boards, and distributes the test instructions to the corresponding communication boards.
The communication board is used for analyzing the received test instruction and sending the analyzed test instruction to the corresponding test board through the serial port.
The communication board analyzes the test instruction after receiving the instruction through the onboard network port, and the communication board and the test board adopt the one-to-one correspondence relationship of the board to the board, so that the analyzed test instruction can be sent to the corresponding test board through the serial port.
The test board is used for executing a test function according to the received analyzed test instruction.
The test board receives the analyzed test instruction sent by the communication board through the serial port, and executes a test function according to the test instruction, wherein the test function comprises the following steps: high and low temperature tests, aging tests and the like, and the communication function between the terminal and the test board is realized.
The present embodiment includes the following advantages: the test system abandons the hard software of the original test system, realizes the connection of the communication board and the test board in a board-to-board manner through the serial port, can reduce the number of the wires, and enhances the test reliability and stability; a plurality of communication boards pass through a plurality of communication boards of net twine and pass through net twine and be connected to the switch, by the unified collection of switch to LAN, a plurality of test tasks can be controlled to a terminal, can improve resource utilization, save the test cost, do benefit to the test standardization management.
Example two
Fig. 2 shows a schematic structural diagram of a test system 200 according to another embodiment of the present invention, which includes at least two test boards 201, communication boards 202 having the same number as the test boards, a switch 203, and terminals 204. The test system further comprises an incubator 205, the test board is arranged in the incubator, and the communication board is arranged outside the incubator; the incubator is provided with a switch power supply 2051 for supplying power to the test system. The wall of the incubator is provided with serial slots 2052 for connecting test boards and communication boards, each test board being connected to one communication board via a serial port.
In the embodiment of the invention, the test system further comprises an incubator, the test board is arranged in the incubator, and the communication board is arranged outside the incubator; the incubator can be provided with a switching power supply for supplying power to the test system, so that the test cost can be saved, the test space can be saved, and the portability can be enhanced. The tank wall of incubator is provided with the serial ports slot, can change the mode of line connection between communication board and the test panel among the prior art into serial ports connection, reduces and drags line quantity, reinforcing test reliability.
Optionally, the serial port slot may be a gold finger slot, so that the board-to-board connection between the communication board and the test board may be achieved.
The terminal is used for sending the test instructions respectively corresponding to the at least two communication boards to the switch through network connection, and optionally, each communication board has fixed address information.
Optionally, one test board includes at least one chip to be tested, where the test board marks different address information according to a position of the chip to be tested, and the chip to be tested may be an MCU (micro controller Unit) chip.
The switch is used for respectively forwarding the received test instructions to the corresponding communication boards.
The communication board is used for analyzing the received test instruction and sending the analyzed test instruction to the corresponding test board through the serial port.
The test board is used for executing a test function according to the received analyzed test instruction.
The switch can send a test instruction to the appointed communication board according to the Address information of the communication board, and because each test board is connected with one communication board through a serial port and is in one-to-one correspondence relation, the test system can send the instruction to the corresponding communication board and then send the instruction to the corresponding test board, the fixed test information can be an IP Address (Internet Protocol Address network Protocol Address), each test board at most comprises ten chips to be tested, each chip is marked with different ID (identification identity) information before the test of each time is started, and if the ID 0-9 is respectively burnt according to the chip position for identifying different chips, the same test task can be executed on one test board. Therefore, the terminal sends the test instruction to the switch and can accurately forward to the appointed communication board, instruct the communication board to send the analyzed test instruction to the corresponding test board and any chip on the test board to execute the test function, and the test function includes: high and low temperature tests, aging tests, and the like.
The instructions all adopt a response mechanism, and if no response exists, the test instructions are sent again.
And the terminal is also used for sending the configuration instruction and/or the query instruction respectively corresponding to the at least two communication boards to the switch through network connection.
The switch is also used for respectively forwarding the received configuration instruction and/or query instruction to the corresponding communication boards;
the communication board is also used for executing the configuration function and/or the query function according to the received configuration instruction and/or the query instruction.
The terminal can also monitor the working state of the communication board, if the test instruction after the analysis of the communication board is a query instruction, the current working state of the communication board is queried in response to the query instruction sent by the terminal through the Ethernet, and the current working state of the communication board is returned through the switch, the current working state is displayed at the terminal as an idle communication board, and the working state comprises the following steps: there is idle, in configuration, in test, test complete, etc. The user can select the communication board equipment with the working state of idle for communication connection at the terminal, and once the connection is successful, the state of the communication board is switched into the configuration.
When the test board responds to the test instruction to execute the test function, the working state of the communication board can be switched to be in the test, the task to be tested is completed, the working state of the communication board can be switched to be in the test completion, and once the test is interrupted, the communication board can switch the working state to be idle. And the working state is displayed on the terminal, so that a user can visually know the working state of each communication board and the corresponding test board through the terminal and selectively adjust tasks.
If the test instruction obtained after the analysis of the communication board is a configuration instruction, responding to the configuration instruction sent by the terminal through the Ethernet, and executing configuration operation on the communication board, wherein any one of the following operations is executed: and the communication board is controlled to complete upgrading, voltage configuration, power supply switch configuration, abnormal alarm and the like.
In the embodiment of the present invention, the communication board may adopt an IAP (In Application Programming) + APP (Application program) structure design, and can perform internal APP update, so that the update of the internal APP of the communication board can be completed by responding to a configuration instruction, such as querying a working state software of the communication board, detecting an abnormal alarm software, and the like.
Wherein, IAP is programmed in the program, APP is the application program, and the IAP + APP structure design is programmed in the application program. When the APP in the communication board needs to be updated, the terminal sends a firmware BIN File (binary File) and HASH (Hash code) and signature for verifying the integrity and security of the BIN File to the communication board needing to be updated through a TFTP (simple File transfer protocol) protocol, the communication board stores the data in a specific area (backup area) of an on-chip FLASH after receiving the data, the integrity and correctness of the data content are verified after the firmware BIN File is sent, a specific flag bit is set after the verification is passed, and then the updating process is formally started. The communication board code can jump to an IAP program part at the moment, the part of code can firstly judge that a flag bit of BIN file downloading is set, then part of code of APP is erased, the content of a backup area is transported to an APP area, the integrity and the correctness of data are verified after the transportation is completed, and the communication board code jumps to the APP area to continue to run the code after the verification is passed. If the verification fails, the transport operation from the backup area to the APP area is executed again, so that the internal APP updating is completed.
The communication board responds to the configuration instruction, and the process of configuring the power supply switch to supply power to the test module is as follows, wherein the test module comprises the communication board and the test board. The communication board is provided with 5 paths of power supplies for supplying power, the switches can be controlled by a main control chip on the communication board respectively, a first path of VBAT (Voltage Battery) controls a switch circuit through an IO port (In/Out, input/output port) of the main control chip, and 10 paths of VBAT are controlled to the test board through serial ports respectively; the second path of VDD/VDDA1(Voltage Drain, power Voltage) and the third path of VDD/VDDA2 respectively control the switch circuit through the IO port of the main control chip, and respectively control 5 paths to the test board through the serial ports; the fourth path of 5VIO (Voltage In/Out offset Voltage) controls the switch circuit through the IO port of the main control chip and respectively controls 10 paths to the test board through the serial port; and a fifth path of VBAK (backup power supply input pin) controls the switch circuit through an IO port of the main control chip and respectively controls 10 paths of VBAK to the test board through the serial port (temporary reservation function).
The present embodiment includes the following advantages: the reliability testing device abandons the hard software of the original device testing system, adopts a mode that a testing incubator is provided with a switching power supply to supply power to the communication board, adopts a serial port to connect the communication board and the corresponding testing board, changes the mode that the original communication board is connected with the testing board through a connecting wire and the communication board is connected with a computer through a USB, reduces the number of wires dragged between equipment, saves the testing cost, saves the testing space, and improves the testing reliability and the portability; a plurality of test communication boards pass through the net twine and are connected to the switch, by the unified collection of switch to LAN, a plurality of test items can be controlled through the ethernet mode to a terminal, can not interfere with each other between the item, can do benefit to the unified normalized management of test and control, improve work efficiency.
EXAMPLE III
Fig. 3 is a flow chart showing steps of a test method according to another embodiment of the present invention.
The test method can be applied to the test system, and the test system comprises at least two test boards, communication boards, an exchanger and terminals, wherein the number of the communication boards is the same as that of the test boards; each test board is connected with one communication board through a serial port; the method comprises the following steps:
301, sending test instructions corresponding to the at least two communication boards to the switch through the terminal;
and step 304, executing a test function according to the received analyzed test instruction through the test board.
Optionally, in the test system, one test board includes at least one chip to be tested, and the test board marks different address information according to a chip position.
Optionally, in the test system, each communication board has fixed address information.
Optionally, in the test system, the terminal is further configured to send, to the switch, a configuration instruction and/or a query instruction corresponding to each of the at least two communication boards through network connection; the switch is also used for respectively forwarding the received configuration instruction and/or query instruction to the corresponding communication boards; the communication board is also used for executing the configuration function and/or the query function according to the received configuration instruction and/or the query instruction.
Optionally, in the test system, the query instruction is used to query a current working state of the communication board; the current working state comprises: there is idle, in configuration, in test, test complete.
Optionally, in the test system, the configuration instruction is used to perform configuration operation on the communication board; the configuration operation comprises any one of the following operations: and controlling the communication board to complete upgrading, voltage configuration and power supply switch configuration.
Optionally, in the test system, the test system further includes an incubator, the test board is disposed in the incubator, and the communication board is disposed outside the incubator; the incubator is provided with a switching power supply and is used for supplying power to the test system.
Optionally, in the test system, a serial slot is formed in a wall of the incubator and used for connecting the test board and the communication board.
While preferred embodiments of the present invention have been described, additional variations and modifications of these embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the embodiments of the invention.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or terminal that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or terminal. Without further limitation, the use of the phrase "comprising a" or "comprises" does not exclude the presence of other elements, integers or steps, other than those listed, which may be present in a process, method, article or terminal apparatus which comprises the element.
The above detailed description is provided for the chip testing system provided by the present invention, and the principle and the implementation of the present invention are explained by applying specific examples, and the description of the above examples is only used to help understanding the method and the core idea of the present invention; meanwhile, for a person skilled in the art, according to the idea of the present invention, there may be variations in the specific embodiments and the application scope, and in summary, the content of the present specification should not be construed as a limitation to the present invention.
Claims (10)
1. A test system is characterized by comprising at least two test boards, communication boards, an exchanger and terminals, wherein the number of the communication boards is the same as that of the test boards; each test board is connected with one communication board through a serial port;
the terminal is used for sending test instructions corresponding to the at least two communication boards to the switch through network connection;
the switch is used for respectively forwarding the received test instructions to the corresponding communication boards;
the communication board is used for analyzing the received test instruction and sending the analyzed test instruction to the corresponding test board through the serial port;
the test board is used for executing a test function according to the received analyzed test instruction.
2. The test system of claim 1, wherein one test board comprises at least one chip under test, and the test board marks different address information according to the position of the chip under test.
3. The test system of claim 1, wherein each communication board has fixed address information.
4. The test system according to claim 1, wherein the terminal is further configured to send a configuration instruction and/or a query instruction corresponding to each of the at least two communication boards to the switch through a network connection;
the switch is also used for respectively forwarding the received configuration instruction and/or query instruction to the corresponding communication boards;
the communication board is also used for executing the configuration function and/or the query function according to the received configuration instruction and/or the query instruction.
5. The test system of claim 4, wherein the query instruction is used for querying a current working state of the communication board; the current working state comprises: there is idle, in configuration, in test, test complete.
6. The test system of claim 4, wherein the configuration instructions are configured to perform configuration operations on the communication board; the configuration operation comprises any one of the following operations: and controlling the communication board to complete upgrading, voltage configuration and power supply switch configuration.
7. The test system of claim 1, further comprising an incubator, the test board being disposed within the incubator, the communication board being disposed outside the incubator; the incubator is provided with a switching power supply and is used for supplying power to the test system.
8. The test system of claim 7, wherein the wall of the incubator is provided with serial slots for connecting the test board and the communication board.
9. A test method is applied to a test system and is characterized in that the test system comprises at least two test boards, communication boards, an exchanger and terminals, wherein the number of the communication boards is the same as that of the test boards; each test board is connected with one communication board through a serial port; the method comprises the following steps:
sending test instructions corresponding to the at least two communication boards to the switch through the terminal;
respectively forwarding the received test instructions to corresponding communication boards through the switch;
analyzing the received test instruction through the communication board, and sending the analyzed test instruction to a corresponding test board through the serial port;
and executing a test function according to the received analyzed test instruction through the test board.
10. The method of claim 1, wherein one test board comprises at least one chip under test, and the test board marks different address information according to the chip position.
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| CN115333987B (en) * | 2022-08-11 | 2023-12-29 | 北京广利核系统工程有限公司 | Interface test system and method |
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