CN110096291A - Power management chip upgrades circuit, method and the network equipment - Google Patents
Power management chip upgrades circuit, method and the network equipment Download PDFInfo
- Publication number
- CN110096291A CN110096291A CN201910302145.XA CN201910302145A CN110096291A CN 110096291 A CN110096291 A CN 110096291A CN 201910302145 A CN201910302145 A CN 201910302145A CN 110096291 A CN110096291 A CN 110096291A
- Authority
- CN
- China
- Prior art keywords
- power management
- logic device
- programmable logic
- management chip
- master control
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F8/00—Arrangements for software engineering
- G06F8/60—Software deployment
- G06F8/65—Updates
Landscapes
- Engineering & Computer Science (AREA)
- Software Systems (AREA)
- General Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Security & Cryptography (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
Abstract
The disclosure proposes that a kind of power management chip upgrades circuit, method and the network equipment, is related to field of computer technology.The power management chip upgrading circuit includes master control borad and business board, the business board includes the first programmable logic device and power management chip, first programmable logic device is communicated to connect with the master control borad and the power management chip respectively, the master control borad, for sending power management upgrade procedure to first programmable logic device, first programmable logic device, for the power management upgrade procedure received to be sent to the power management chip, the power management chip, for being upgraded based on the power management upgrade procedure.The disclosure can be improved the reliability to power management chip upgrading.
Description
Technical field
This disclosure relates to field of computer technology, in particular to a kind of power management chip upgrading circuit, method and
The network equipment.
Background technique
With the development of computer technology, the application of various network equipment is also more and more extensive, such as router, clothes
Business device etc..The operation of the network equipment be unable to do without the support of electric energy, therefore power management chip is typically provided in the network equipment,
To be managed to the power-supply system in the network equipment.And in order to improve the effect to power-supply system management, power management
The upgrading of chip is also increasingly subject to widely pay close attention to.
In the prior art, the network equipment includes power management chip upgrading circuit, which includes master control borad and business board,
It is provided with CPU (Central Processing Unit, central processing unit) on the master control borad and the business board, on master control borad
CPU connect with the CPU on business board by bus, the CPU on business board passes through the power management on bus and the business board
Chip connection.When upgrading to power management chip, power management upgrade procedure is sent to by master control borad CPU by bus
CPU on business board, the upper CPU of business board receive the power management upgrade procedure, and the power management upgrade procedure is sent out
Power management chip is given, later, power management chip can be upgraded based on the power management upgrade procedure.
But due to needing CPU on business board to participate in complete the upgrading of power management chip, and the reliability of CPU
Very poor, when the program in CPU breaks down, may result in power management chip can not normally upgrade, i.e., to power management
The reliability that chip is upgraded is lower.
Summary of the invention
The disclosure is designed to provide a kind of power management chip upgrading circuit, method and the network equipment, to improve pair
The reliability that power management chip is upgraded.
To achieve the goals above, the disclosure the technical solution adopted is as follows:
In a first aspect, the disclosure proposes a kind of power management chip upgrading circuit, the circuit includes master control borad and business
Plate;
The business board includes the first programmable logic device and power management chip, first programmable logic device
It is communicated to connect respectively with the master control borad and the power management chip;
The master control borad, for sending power management upgrade procedure to first programmable logic device;
First programmable logic device, for the power management upgrade procedure received to be sent to the electricity
Source control chip;
The power management chip, for being upgraded based on the power management upgrade procedure.
Optionally, the master control borad is provided with the second programmable logic device and processor, second programmable logic
Device is connect with first programmable logic device and the processor communication respectively.
Optionally, by IIC, (Inter-Integrated Circuit integrates electricity to first programmable logic device
Road) bus and the power management chip communicate to connect.
Optionally, second programmable logic device passes through proprietary protocol bus and first programmable logic device
Communication connection, second programmable logic device are connect with the processor by Local bus communication.
Optionally, first programmable logic device and second programmable logic device include CPLD (Complex
Programmable Logic Device, Complex Programmable Logic Devices).
Second aspect, the disclosure also propose that power management chip upgrade method, the method are applied to described in first aspect
Power management chip upgrade circuit, which comprises
The master control borad sends power management upgrade procedure to first programmable logic device;
The power management upgrade procedure received is sent to the power supply pipe by first programmable logic device
Manage chip;
The power management chip is based on the power management upgrade procedure and is upgraded.
Optionally, the master control borad includes the second programmable logic device, and first programmable logic device passes through private
There are protocol bus and second programmable logic device to communicate to connect;The master control borad is to first programmable logic device
Send power management upgrade procedure, comprising:
The master control borad is by second programmable logic device, through the proprietary protocol bus, by the power supply pipe
Reason upgrade procedure is sent to first programmable logic device.
Optionally, the master control borad further includes processor, and second programmable logic device passes through with the processor
Local bus communication connection is incited somebody to action by second programmable logic device through the proprietary protocol bus in the master control borad
The power management upgrade procedure is sent to before first programmable logic device, the method also includes:
The power management upgrade procedure is sent to by the processor through the local bus by the master control borad
Second programmable logic device.
Optionally, first programmable logic device is communicated to connect by iic bus and the power management chip, institute
It states the first programmable logic device and the power management upgrade procedure received is sent to the power management chip, wrap
It includes:
The power management upgrade procedure is sent to institute by the iic bus by first programmable logic device
State power management chip.
The third aspect, the disclosure also propose that a kind of network equipment, the network equipment include electricity as described in relation to the first aspect
Source control chip upgrade circuit.
In the embodiments of the present disclosure, since the business board in power management chip upgrading circuit is provided with and power management core
First programmable logic device of piece communication connection, and first programmable logic device is also communicated to connect with master control borad, therefore,
Power management upgrade procedure can be sent to the first programmable logic device by master control borad, correspondingly, the first programmable logic device
Part can receive the power management upgrade procedure of master control borad transmission, and the power management upgrade procedure is sent to power management core
Piece can be risen when power management chip gets the power management upgrade procedure based on the power management upgrade procedure
Grade.Since programmable logic device can realize corresponding function, high reliablity, therefore, by programmable by hardware circuit
Logical device can effectively improve the reliability upgraded to power management chip.
Other feature and advantage of the disclosure will be illustrated in subsequent specification, also, partly be become from specification
It is clear that by implementing disclosure understanding.The purpose of the disclosure and other advantages can be by written specifications, power
Specifically noted structure is achieved and obtained in sharp claim and attached drawing.
Detailed description of the invention
In order to illustrate more clearly of the technical solution of the disclosure, letter will be made to attached drawing needed in the embodiment below
It singly introduces, it should be understood that the following drawings illustrates only some embodiments of the disclosure, therefore is not construed as to range
It limits, it for those of ordinary skill in the art, without creative efforts, can also be according to these attached drawings
Obtain other relevant attached drawings.
Fig. 1 shows a kind of structural schematic diagram of power management chip upgrading circuit provided by the disclosure;
Fig. 2 shows the structural schematic diagrams of the upgrading circuit of another kind power management chip provided by the disclosure;
Fig. 3 shows the structural schematic diagram of the upgrading circuit of another power management chip provided by the disclosure;
Fig. 4 shows a kind of flow diagram of power management chip upgrade method provided by the disclosure;
Fig. 5 shows a kind of master control borad provided by the disclosure and sends power management upgrading to the first programmable logic device
The flow diagram of the method for program.
Label: 100- power management chip upgrades circuit;101- master control borad;102- business board;1011- second is programmable to patrol
Collect device;1012- processor;The first programmable logic device of 1021-;1022- power management chip;10211-IIC controller
Module;10212- proprietary protocol bus module.
Specific embodiment
Below in conjunction with attached drawing in the disclosure, the technical solution in the disclosure is clearly and completely described.
It should also be noted that similar label and letter indicate similar terms in following attached drawing, therefore, once a certain Xiang Yi
It is defined in a attached drawing, does not then need that it is further defined and explained in subsequent attached drawing.
Before being illustrated to the disclosure, first the application scenarios of the disclosure are introduced.
The current network equipment (such as router, interchanger and server etc.) all includes power management chip upgrading electricity
Road, the circuit include the business board of master control borad and at least one, wherein master control borad can be used for this business board of at least one
It is configured and is managed, each business board can be used to implement different functions.When to the power management chip on business board into
When row upgrading, power management upgrade procedure can be obtained by the CPU of the CPU of master control borad and business board, and by the power supply pipe
The storage medium inside the power management chip, such as EEPROM (Electrically Erasable is written in reason upgrade procedure
Programmable read only memory, band Electrically Erasable Programmable Read-Only Memory).Later, business board can be passed through
CPU controls the power management chip and carries out a power-on and power-off, to complete to upgrade.
But when upgrading using above-mentioned power management chip upgrading circuit to power management chip, need extreme dependence business
The upper CPU of plate, and since CPU is usually to realize corresponding function by software program, on the one hand it is possible that program
On the other hand the problem of failure, may also will appear the problem of interfering with each other between task handled by CPU, so as to lead
After cause is difficult to timely and reliably upgrade power management chip, such as CPU receives multiple tasks, it may will upgrade task
It delays.It to solve this problem, can be with present disclose provides a kind of power management chip upgrading circuit, method and the network equipment
By the higher programmable logic device of reliability, realization upgrades the power management chip in the network equipment, and no longer
The CPU on business board is relied on, the reliability upgraded to power management chip is improved.
Power management chip is arranged in business board, and power management chip setting, should just like storage mediums such as EEPROM
Storage medium can store program or instruction needed for power management chip realizes power management (such as power management routines, electricity
Source control upgrade procedure), thus the power management chip is able to carry out the program or instruction, carries out electricity for the business board at place
Source control.
Power management chip is the chip that power management is carried out for business board, is provided with power supply on the power management chip
Management program.
Power management upgrade procedure is the program upgraded to the power management routines in power management chip.
Wherein, power management upgrade procedure can be acquired in advance by master control borad, for example, being set by the place network equipment
The data-interface set is communicated to obtain, or instructs to obtain according to programmer with other equipment.Certainly, in practical application
In, power management upgrade procedure can be obtained by other means by master control borad, and the embodiment of the present disclosure is with no restriction.
Programmable logic device is can be after factory by the device of user's self-defining wherein digital circuit.For example, can
Programmed logic device may include CPLD, FPGA (Field-Programmable Gate Array, field-programmable gate array
Column) or PAL (Programmable Array Logic, programmable logic array) etc..
Wherein, programmable interconnection matrix unit of the CPLD mainly by programmable logic macroelement around center forms, and is one
Kind of user according to respective the need and voluntarily digital integrated electronic circuit of constitutive logic function, has that flexible in programming, integrated level be high, design
Development cycle is short, the scope of application is wide, developing instrument is advanced, design and manufacture cost is low, mark low to the hardware skill requirement of designer
The advantages that quasi- product is without test, strong security.
FPGA uses logical cell array, and internal includes that configurable logic blocks, input/output module and inside connect
Three parts of line.
PAL uses fuse programming mode, by it is programmable with array and fixation or array form, using bipolar technology
Manufacture, the operating rate of device is very high, and design is very flexible, and there are many export structure type.
In addition, it is necessary to explanation, the upgrading to power management chip, may include to power management chip in function
And/or the change in performance, for example at least one function is increased or decreased, and/or, promote or reduce at least one performance.
The power management chip provided the disclosure is upgraded into circuit, method and the network equipment below and carries out detailed explanation
Explanation.
Fig. 1 is please referred to, is a kind of structural schematic diagram of power management chip upgrading circuit 100 provided by the disclosure, such as
Shown in Fig. 1, it includes master control borad 101 and business board 102 which, which upgrades circuit 100, and business board 102 can including first
Programmed logic device 1021 and power management chip 1022, the first programmable logic device 1021 respectively with master control borad 101 and electricity
Source control chip 1022 communicates to connect, wherein master control borad 101 is used to send power management to the first programmable logic device 1021
Upgrade procedure, the first programmable logic device 1021 are used to the power management upgrade procedure received being sent to power management core
Piece 1022, power management chip 1022 are used to be upgraded based on the power management upgrade procedure.
First programmable logic device 1021 is arranged in business board 102, can be used for and business board 102 and master control borad
Communication between 101, and the other devices in business board 102 are controlled, for example control the upper of power management chip 1022
Electric or lower electricity etc..
Certainly, as shown in Figure 1, the quantity of business board 102 can be one or more, each business board 102 can also with it is other
Business board 102 communicate to connect, to be communicated with other business boards 102.
First programmable logic device 1021, can by wired or wireless mode, respectively with master control borad 101 and power supply
Managing chip 1022 communicates to connect, for example, the first programmable logic device 1021 can be by meeting the total of default communication standard
Line to communicate to connect with master control borad 101 and power management chip 1022 respectively, and is wherein respectively used to and master control borad 101 and power supply
The bus type that managing chip 1022 communicates to connect can be different.
When power management chip 1022 gets power management upgrade procedure, the power management chip 1022 can be passed through
The first programmable logic device 1021 in the business board 102 at place controls the power management chip 1022 and carries out principal
And power on operation, power management chip 1022 are based on the power management upgrade procedure, to the power management after re-powering
The program relevant to power management such as power management routines in chip 1022 and instruction are upgraded, to complete to upgrade.
In the embodiments of the present disclosure, since the business board 102 in power management chip upgrading circuit 100 is provided with and power supply
Managing chip 1022 communicate to connect the first programmable logic device 1021, and first programmable logic device 1021 also with master
It controls plate 101 to communicate to connect, therefore, power management upgrade procedure can be sent to the first programmable logic device by master control borad 101
1021, correspondingly, the first programmable logic device 1021 can receive the power management upgrade procedure of the transmission of master control borad 101, and
The power management upgrade procedure is sent to power management chip 1022, when power management chip 1022 gets the power management
When upgrade procedure, it can be upgraded based on the power management upgrade procedure.Since programmable logic device can pass through hardware
Circuit realizes therefore corresponding function, high reliablity can be effectively improved by programmable logic device to power management core
The reliability that piece 1022 is upgraded.
It should be noted that the circuit includes a master in power management chip upgrading circuit 100 shown in FIG. 1
Plate 101 and multiple business boards 102 are controlled, and each business board 102 respectively includes 1 the first programmable logic device 1021 and electricity
Source control chip 1022, but in practical applications, it also may include more master control borads 101, and/or, it may include less
Business board 102, and/or, business board 102 may include more power management chips 1022.
Optionally, the first programmable logic device 1021 is communicated to connect by iic bus and power management chip 1022.
Wherein, iic bus is a kind of two-way, two-wire system, synchronous serial bus.
Optionally, referring to figure 2. or 3, master control borad 101 is provided with the second programmable logic device 1011 and processor
1012, the second programmable logic device 1011 is communicated to connect with the first programmable logic device 1021 and processor 1012 respectively.
Second programmable logic device 1011 can be used for the communication between master control borad 101 and each business board 102.
For example, power management upgrade procedure and business board identification information can be sent to second by processor 1012
Programmable logic device 1011, the second programmable logic device 1011 is based on the business board identification information, by the power management liter
Grade program is sent to corresponding business board 102 corresponding with the business board identification information.
Wherein, business board identification information is the information being identified to business board 102, for example, the business board identification information
It may include business board number or business board name.
Processor 1012 may include the CPU in aforementioned, or may include MPU (Micro Processor Unit, it is micro-
Processor), MCU (Micro Control Unit, microcontroller) or SOC (System on Chip, system on chip).
It should be noted that the type of the second programmable logic device 1011 can be with the first programmable logic device 1021
Type it is identical.
Should be noted the second programmable logic device 1011, can by wired or wireless mode, respectively with
First programmable logic device 1021 and processor 1012 communicate to connect, for example, the second programmable logic device 1011 can lead to
It crosses and meets the bus of default communication standard and to communicate to connect with the first programmable logic device 1021 and processor 1012, and wherein
Being respectively used to can be different from the bus type that the first programmable logic device 1021 and processor 1012 communicate to connect.
Optionally, the second programmable logic device 1011 passes through proprietary protocol bus and the first programmable logic device 1021
Communication connection, the second programmable logic device 1011 are communicated to connect with processor 1012 by local bus (Local Bus).
Proprietary protocol is for the communication between programmable logic device.
Proprietary protocol bus and local bus can be bus that is set in advance, meeting default communication standard, the application
Specific protocol contents are not defined.
It referring to figure 3., may include IIC controller module 10211, IIC control in the first programmable logic device 1021
Molding block and power management chip 1022 communicate to connect, so as to the first programmable logic device 1021 and power management core
The communication process of piece 1022 is controlled.
Since the signal wire that iic bus occupies is less, and have the function of automatic addressing, multi-clock are synchronous and arbitrate etc., because
This, can make business board 102 and power management chip upgrading circuit 100 convenient, flexible, small in size using the iic bus,
The communication that can be reliably achieved between the first programmable logic device 1021 and power management chip 1022.
Certainly, in practical applications, the first programmable logic device 1021 can also pass through other types of bus and electricity
Source control chip 1022 communicate to connect, such as SPI (Serial Peripheral Interface, Serial Peripheral Interface (SPI)) or
Other types of low speed bus etc..
It referring to figure 3., may include proprietary protocol bus module 10212, the private in the first programmable logic device 1021
Have protocol bus module 10212 and it is aforementioned in IIC controller module 10211 communicate to connect, and the proprietary protocol bus module
10212 also communicate to connect with the second programmable logic device 1011, so as to control between business board 102 and master control borad 101
Communication.
For example, can receive the power management from master control borad 101 by proprietary protocol bus module 10212 and upgrade journey
Sequence, and by the internal bus between proprietary protocol bus module 10212 and IIC controller module 10211, by the power management
Upgrade procedure is sent to IIC controller module 10211.
Due to passing through the processor of master control borad 101 when the power management chip 1022 to business board 102 upgrades
Power management upgrade procedure is sent to programmable logic device by 1012, is considerably reduced to the processors such as CPU 1012
Dependence, further improve to power management chip 1022 upgrade reliability.
It should be noted that in practical applications, the first programmable logic device 1021 can also include other modules,
This is with no restriction.
Optionally, the first programmable logic device 1021 and the second programmable logic device 1011 include CPLD.
It should be noted that the high reliablity of the processors such as CPLD ratio CPU therefore can be by respectively in master control borad 101
Programmable logic device is set with business board 102, to realize by programmable logic device to the power supply pipe in business board 102
Reason chip 1022 is upgraded, and is reduced the dependence to processor 1012, is improved the reliability of upgrading.
In addition, in another optionally embodiment of the disclosure, business board 102 can also include for execute it is other with it is electric
Source control chip 1022 upgrades the processor of uncorrelated function.
It referring to figure 4., is a kind of flow diagram of power management chip upgrade method provided by the disclosure.This method
Applied to Fig. 1-3 it is any shown in power management chip upgrading circuit 100 in.It should be noted that power supply described in the disclosure
Managing chip upgrade method is not limitation with Fig. 4 and specific order as described below, it should be understood that in other embodiments
In, the sequence of power management chip upgrade method part step described in the disclosure can be handed over mutually according to actual needs
It changes or part steps therein also can be omitted or delete.Process shown in Fig. 4 will be described in detail below.
Step 401, master control borad 101 sends power management upgrade procedure to the first programmable logic device 1021.
Wherein, power management chip upgrading circuit 100 may include master control borad 101 and business board 102, and business board 102 wraps
Include the first programmable logic device 1021 and power management chip 1022, the first programmable logic device 1021 and master control borad 101
Communication connection.Therefore, master control borad 101 can be sent out power management upgrade procedure by the communication connection between master control borad 101
It send to the first programmable logic device 1021.
Step 402, the power management upgrade procedure received is sent to power supply pipe by the first programmable logic device 1021
Manage chip 1022.
From the foregoing it will be appreciated that the first programmable logic device 1021 is communicated to connect with power management chip 1022, therefore first
The power management can be upgraded journey by the communication connection between power management chip 1022 by programmable logic device 1021
Sequence is sent to power management chip 1022.
Step 403, power management chip 1022 is upgraded based on power management upgrade procedure.
Wherein, the mode that power management chip 1022 is upgraded based on power management upgrade procedure may refer to aforementioned
In associated description, no longer repeat one by one herein.
In the embodiments of the present disclosure, since the business board 102 in power management chip upgrading circuit 100 is provided with and power supply
Managing chip 1022 communicate to connect the first programmable logic device 1021, and first programmable logic device 1021 also with master
It controls plate 101 to communicate to connect, therefore, power management upgrade procedure can be sent to the first programmable logic device by master control borad 101
1021, correspondingly, the first programmable logic device 1021 can receive the power management upgrade procedure of the transmission of master control borad 101, and
The power management upgrade procedure is sent to power management chip 1022, when power management chip 1022 gets the power management
When upgrade procedure, it can be upgraded based on the power management upgrade procedure.Since programmable logic device can pass through hardware
Circuit realizes therefore corresponding function, high reliablity can be effectively improved by programmable logic device to power management core
The reliability that piece 1022 is upgraded.
Optionally, referring to figure 5., master control borad 101 can be sent out to the second programmable logic device 1011 as follows
The power management upgrade procedure sent:
Step 501, master control borad 101 is by processor 1012, and through local bus, power management upgrade procedure is sent to the
Two programmable logic device 1011.
From the foregoing it will be appreciated that master control borad 101 further includes processor 1012, the second programmable logic device 1011 and processor
1012 are connected by local bus, therefore, in order to which the second programmable logic device 1011 in master control borad 101 guarantees reliably
Ground acquires power management upgrade procedure, and power management is being upgraded journey subsequently through the second programmable logic device 1011
Sequence is sent to business board 102, to reduce the dependence in power management escalation process to processor 1012, further increases to electricity
The reliability that source control chip 1022 is upgraded, master control borad 101 can be by processors 1012, through local bus by power supply pipe
Reason upgrade procedure is sent to the second programmable logic device 1011.
Optionally, business board identification information can also be sent to the second programmable logic device 1011 by processor 1012.
Due to may include more than one business board 102 in power management chip upgrading circuit 100, processor
1012 can send business board identification information to the second programmable logic device 1011, consequently facilitating the second programmable logic device
1011 determine receive power management upgrade procedure the first programmable logic device 1021, and then guarantee it is accurately and reliably right
First programmable logic device 1021 to be upgraded is upgraded.
Step 502, master control borad 101 is by the second programmable logic device 1011, through proprietary protocol bus, by power management
Upgrade procedure is sent to the first programmable logic device 1021.
From the foregoing it will be appreciated that master control borad 101 includes the second programmable logic device 1011, the first programmable logic device 1021
It is communicated to connect by proprietary protocol bus and the second programmable logic device 1011, therefore, in order to be further reduced power management
To the dependence of processor 1012 in escalation process, and first programmable logic device 1021 sends power supply pipe into business board 102
The reliability for managing upgrade procedure, can be by between the first programmable logic device 1021 and the second programmable logic device 1011
Proprietary protocol bus, transmit power management upgrade procedure.
It should be noted that in practical applications, master control borad 101 may also and be not provided with processor 1012, or i.e.
Make in the case where being provided with processor 1012, the second programmable logic device 1011 can also obtain (ratio otherwise
Such as obtained from external equipment or exterior storage medium) power management upgrade procedure is obtained, therefore, in the another optional of the disclosure
In embodiment, step 501 is optionally step.
Optionally, power management upgrade procedure can be sent to by the first programmable logic device 1021 by iic bus
Power management chip 1022.
From the foregoing it will be appreciated that the first programmable logic device 1021 passes through iic bus and 1022 communication link of power management chip
It connects, which can be reliably achieved the communication between the first programmable logic device 1021 and power management chip 1022, into
And improve the reliability that power management upgrade procedure is sent to power management chip 1022.
The disclosure additionally provides a kind of network equipment, the network equipment include as aforementioned and Fig. 1-3 it is any shown in electricity
Source control chip upgrade circuit, so as to by the power management chip upgrade method in aforementioned, to power management chip
1022 are upgraded.
In the embodiments of the present disclosure, due to including that power management chip upgrades circuit 100, power management core in the network equipment
Business board 102 in piece upgrading circuit 100 is provided with the first programmable logic device communicated to connect with power management chip 1022
Part 1021, and first programmable logic device 1021 is also communicated to connect with master control borad 101, therefore, master control borad 101 can will be electric
Source control upgrade procedure is sent to the first programmable logic device 1021, correspondingly, the first programmable logic device 1021 can be with
The power management upgrade procedure that master control borad 101 is sent is received, and the power management upgrade procedure is sent to power management chip
1022, when power management chip 1022 gets the power management upgrade procedure, the power management upgrade procedure can be based on
Upgraded.Since programmable logic device can realize therefore corresponding function, high reliablity pass through by hardware circuit
Programmable logic device can effectively improve the reliability upgraded to power management chip 1022.
It should be noted that, in this document, the relational terms of such as " first " and " second " or the like are used merely to one
A entity or operation with another entity or operate distinguish, without necessarily requiring or implying these entities or operation it
Between there are any actual relationship or orders.Moreover, the terms "include", "comprise" or its any other variant are intended to
Cover non-exclusive inclusion, so that the process, method, article or equipment for including a series of elements not only includes those
Element, but also including other elements that are not explicitly listed, or further include for this process, method, article or setting
Standby intrinsic element.In the absence of more restrictions, the element limited by sentence "including a ...", it is not excluded that
There is also other identical elements in the process, method, article or apparatus that includes the element.
The foregoing is merely preferred embodiment of the present disclosure, are not limited to the disclosure, for the skill of this field
For art personnel, the disclosure can have various modifications and variations.It is all within the spirit and principle of the disclosure, it is made any to repair
Change, equivalent replacement, improvement etc., should be included within the protection scope of the disclosure.
Claims (10)
1. a kind of power management chip upgrades circuit, which is characterized in that the circuit includes master control borad and business board;
The business board includes the first programmable logic device and power management chip, the first programmable logic device difference
It is communicated to connect with the master control borad and the power management chip;
The master control borad, for sending power management upgrade procedure to first programmable logic device;
First programmable logic device, for the power management upgrade procedure received to be sent to the power supply pipe
Manage chip;
The power management chip, for being upgraded based on the power management upgrade procedure.
2. power management chip as described in claim 1 upgrades circuit, which is characterized in that the master control borad is provided with second can
Programmed logic device and processor, second programmable logic device respectively with first programmable logic device and described
Processor communication connection.
3. power management chip as described in claim 1 upgrades circuit, which is characterized in that first programmable logic device
It is communicated to connect by IC bus iic bus and the power management chip.
4. power management chip as claimed in claim 2 upgrades circuit, which is characterized in that second programmable logic device
Communicated to connect by proprietary protocol bus and first programmable logic device, second programmable logic device with it is described
Processor is connected by Local bus communication.
5. power management chip as claimed in claim 2 upgrades circuit, which is characterized in that first programmable logic device
It include complex programmable logic device (CPLD) with second programmable logic device.
6. a kind of power management chip upgrade method, which is characterized in that the method is applied to as described in claim 1-5 is any
Power management chip upgrade circuit, which comprises
The master control borad sends power management upgrade procedure to first programmable logic device;
The power management upgrade procedure received is sent to the power management core by first programmable logic device
Piece;
The power management chip is based on the power management upgrade procedure and is upgraded.
7. power management chip upgrade method as claimed in claim 6, which is characterized in that the master control borad can be compiled including second
Journey logical device, first programmable logic device are communicated by proprietary protocol bus with second programmable logic device
Connection;The master control borad sends power management upgrade procedure to first programmable logic device, comprising:
The master control borad is by second programmable logic device, through the proprietary protocol bus, by the power management liter
Grade program is sent to first programmable logic device.
8. power management chip upgrade method as claimed in claim 7, which is characterized in that the master control borad further includes processing
Device, second programmable logic device are connect with the processor by Local bus communication, pass through institute in the master control borad
The second programmable logic device is stated, through the proprietary protocol bus, the power management upgrade procedure is sent to described first
Before programmable logic device, the method also includes:
The power management upgrade procedure is sent to described by the processor through the local bus by the master control borad
Second programmable logic device.
9. power management chip upgrade method as claimed in claim 6, which is characterized in that first programmable logic device
It is communicated to connect by iic bus and the power management chip, the electricity that first programmable logic device will receive
Source control upgrade procedure is sent to the power management chip, comprising:
The power management upgrade procedure is sent to the electricity by the iic bus by first programmable logic device
Source control chip.
10. a kind of network equipment, which is characterized in that upgrade electricity including power management chip a method as claimed in any one of claims 1 to 5
Road.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910302145.XA CN110096291A (en) | 2019-04-15 | 2019-04-15 | Power management chip upgrades circuit, method and the network equipment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910302145.XA CN110096291A (en) | 2019-04-15 | 2019-04-15 | Power management chip upgrades circuit, method and the network equipment |
Publications (1)
Publication Number | Publication Date |
---|---|
CN110096291A true CN110096291A (en) | 2019-08-06 |
Family
ID=67444943
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910302145.XA Pending CN110096291A (en) | 2019-04-15 | 2019-04-15 | Power management chip upgrades circuit, method and the network equipment |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110096291A (en) |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112559017A (en) * | 2019-09-10 | 2021-03-26 | 北京嗨动视觉科技有限公司 | Program upgrading method and device of card-inserting type equipment, card-inserting type equipment and system |
CN114035831A (en) * | 2022-01-06 | 2022-02-11 | 苏州浪潮智能科技有限公司 | CPLD upgrading method, system and computer readable storage medium |
WO2022057954A1 (en) * | 2020-09-16 | 2022-03-24 | 算丰科技(北京)有限公司 | Power management circuit, chip and upgrade method therefor, and server |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101741593A (en) * | 2008-11-19 | 2010-06-16 | 华为技术有限公司 | Method for dynamically loading service boards and dynamic loading system |
CN101853173A (en) * | 2010-05-27 | 2010-10-06 | 杭州华三通信技术有限公司 | Software upgrading method and device of programmable logic device of distributed system |
CN105573802A (en) * | 2015-12-23 | 2016-05-11 | 无锡江南计算技术研究所 | Remote upgrading method of management program of multi-processor mainboard power supply |
-
2019
- 2019-04-15 CN CN201910302145.XA patent/CN110096291A/en active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN101741593A (en) * | 2008-11-19 | 2010-06-16 | 华为技术有限公司 | Method for dynamically loading service boards and dynamic loading system |
CN101853173A (en) * | 2010-05-27 | 2010-10-06 | 杭州华三通信技术有限公司 | Software upgrading method and device of programmable logic device of distributed system |
CN105573802A (en) * | 2015-12-23 | 2016-05-11 | 无锡江南计算技术研究所 | Remote upgrading method of management program of multi-processor mainboard power supply |
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112559017A (en) * | 2019-09-10 | 2021-03-26 | 北京嗨动视觉科技有限公司 | Program upgrading method and device of card-inserting type equipment, card-inserting type equipment and system |
WO2022057954A1 (en) * | 2020-09-16 | 2022-03-24 | 算丰科技(北京)有限公司 | Power management circuit, chip and upgrade method therefor, and server |
US11829220B2 (en) | 2020-09-16 | 2023-11-28 | Sophgo Technologies Ltd. | Power management circuit, chip and upgrade method therefor, and server |
CN114035831A (en) * | 2022-01-06 | 2022-02-11 | 苏州浪潮智能科技有限公司 | CPLD upgrading method, system and computer readable storage medium |
CN114035831B (en) * | 2022-01-06 | 2022-04-22 | 苏州浪潮智能科技有限公司 | CPLD upgrading method, system and computer readable storage medium |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN103559053B (en) | Board system and FPGA (Field Programmable Logic Array) online update method of communication interface cards | |
CN100383737C (en) | SCM online loading and updating method and system | |
CN110096291A (en) | Power management chip upgrades circuit, method and the network equipment | |
CN107980215A (en) | A kind of protocol converter and method for converting protocol | |
CN106325857B (en) | A kind of electronic equipment and control method of electronic device | |
CN100383544C (en) | Method and apparatus for real-time monitoring level signal | |
CN101097563A (en) | System and method for realizing board centralized management and controlling | |
CN203858627U (en) | Portable RFID (radio frequency identification) equipment | |
CN107832078A (en) | FPGA program online updating circuits based on DSP | |
CN102231114A (en) | System and method for upgrading chip as well as method and device for transmitting upgrade file | |
CN102253845B (en) | Server system | |
CN208188815U (en) | BMC module system | |
CN110413487A (en) | A kind of indicator light management method, system and the baseboard management controller of server | |
CN109992555A (en) | A kind of management board shared for multipath server | |
CN102768561A (en) | Design method for twinbridge piece mainboard redundancy | |
CN110245048A (en) | A kind of cabinet intelligent management system and management method | |
CN114356671A (en) | Board card debugging device, system and method | |
CN102445981B (en) | Data transmission system and data transmission method | |
CN110515635A (en) | Mainboard VR firmware upgrade method, device, server and readable storage medium storing program for executing | |
CN204406186U (en) | A kind of fieldbus controller | |
CN101833530A (en) | Activation and the apparatus and method that the multi-core environment on the bus is provided | |
CN109542481A (en) | A kind of multi-mode Multifunctional tester automatically configures device and method | |
CN106527409B (en) | A kind of master control cabinet | |
CN110162499A (en) | A kind of PECI bus switch device, method and system | |
CN109324553A (en) | A kind of standardization detection module interface |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190806 |