CN114356671A - Board card debugging device, system and method - Google Patents
Board card debugging device, system and method Download PDFInfo
- Publication number
- CN114356671A CN114356671A CN202111639870.XA CN202111639870A CN114356671A CN 114356671 A CN114356671 A CN 114356671A CN 202111639870 A CN202111639870 A CN 202111639870A CN 114356671 A CN114356671 A CN 114356671A
- Authority
- CN
- China
- Prior art keywords
- board
- debugging
- data
- board card
- channel
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Abstract
The disclosure relates to a board debugging device, a system, a method, an electronic device and a computer readable medium. The device includes: the central processing unit is used for controlling a transmission channel on the complex programmable logic device; the first serial port is used for receiving board debugging data and sending the board debugging data to the complex programmable logic device, and the complex programmable logic device is used for sending the board debugging data out through the transmission channel determined by the central processing unit. The board card debugging device, the board card debugging system, the board card debugging method, the electronic equipment and the computer readable medium can solve the problem that the built test environment is complex in the multi-serial-port equipment, and are beneficial to managing the multi-serial-port equipment and improving the debugging and testing efficiency.
Description
Technical Field
The present disclosure relates to the field of computer information processing, and in particular, to a board debugging apparatus, a system, a method, an electronic device, and a computer readable medium.
Background
Under the current situation, the push key equipment is independently controllable, the protection level of network information safety is improved, and the information safety loophole for blocking the network space is more and more urgent. In order to develop an autonomous, controllable, safe and credible core software and hardware foundation, I department developed a domestic distributed machine frame. The distributed machine frame chip management is distributed management through a Central Processing Unit (CPU) of each board card through a Peripheral Component Interface Express (PCIE) high-speed serial computer expansion bus standard, so that at least one serial port is formed on each board card in the machine frame and used for debugging the board card. When a test environment is built, a plurality of serial ports need to be connected, so that the test environment is built complexly.
In the prior art, each board card in the distributed machine frame has at least one CPU, and each CPU has an independent universal asynchronous receiver/transmitter interface for debugging. Because in the frame equipment, can insert a lot of integrated circuit boards, every integrated circuit board has a CPU at least, all needs the serial ports to debug, can lead to connecting the serial ports numerous among the test environment, and the environment is built comparatively complicatedly.
In the current network environment, only one serial port for the equipment management port is needed. Under the condition that the serial port is occupied, some information of other board cards is difficult to check.
Therefore, a new board debugging apparatus, system, method, electronic device and computer readable medium are needed.
The above information disclosed in this background section is only for enhancement of understanding of the background of the application and therefore it may contain information that does not constitute prior art that is already known to a person of ordinary skill in the art.
Disclosure of Invention
In view of this, the present application provides a board debugging device, system, method, electronic device, and computer readable medium, which can solve the problem of complex test environment setup in a multi-serial device, and is helpful for managing the multi-serial device and improving debugging and testing efficiency.
Other features and advantages of the present application will be apparent from the following detailed description, or may be learned by practice of the application.
According to an aspect of the present application, a board debugging apparatus is provided, the apparatus including: the central processing unit is used for controlling a transmission channel on the complex programmable logic device; the first serial port is used for receiving board debugging data and sending the board debugging data to the complex programmable logic device, and the complex programmable logic device is used for sending the board debugging data out through the transmission channel determined by the central processing unit.
In an exemplary embodiment of the present application, the central processor includes: and the second serial port is used for acquiring user setting data to determine a transmission channel.
In an exemplary embodiment of the present application, the first serial port includes: the device is suitable for the serial port of the universal asynchronous receiving and transmitting transmitter.
In one exemplary embodiment of the present application, a complex programmable logic device includes: and each transmission channel is connected with one board card in the distributed machine frame so as to transmit the board card debugging data.
In an exemplary embodiment of the present application, the central processing unit is connected to the complex programmable logic device through a bus; the Bus includes an LPC Bus and a Local Bus.
According to an aspect of the present application, a board debugging system is provided, which includes: the serial port tool is used for transmitting the board debugging data to the board debugging device; the board debugging device is used for transmitting the board debugging data to a specified board in the distributed machine frame according to user setting; and the distributed machine frame is used for acquiring the board card debugging data and operating based on the board card debugging data.
According to an aspect of the present application, a board debugging method is provided, where the method includes: determining a board card debugging channel; acquiring board debugging data, wherein the board debugging data comprises a board identifier and debugging data; when the board card identification is matched with the board card debugging channel, the debugging data is input into a destination port through the board card debugging channel; and inputting the debugging data into a board card of the distributed machine frame based on the destination port so as to debug the board card.
In an exemplary embodiment of the present application, further comprising: generating response data after the debugging of the board card is completed; transmitting the response data from the destination port to the board card debugging channel; and outputting the response data to a serial port tool for analysis based on the board card debugging channel.
In an exemplary embodiment of the present application, determining a board debug channel includes: determining a target board card debugging channel according to a user instruction; and writing the mark of the target board card debugging channel into a control register of the complex programmable logic device.
In an exemplary embodiment of the present application, when the board identifier matches the board debug channel, the method includes: and when the board card identification is consistent with the identification of the target board card debugging channel in the control register of the complex programmable logic device, determining that the board card identification is matched.
According to an aspect of the present application, an electronic device is provided, the electronic device including: one or more processors; storage means for storing one or more programs; when executed by one or more processors, cause the one or more processors to implement a method as above.
According to an aspect of the application, a computer-readable medium is proposed, on which a computer program is stored, which program, when being executed by a processor, carries out the method as above.
According to the board card debugging device, the board card debugging system, the board card debugging method, the electronic equipment and the computer readable medium, a central processing unit is used for controlling a transmission channel on a complex programmable logic device; the first serial port is used for receiving board debugging data and sending the board debugging data to the complex programmable logic device, the complex programmable logic device is used for determining the board debugging data by the central processing unit, the transmission channel is sent out, the problem that the test environment is complex can be solved in the multi-serial-port equipment, and the management of the multi-serial-port equipment and the debugging and testing efficiency are improved.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.
Drawings
The above and other objects, features and advantages of the present application will become more apparent by describing in detail exemplary embodiments thereof with reference to the attached drawings. The drawings described below are only some embodiments of the present application, and other drawings may be derived from those drawings by those skilled in the art without inventive effort.
Fig. 1 is a block diagram illustrating a board debugging apparatus according to an exemplary embodiment.
Fig. 2 is a schematic diagram illustrating a board debugging apparatus according to an exemplary embodiment.
FIG. 3 is a block diagram illustrating a board debugging system in accordance with an exemplary embodiment.
Fig. 4 is a flowchart illustrating a board debugging method according to another exemplary embodiment.
Fig. 5 is a flowchart illustrating a board debugging method according to another exemplary embodiment.
FIG. 6 is a block diagram illustrating an electronic device in accordance with an example embodiment.
FIG. 7 is a block diagram illustrating a computer-readable medium in accordance with an example embodiment.
Detailed Description
Example embodiments will now be described more fully with reference to the accompanying drawings. Example embodiments may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the concept of example embodiments to those skilled in the art. The same reference numerals denote the same or similar parts in the drawings, and thus, a repetitive description thereof will be omitted.
Furthermore, the described features, structures, or characteristics may be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the application. One skilled in the relevant art will recognize, however, that the subject matter of the present application can be practiced without one or more of the specific details, or with other methods, components, devices, steps, and so forth. In other instances, well-known devices, systems, methods, implementations, or operations have not been shown or described in detail to avoid obscuring aspects of the application.
The block diagrams shown in the figures are functional entities only and do not necessarily correspond to physically separate entities. I.e. these functional entities may be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different networks and/or processor means and/or microcontroller means.
The flow charts shown in the drawings are merely illustrative and do not necessarily include all of the contents and operations/steps, nor do they necessarily have to be performed in the order described. For example, some operations/steps may be decomposed, and some operations/steps may be combined or partially combined, so that the actual execution sequence may be changed according to the actual situation.
It will be understood that, although the terms first, second, third, etc. may be used herein to describe various components, these components should not be limited by these terms. These terms are used to distinguish one element from another. Thus, a first component discussed below may be termed a second component without departing from the teachings of the present concepts. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
It will be appreciated by those skilled in the art that the drawings are merely schematic representations of exemplary embodiments, and that the blocks or processes shown in the drawings are not necessarily required to practice the present application and are, therefore, not intended to limit the scope of the present application.
The technical abbreviations referred to in this application are explained as follows:
a CPU: the Central Processing Unit (CPU) is the final execution unit for information processing and program operation as the operation and control core of the computer system.
CPLD: complex Programmable Logic devices (Complex Programmable Logic devices) are devices developed from PAL and GAL devices, are relatively large in scale and Complex in structure, and belong to the field of large-scale integrated circuits. The digital integrated circuit is a digital integrated circuit which is used by a user to construct logic functions according to respective needs.
Localbus: the Local Bus is also called CPU Bus.
LPC: low pin count Bus. The system is a 33MHz 4bit parallel bus protocol based on Intel standard, which is used for replacing the prior ISA bus protocol, but the two protocols have similar performance and are used for connecting devices such as a south bridge, a Super I/O chip, a FLASH BIOS, an EC and the like.
PCIE: the peripheral component interconnection express is a high-speed serial computer expansion bus standard, belongs to high-speed serial point-to-point double-channel high-bandwidth transmission, and is mainly used for supporting functions of active power management, error reporting, end-to-end reliable transmission, hot plug, quality of service (QOS) and the like, wherein connected equipment distributes independent channel bandwidth and does not share bus bandwidth.
UART: universal Asynchronous Receiver/Transmitter (UART) is commonly referred to as UART. It converts data to be transmitted between serial communication and parallel communication. As a chip for converting a parallel input signal into a serial output signal, the UART is usually integrated into a connection of other communication interfaces. The embodiments are embodied as a stand-alone modular chip or as a peripheral device integrated into a microprocessor.
In view of the dilemma in the prior art, the application provides a board debugging device, which can manage a plurality of serial ports. The device can realize the function of managing a plurality of serial ports with a debug serial port and switching back and forth among the plurality of serial ports. The device can solve the problem that under the complex conditions of test environment and networking environment, the serial port connecting line is not enough, so that no way is available for checking information of other board cards. When the equipment is designed and produced, the panel outlet can be reduced, and the production cost is reduced.
The content of the present application is described in detail below with the aid of specific examples.
The following are embodiments of the apparatus of the present application that may be used to perform embodiments of the method of the present application. For details which are not disclosed in the embodiments of the apparatus of the present application, reference is made to the embodiments of the method of the present application.
Fig. 1 is a block diagram illustrating a board debugging apparatus according to an exemplary embodiment. As shown in fig. 1, the board debugging apparatus 10 may include: a central processing unit 102, a first serial port 104 and a complex programmable logic device 106.
The central processing unit 102 is used for controlling a transmission channel on the complex programmable logic device;
the first serial port 104 is used for receiving board debugging data and sending the board debugging data to the complex programmable logic device;
the complex programmable logic device 106 is configured to send the board debug data out through the transmission channel determined by the central processing unit.
The central processing unit 102 further includes: and the second serial port is used for acquiring user setting data to determine a transmission channel.
In a specific embodiment, the central processing unit 102 includes a serial UART0, and the central processing unit 102 is connected to the CPLD through LPC or Localbus, and is used to control the information in the CPLD to switch between channel a and channel N.
The first serial port and the second serial port can be serial ports suitable for the universal asynchronous receiving and transmitting transmitter. The first serial port can be used as a DEBUG port, and the serial port tool is connected with the first serial port of the board card debugging device 10 through a serial port line.
The complex programmable logic device 106 includes: and each transmission channel is connected with one board card in the distributed machine frame so as to transmit the board card debugging data.
In a specific embodiment, the complex programmable logic device 106 includes: the channels a to N may be used as DEBUG ports and data input/output transmission channels of each CPU serial port, respectively, and the complex programmable logic device 106 may further implement a single-pole multi-throw switch by programming, for controlling the first serial port 104 to switch between the channels a to N.
Without loss of generality, first serial port 104 is connected to channel a by default when no setup is performed.
The central processing unit 102 is connected with the complex programmable logic device through a bus; the Bus may be an LPC Bus and a Local Bus.
According to the integrated circuit board debugging device of this application, include: the central processing unit is used for controlling a transmission channel on the complex programmable logic device; first serial ports for receive integrated circuit board debugging data, and will integrated circuit board debugging data send complicated programmable logic device, be used for with integrated circuit board debugging data is confirmed by central processing unit transmission channel sends away, through the integrated circuit board debugging device of this application can solve multi-serial ports equipment, builds the complicated problem of test environment, helps managing, improving debugging and efficiency of software testing multi-serial ports equipment.
Fig. 2 is a schematic diagram illustrating a board debugging apparatus according to an exemplary embodiment. As shown in fig. 2, the board debug apparatus 20 includes: the main CPU comprises a serial port UART 0; further comprising: UART1 for DEBUG; further comprising: the complex programmable logic device CPLD includes a plurality of channels, which may be specifically a channel a, a channel b, a channel x, and a channel ln. CPUs in a plurality of board cards in distributed machine frame equipment are respectively connected with channel A, channel B, channel X and channel N.
More specifically, the main CPU controls the serial data transmission channel by controlling the CPLD channel switch. The channel switch refers to a CPLD-simulated single-pole multi-throw switch, and a channel of serial port data is switched from ChannelA to ChannelN.
The serial tool is connected with the UART1 of the device through a serial line, and data input and data receiving output are carried out through the serial tool.
After the serial port tool inputs data, the data signal is transmitted to the CPLD through the UART1, and after the CPLD detects the serial port data signal, the data is transmitted to the corresponding channel according to the channel set by the main CPU, and then the input data is transmitted to the corresponding CPU.
The CPU data is transmitted to the corresponding channel after being output, and the channel L corresponding to the CPLD receives the data output by the CPU, transmits the data to the UART1 and finally outputs the data to the serial port tool.
The main CPU is connected with the CPLD through LPC or LocalBus. If the host CPU wants to switch the serial port to a channel (for example, ChannelX), the host CPU writes an X value into the serial port switching control register of the CPLD. When the CPLD receives a data signal input by the serial UART1, the CPLD determines the channel number of the current data transmission by switching the value of the control register through the serial port, and forwards the data to the corresponding channel. Similarly, when the CPU has data to output to the CPLD, the CPLD determines whether the received data is the data of the current channel by switching the value of the control register through the serial port. If so, the current data is transmitted to the UART1, and the data is finally output to the serial port tool. If the data is not the data of the current channel, the CPLD ignores the data and does not forward the data to the UART1, so that the UART1 can be ensured that the data input and output at the same time are transmitted in only one channel.
The CPLD can realize a software monitor and a software-simulated single-pole multi-throw switch. The CPLD opens a readable and writable register to store the serial port switching control signal written by the main CPU, and the monitor of the CPLD determines the current serial port data transmission channel by reading the register. The software monitor will detect whether the UART1 and the port connected to each CPU have data input in real time, and forward the data if the input data is the data of the current channel.
FIG. 3 is a block diagram illustrating a board debugging system in accordance with an exemplary embodiment. As shown in fig. 3, the board debug system 30 includes: a serial port tool 302, a board card debugging device 304 and a distributed machine frame 306.
The serial port tool 302 is used for transmitting board debugging data to the board debugging device;
the board debugging device 304 is used for transmitting board debugging data to a specified board in the distributed machine frame according to user settings;
distributed machine frame 306 is used to obtain board debug data and operate based on the board debug data.
In actual use, a user may connect serial port tool 302 to board debug apparatus 304, where board debug apparatus 304 is connected to each board in distribution frame 306. Before debugging, the board debugging apparatus 304 is first set up with channels, and then debug data is input through the serial port tool 302 to debug the distributed subrack 306.
Fig. 4 is a flowchart illustrating a method for debugging a board according to an exemplary embodiment. The board debug method 40 at least includes steps S402 to S408.
As shown in fig. 4, in S402, a board debug channel is determined. A target board card debugging channel can be determined according to a user instruction; and writing the mark of the target board card debugging channel into a control register of the complex programmable logic device.
In S404, board debug data is obtained, where the board debug data includes a board identifier and debug data.
In S406, when the board identifier matches the board debug channel, the debug data is input to the destination port through the board debug channel.
More specifically, when the board card identifier is consistent with the identifier of the target board card debugging channel in the control register of the complex programmable logic device, the board card identifier is determined to be matched.
In S408, the debug data is input to the board of the distributed subrack based on the destination port to debug the board.
According to the board card debugging method, the central processing unit is used for controlling a transmission channel on the complex programmable logic device; the first serial port is used for receiving board debugging data and sending the board debugging data to the complex programmable logic device, the complex programmable logic device is used for determining the board debugging data by the central processing unit, the transmission channel is sent out, the problem that the test environment is complex can be solved in the multi-serial-port equipment, and the management of the multi-serial-port equipment and the debugging and testing efficiency are improved.
According to the board card debugging method, one serial port can be shared in the multi-serial-port device. The problem of in the multiple serial ports equipment, put up the test environment and need connect many serial ports lines is solved, reduce the complexity of test network deployment, simultaneously can solve in the network deployment environment, because of the serial ports line is not enough, lead to veneer information to look over inconvenient problem.
It should be clearly understood that this application describes how to make and use particular examples, but the principles of this application are not limited to any details of these examples. Rather, these principles can be applied to many other embodiments based on the teachings of the present disclosure.
Fig. 5 is a flowchart illustrating a board debugging method according to another exemplary embodiment. The flow 50 shown in fig. 5 is a supplementary description of the flow shown in fig. 4.
As shown in fig. 5, in S502, after the board is debugged, response data is generated.
In S504, the response data is transmitted from the destination port to the board debug channel.
In S506, the response data is output to a serial port tool for analysis based on the board debug channel.
Those skilled in the art will appreciate that all or part of the steps implementing the above embodiments are implemented as computer programs executed by a CPU. When executed by the CPU, performs the functions defined by the methods provided herein. The program may be stored in a computer readable storage medium, which may be a read-only memory, a magnetic or optical disk, or the like.
Furthermore, it should be noted that the above-mentioned figures are only schematic illustrations of the processes involved in the method according to exemplary embodiments of the present application, and are not intended to be limiting. It will be readily understood that the processes shown in the above figures are not intended to indicate or limit the chronological order of the processes. In addition, it is also readily understood that these processes may be performed synchronously or asynchronously, e.g., in multiple modules.
FIG. 6 is a block diagram illustrating an electronic device in accordance with an example embodiment.
An electronic device 600 according to this embodiment of the present application is described below with reference to fig. 6. The electronic device 600 shown in fig. 6 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present application.
As shown in fig. 6, the electronic device 600 is embodied in the form of a general purpose computing device. The components of the electronic device 600 may include, but are not limited to: at least one processing unit 610, at least one storage unit 620, a bus 630 that connects the various system components (including the storage unit 620 and the processing unit 610), a display unit 640, and the like.
Wherein the storage unit stores program code executable by the processing unit 610 to cause the processing unit 610 to perform steps according to various exemplary embodiments of the present application described in the present specification. For example, the processing unit 610 may perform the steps shown in fig. 4 and 5.
The storage unit 620 may include readable media in the form of volatile memory units, such as a random access memory unit (RAM)6201 and/or a cache memory unit 6202, and may further include a read-only memory unit (ROM) 6203.
The memory unit 620 may also include a program/utility 6204 having a set (at least one) of program modules 6205, such program modules 6205 including, but not limited to: an operating system, one or more application programs, other program modules, and program data, each of which, or some combination thereof, may comprise an implementation of a network environment.
The electronic device 600 may also communicate with one or more external devices 600' (e.g., keyboard, pointing device, bluetooth device, etc.), such that a user can communicate with devices with which the electronic device 600 interacts, and/or any device (e.g., router, modem, etc.) with which the electronic device 600 can communicate with one or more other computing devices. Such communication may occur via an input/output (I/O) interface 650. Also, the electronic device 600 may communicate with one or more networks (e.g., a Local Area Network (LAN), a Wide Area Network (WAN), and/or a public network such as the Internet) via the network adapter 660. The network adapter 660 may communicate with other modules of the electronic device 600 via the bus 630. It should be appreciated that although not shown in the figures, other hardware and/or software modules may be used in conjunction with the electronic device 600, including but not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data backup storage systems, among others.
Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, as shown in fig. 7, the technical solution according to the embodiment of the present application may be embodied in the form of a software product, which may be stored in a non-volatile storage medium (which may be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which may be a personal computer, a server, or a network device, etc.) to execute the above method according to the embodiment of the present application.
The software product may employ any combination of one or more readable media. The readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples (a non-exhaustive list) of the readable storage medium include: an electrical connection having one or more wires, a portable disk, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The computer readable storage medium may include a propagated data signal with readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A readable storage medium may also be any readable medium that is not a readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a readable storage medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Program code for carrying out operations of the present application may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, C + + or the like and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computing device, partly on the user's device, as a stand-alone software package, partly on the user's computing device and partly on a remote computing device, or entirely on the remote computing device or server. In the case of a remote computing device, the remote computing device may be connected to the user computing device through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computing device (e.g., through the internet using an internet service provider).
The computer readable medium carries one or more programs which, when executed by a device, cause the computer readable medium to perform the functions of: determining a board card debugging channel; acquiring board debugging data, wherein the board debugging data comprises a board identifier and debugging data; when the board card identification is matched with the board card debugging channel, the debugging data is input into a destination port through the board card debugging channel; and inputting the debugging data into a board card of the distributed machine frame based on the destination port so as to debug the board card.
The computer readable medium may also implement the following functions: generating response data after the debugging of the board card is completed; transmitting the response data from the destination port to the board card debugging channel; and outputting the response data to a serial port tool for analysis based on the board card debugging channel.
Those skilled in the art will appreciate that the modules described above may be distributed in the apparatus according to the description of the embodiments, or may be modified accordingly in one or more apparatuses unique from the embodiments. The modules of the above embodiments may be combined into one module, or further split into multiple sub-modules.
Through the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein may be implemented by software, or by software in combination with necessary hardware. Therefore, the technical solution according to the embodiment of the present application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (which can be a CD-ROM, a usb disk, a removable hard disk, etc.) or on a network, and includes several instructions to enable a computing device (which can be a personal computer, a server, a mobile terminal, or a network device, etc.) to execute the method according to the embodiment of the present application.
Exemplary embodiments of the present application are specifically illustrated and described above. It is to be understood that the application is not limited to the details of construction, arrangement, or method of implementation described herein; on the contrary, the intention is to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.
Claims (10)
1. A board debugging device, characterized by comprising:
the central processing unit is used for controlling a transmission channel on the complex programmable logic device;
the first serial port is used for receiving board debugging data and sending the board debugging data to the complex programmable logic device;
and the complex programmable logic device is used for sending the board card debugging data out through the transmission channel determined by the central processing unit.
2. The apparatus of claim 1, wherein the central processor comprises:
and the second serial port is used for acquiring user setting data to determine a transmission channel.
3. The apparatus of claim 1, wherein the first serial port comprises:
the device is suitable for the serial port of the universal asynchronous receiving and transmitting transmitter.
4. The apparatus of claim 1, wherein the complex programmable logic device comprises:
and each transmission channel is connected with one board card in the distributed machine frame so as to transmit the board card debugging data.
5. The apparatus of claim 1,
the central processing unit is connected with the complex programmable logic device through a bus;
the bus comprises an LPC bus and a LocalBus bus.
6. A board debugging system, comprising:
the serial port tool is used for transmitting the board debugging data to the board debugging device;
the board debugging device is used for transmitting the board debugging data to a specified board in the distributed machine frame according to user setting;
and the distributed machine frame is used for acquiring the board card debugging data and operating based on the board card debugging data.
7. A board debugging method is characterized by comprising the following steps:
determining a board card debugging channel;
acquiring board debugging data, wherein the board debugging data comprises a board identifier and debugging data;
when the board card identification is matched with the board card debugging channel, the debugging data is input into a destination port through the board card debugging channel;
and inputting the debugging data into a board card of the distributed machine frame based on the destination port so as to debug the board card.
8. The method of claim 7, further comprising:
generating response data after the debugging of the board card is completed;
transmitting the response data from the destination port to the board card debugging channel;
and outputting the response data to a serial port tool for analysis based on the board card debugging channel.
9. The method of claim 7, wherein determining a board debug channel comprises:
determining a target board card debugging channel according to a user instruction;
and writing the mark of the target board card debugging channel into a control register of the complex programmable logic device.
10. The method of claim 9, wherein when the board id and the board debug channel match, comprising:
and when the board card identification is consistent with the identification of the target board card debugging channel in the control register of the complex programmable logic device, determining that the board card identification is matched.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111639870.XA CN114356671A (en) | 2021-12-29 | 2021-12-29 | Board card debugging device, system and method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202111639870.XA CN114356671A (en) | 2021-12-29 | 2021-12-29 | Board card debugging device, system and method |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN114356671A true CN114356671A (en) | 2022-04-15 |
Family
ID=81103649
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202111639870.XA Pending CN114356671A (en) | 2021-12-29 | 2021-12-29 | Board card debugging device, system and method |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN114356671A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112506746A (en) * | 2020-12-16 | 2021-03-16 | 杭州迪普科技股份有限公司 | Temperature monitoring method and system for multiple central processing units |
| CN115827080A (en) * | 2023-02-15 | 2023-03-21 | 南方电网产业投资集团有限责任公司 | Embedded equipment adaptation method and device based on serial port communication and computer equipment |
-
2021
- 2021-12-29 CN CN202111639870.XA patent/CN114356671A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112506746A (en) * | 2020-12-16 | 2021-03-16 | 杭州迪普科技股份有限公司 | Temperature monitoring method and system for multiple central processing units |
| CN115827080A (en) * | 2023-02-15 | 2023-03-21 | 南方电网产业投资集团有限责任公司 | Embedded equipment adaptation method and device based on serial port communication and computer equipment |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| EP2158495B1 (en) | Integrated circuit with self-test feature for validating functionality of external interfaces | |
| CN114356671A (en) | Board card debugging device, system and method | |
| US10198396B2 (en) | Master control board that switches transmission channel to local commissioning serial port of the master control board | |
| CN111901164B (en) | Adaptive control method, device, equipment and system of OCP NIC network card | |
| CN104298579A (en) | Logic chip and board card device with same | |
| CN102253845B (en) | Server system | |
| CN115496018A (en) | Multi-version verification method, device and equipment for SoC (System on chip) | |
| CN102147640A (en) | Server with a plurality of main boards | |
| CN102426548A (en) | Debugging method, debugger and debugging system for embedded system | |
| CN110209605A (en) | The register reading/writing method and calculating equipment of PCIE Cardbus NIC Cardbus | |
| CN110096291A (en) | Power management chip upgrades circuit, method and the network equipment | |
| CN101739320A (en) | Error detection device of server and error detection method thereof | |
| CN113434442A (en) | Switch and data access method | |
| CN111414327B (en) | Network device | |
| CN110162499A (en) | A kind of PECI bus switch device, method and system | |
| WO2022100148A1 (en) | Backplane communication device and control method therefor, and storage medium | |
| CN114647597A (en) | Serial port conversion method and device of CPU | |
| CN100460876C (en) | Measuring system and its data interface converting device | |
| CN110401586B (en) | Bus communication method, device, equipment and readable storage medium | |
| CN111526067B (en) | Network shunt and communication method of network shunt | |
| CN104937575A (en) | USB controllers coupled to USB ports | |
| CN107659413B (en) | Small-sized communication equipment | |
| CN216014148U (en) | Server and server backboard | |
| CN115643223B (en) | Interrupt signal transmission method and device | |
| CN114629860B (en) | Data transmission method, device, service line card and storage medium |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination |