CN110595514B - Phase adaptive circuit in rotary-to-digital converter and control method thereof - Google Patents
Phase adaptive circuit in rotary-to-digital converter and control method thereof Download PDFInfo
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- CN110595514B CN110595514B CN201910905974.7A CN201910905974A CN110595514B CN 110595514 B CN110595514 B CN 110595514B CN 201910905974 A CN201910905974 A CN 201910905974A CN 110595514 B CN110595514 B CN 110595514B
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Abstract
The invention relates to a phase self-adaptive circuit in a rotary-to-digital converter and a control method thereof, wherein the self-adaptive circuit comprises a signal selection and quadrant control circuit, a zero-crossing pulse generation circuit, a phase-shifting circuit, a zero-crossing comparison circuit, a D trigger square wave signal generation circuit and a phase monitoring processing circuit; the input end of the signal selection and quadrant control circuit is connected with a sine and cosine signal, and the output end of the signal selection and quadrant control circuit is connected with the clock input end of the D trigger square wave signal generating circuit through a zero-crossing pulse generating circuit; the input end of the phase shift circuit is connected with an externally input reference signal, the output end of the phase shift circuit is connected with the level input end of the D trigger square wave signal generating circuit through the zero-crossing comparison circuit, and the output end of the D trigger square wave signal generating circuit is connected with the input end of the phase monitoring processing circuit. The invention can make the phase demodulation circuit self-adapt to the existence of different phase shift angles alpha and work in the phase demodulation state without phase shift all the time, thereby ensuring the rotation-to-digital converter to realize error-free tracking.
Description
Technical Field
The invention relates to the field of phase discrimination control circuit design in a resolver-to-digital converter, in particular to a phase adaptive circuit in the resolver-to-digital converter and a control method thereof.
Background
The rotary transformer-to-digital converter is one of key devices in a servo control system, is used for digitally converting position/angle analog quantity in the system, and is connected with an upper computer through a standard interface circuit to realize real-time reading of position/angle data information. The rotary-to-digital converter product can be applied to important weapon systems such as aerospace, aviation, weapons, ships and warships and the like, and also can be widely applied to a plurality of civil servo control fields such as numerical control machine servo mechanisms, automobile electric power steering measurement, engine motion detection and control, scanning, searching, positioning, navigation, measurement and the like.
A phase discrimination processing circuit is usually designed in the conversion-to-digital converter, the function of converting the waveform of an alternating current error input into a phase discrimination head wave output is realized, and a digital angle is output through a post-stage integral filter circuit, a voltage-controlled oscillator and a serial/parallel counting latch. The existing phase discrimination processing circuit design adopts a control method that a reference signal generates a square wave signal after zero-crossing comparison, and obtains a control signal required by an alternating current error signal phase discrimination processing circuit. The control method is suitable for the ideal condition that sine and cosine signals input by the rotary-to-digital converter and a reference signal have no phase shift, but has some defects in practical engineering application.
As the signal input of the resolver-to-digital converter, a reference signal (synchronously used by the resolver-to-digital converter) of the angle measuring motor and a sine-cosine signal output by the reference signal are discretely distributed with a phase shift, and the phase shift angle alpha ranges from 1 to 45 degrees. The existing control method adopts a square wave signal generated after a reference signal is subjected to zero-crossing comparison to obtain a control signal required by an alternating current error signal phase discrimination processing circuit, when an angle measuring motor rotates at a high speed, the dynamic conversion precision of a converter is seriously influenced by the existence of a phase shift angle alpha, and the generated dynamic error can be calculated by using the following formula:
dynamic conversion error = goniometric motor speed (rev/sec) × phase shift angle α (degree)/reference signal frequency (Hz)
Such as: the phase shift angle alpha is 35 degrees, the rotation speed of the angle measuring motor is 27 revolutions per second, the frequency of the reference signal is 400Hz,
then: the dynamic switching error is 2.4 °.
Dynamic switching errors of this order of magnitude are not allowed in the field of accurate measurement and control.
Disclosure of Invention
The invention aims to provide a phase adaptive circuit in a resolver-to-digital converter and a control method thereof, which adopt proper compensation measures for a phase detection circuit to ensure that the phase detection circuit is adaptive to the existence of different phase shift angles alpha and always works in a phase detection state without phase shift so as to ensure that the resolver-to-digital converter realizes error-free tracking.
In order to achieve the purpose, the invention adopts the following technical scheme:
a phase adaptive circuit in a rotary to digital converter, comprising:
the signal selection and quadrant control circuit is used for receiving sine and cosine signals and adjusting the received sine and cosine signals to the same quadrant to output sine signals with amplitude values within a threshold range;
the zero-crossing pulse generating circuit is used for obtaining a zero-crossing positive pulse signal with the same frequency as the input sine and cosine signals;
the phase shift circuit is used for obtaining a square wave signal ahead of an external input reference signal;
the zero-crossing comparison circuit is used for generating a square wave signal of a zero-crossing point;
the D trigger square wave signal generating circuit is used for receiving a zero-crossing point square wave signal and a zero-crossing point positive pulse signal, and generating a zero-crossing point positive pulse phase-locked square wave signal by taking the two signals as overturning conditions;
the phase discrimination processing circuit is controlled by the square wave output by the D trigger square wave signal generating circuit, and keeps the same phase of the input alternating current error signal in the phase shift between the reference signal and the sine and cosine signal to discriminate the input alternating current error signal into the steamed bread wave and output the steamed bread wave.
In the above scheme, the input end of the sinusoidal signal selection and quadrant control circuit is connected to the front end signal processing circuit, and is configured to acquire a sinusoidal signal whose output amplitude is within a threshold range.
In the above scheme, the phase-shift current adopts a 90 ° phase-shift circuit, an input end of the 90 ° phase-shift circuit is connected with an externally input reference signal, and an output end thereof is connected with an input end of the zero-crossing comparison circuit.
In the scheme, the input end of the zero-crossing pulse generating circuit is connected with the output end of the signal selecting and quadrant control circuit, and the output end of the zero-crossing pulse generating circuit is connected with the clock input end of the D trigger square wave signal generating circuit; the input end of the zero-crossing comparison circuit is connected with the output end of the phase-shifting circuit, and the output end of the zero-crossing comparison circuit is connected with the level input end of the D trigger square wave signal generating circuit.
A method for controlling a phase adaptive circuit in a resolver to digital converter, comprising the steps of:
step 1: receiving sine and cosine signals, and adjusting the received sine and cosine signals to the same quadrant to output sine signals with amplitude values within a threshold range to obtain zero-crossing point positive pulse signals with the same frequency;
step 2: acquiring a square wave signal ahead of an externally input reference signal, and generating a zero-crossing square wave signal;
and step 3: receiving a zero-crossing square wave signal and a zero-crossing positive pulse signal, and generating a zero-crossing positive pulse phase-locked square wave signal by taking the two signals as overturning conditions;
and 4, step 4: the square wave signal generating zero-crossing positive pulse phase locking is in phase shift between the reference signal and sine and cosine signals, and the input alternating current error signal is kept in phase and phase discrimination to be output as steamed bread waves.
According to the technical scheme, the phase adaptive circuit in the resolver-to-digital converter and the control method thereof realize that the phase demodulation processing circuit is adaptive to the existence of different phase demodulation angles alpha between externally given 2V sine and cosine signals and the 2V reference signals within the maximum +/-70-degree wide phase demodulation range between the reference signal of the angle measurement motor and the sine and cosine signals output by the reference signal, and always work in a phase demodulation state without phase demodulation, so that the problem of dynamic tracking error caused by the fact that a square wave signal generated after the reference signal is subjected to zero comparison is adopted as a control signal required by an alternating current error signal phase demodulation circuit in the prior art is solved.
Drawings
FIG. 1 is a schematic structural view of the present invention;
FIG. 2 is a waveform diagram of the sine and cosine signal selection and quadrant control circuit input/output waveforms of the present invention;
fig. 3 is a waveform diagram of the output of each module of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings:
as shown in fig. 1, the phase adaptive circuit in the resolver-to-digital converter of the present embodiment includes a sine and cosine signal selecting and quadrant controlling circuit 1, a zero-crossing pulse generating circuit 2, a phase shifting circuit 3, a zero-crossing comparing circuit 4, a trigger square wave signal generating circuit 5, and a phase discrimination processing circuit 6; the input end of the signal selection and quadrant control circuit 1 is connected with a front end signal processing circuit, the input end of the zero-crossing pulse generating circuit 2 is connected with the output end of the sine and cosine signal selection and quadrant control circuit 1, and the output end of the zero-crossing pulse generating circuit 2 is connected with the clock input end of the D trigger square wave signal generating circuit 5; the input end of the phase shift circuit 3 is connected with an externally input reference signal, the output end of the phase shift circuit 3 is connected with the input end of the zero-crossing comparison circuit 4, the output end of the zero-crossing comparison circuit 4 is connected with the level input end of the D trigger square wave signal generating circuit 5, the output end of the D trigger square wave signal generating circuit 5 is connected with the input end of the phase monitoring processing circuit 6, and the output end of the phase monitoring processing circuit 6 is the output end of the self-adaptive circuit.
The sine and cosine signal selection and quadrant control circuit 1 is connected with an externally given 2V sine and cosine signal and is used for receiving the sine and cosine signal and adjusting the received sine and cosine signal to the same quadrant to output a sine signal with the amplitude within the threshold range;
the zero-crossing pulse generating circuit 2 is used for obtaining a zero-crossing positive pulse signal with the same frequency as the input sine and cosine signals;
the zero-crossing comparison circuit 4 is used for generating a square wave signal of a zero-crossing point;
the D trigger square wave signal generating circuit 5 is used for receiving a zero-crossing point square wave signal and a zero-crossing point positive pulse signal, and generating a zero-crossing point positive pulse phase-locked square wave signal by taking the two signals as overturning conditions;
the phase shift circuit 3 is connected with an external given 2V reference signal and is used for obtaining a square wave signal ahead of an external input reference signal; the phase shift circuit of the present embodiment employs a 90 ° phase shift circuit for phase-shifting an input reference signal by 90 ° in advance and outputting it.
The phase discrimination processing circuit 6 is controlled by the square wave output by the D trigger square wave signal generating circuit, and keeps the same phase of the input alternating current error signal to discriminate the same phase as the steamed bread wave within the maximum +/-70-degree phase shift between the reference signal and the sine and cosine signal.
The working principle is as follows:
as shown in fig. 1, the sine and cosine signal selection and quadrant control circuit 1 adjusts the sine and cosine signals input by the front end signal processing circuit to the same quadrant, and selects and outputs a sine signal with a larger amplitude; the sine signal with a large output amplitude passes through the zero pulse generating circuit 2 to obtain zero-crossing positive pulses of the input sine and cosine signals, and is connected to a clock input end (CLK end) of the D flip-flop. Meanwhile, a reference signal input from the outside is subjected to 90-degree phase shift circuit 3 and zero-crossing comparison circuit 4 to obtain a square wave signal which is advanced by 90 degrees compared with the reference signal, the square wave signal comprises two levels of logic 1 and logic 0, the square wave signal is connected to a level input end (D end) of a D trigger square wave signal generating circuit 5, a zero-crossing positive pulse of a sine-cosine signal is connected to a clock input end (CLK end) of the D trigger square wave signal generating circuit 5, and then a square wave signal which is subjected to zero-crossing positive pulse phase locking of the sine-cosine signal is generated at an output positive end (Q end) of the D trigger square wave signal generating circuit 5. The square wave signal phase-locked by the zero-crossing positive pulse of the sine and cosine signal is connected to the phase discrimination processing circuit 6, so that the phase discrimination steamed bread wave output which is always in the same phase with the input alternating current error signal within the maximum +/-70-degree phase shift between the reference signal and the sine and cosine signal is realized.
The waveform diagram of the signal selection and quadrant control circuit 1 is shown in fig. 2, and the signal selection and quadrant control circuit 1 receives sine and cosine signals input from the front end signal processing circuit, such as waveforms a and b in fig. 2, and generates a sine signal output with an output amplitude within a threshold range, such as waveform c in fig. 2, through the signal selection and quadrant control circuit.
The zero-crossing pulse generating circuit 2 receives the c-waveform signal of fig. 2 and generates a c-signal zero-crossing positive pulse output, such as the d-waveform of fig. 3.
And the reference signal 90-degree phase shift circuit 3 receives the external input reference signal, and obtains a leading phase shift 90-degree signal output through an active phase shift RC network, such as an e waveform shown in figure 3.
And the zero-crossing comparison circuit 4 receives the e waveform shown in the figure 3, and obtains a square wave signal output with the same frequency and the same phase as the e waveform through the zero-crossing comparison circuit, such as the f waveform shown in the figure 3.
The D waveform of fig. 3 is used as a clock input end (CLK end) of the D flip-flop, the f waveform of fig. 3 is used as a level input end (D end), and at this time, the positive output end (Q end) of the D flip-flop outputs a square wave signal phase-locked by the D waveform of fig. 3, such as the g waveform of fig. 3.
The phase discrimination processing circuit 6 receives an externally input alternating current error signal such as a c waveform (different amplitude) shown in the attached figure 2, implements polarity control on the circuit through a g waveform shown in the attached figure 3, and discriminates the c waveform shown in the attached figure 2 into a steamed bread wave output by keeping the same phase, such as an h waveform shown in the attached figure 3.
As can be seen from the attached figures, the signal with larger sine and cosine signal amplitude is selected as the generating condition of the zero-crossing pulse, so that the loss of the pulse signal can be avoided; because the input sine and cosine signals, the alternating current error signal and the input reference signal are in the same phase under an ideal condition, the D-waveform positive pulse of the attached figure 2 is positioned at the middle position of the positive pulse width of the f-waveform square wave of the attached figure 2 output by the zero comparator after the reference signal is subjected to phase shift of 90 degrees in advance, and the g-waveform square wave of the attached figure 2 generated by the D trigger keeps the same phase with the input sine and cosine signals to control the phase demodulation processing circuit, so that the phase demodulation head wave output by the phase demodulation processing circuit 6 is always in the same phase with the alternating current error signal without generating a reverse angle, and the dynamic conversion precision of the rotary-to-digital converter is ensured.
When the input sine and cosine signal and the input reference signal have phase shift of alpha angle (or positive or negative), the d waveform positive pulse of figure 2 generated according to the sine and cosine signal will generate phase shift (or left shift or right shift) equivalent to alpha angle from the center position of the f waveform square wave positive pulse width of figure 2 under ideal condition, theoretically, when the alpha angle is in the range of +/-90 degrees, the d waveform positive pulse of figure 2 is still within the f waveform square wave positive pulse width of figure 2, so that the g waveform square wave of FIG. 2 generated by the D flip-flop is still in phase with the input sine and cosine signal, when there is a phase shift angle between the input sine and cosine signal and the reference signal, the phase of the control signal of the phase discrimination processing circuit is adaptively adjusted to be consistent with the alternating current error signal all the time, so that the phase discrimination processing circuit 6 is always in a working state without phase shift and phase discrimination output. It should be noted that, in consideration of the tolerance design of the circuit, the phase adaptive capacity of the control method of the present invention is ± 70 °, which covers the range of 1 ° to 45 ° phase shift between the reference signal (used synchronously from the rotary converter to the digital converter) of the angle measuring motor and the sine and cosine signal output by the reference signal, and has sufficient displacement margin.
The above-mentioned embodiments are merely illustrative of the preferred embodiments of the present invention, and do not limit the scope of the present invention, and various modifications and improvements of the technical solution of the present invention by those skilled in the art should fall within the protection scope defined by the claims of the present invention without departing from the spirit of the present invention.
Claims (4)
1. A phase adaptive circuit in a rotary to digital converter, comprising:
the signal selection and quadrant control circuit is used for receiving sine and cosine signals and adjusting the received sine and cosine signals to the same quadrant to output sine signals with amplitude values within the range of 1.4V-2V threshold values;
the zero-crossing pulse generating circuit is used for obtaining a zero-crossing positive pulse signal with the same frequency as the input sine and cosine signals;
the phase shift circuit is used for obtaining a square wave signal ahead of an external input reference signal;
the zero-crossing comparison circuit is used for generating a square wave signal of a zero-crossing point;
the D trigger square wave signal generating circuit is used for receiving a zero-crossing point square wave signal and a zero-crossing point positive pulse signal, and generating a zero-crossing point positive pulse phase-locked square wave signal by taking the two signals as overturning conditions;
the phase discrimination processing circuit is controlled by the square wave output by the D trigger square wave signal generating circuit, and keeps the same phase of an input alternating current error signal in the phase shift between a reference signal and a sine and cosine signal to discriminate the input alternating current error signal into steamed bread waves and output the steamed bread waves;
the input end of the signal selection and quadrant control circuit is connected with the front-end signal processing circuit, the input end of the phase-shifting circuit is connected with an externally input reference signal, the output end of the phase-shifting circuit is connected with the input end of the zero-crossing comparison circuit, the input end of the zero-crossing pulse generation circuit is connected with the output end of the signal selection and quadrant control circuit, and the output end of the zero-crossing pulse generation circuit is connected with the clock input end of the D trigger square wave signal generation circuit; the input end of the zero-crossing comparison circuit is connected with the output end of the phase-shifting circuit, the output end of the zero-crossing comparison circuit is connected with the level input end of the D trigger square wave signal generating circuit, and the output end of the D trigger square wave signal generating circuit is connected with the input end of the phase discrimination processing circuit.
2. The phase adaptive circuit in a resolver to digital converter according to claim 1, wherein: the signal selection and quadrant control circuit is used for acquiring a sinusoidal signal with an output amplitude within a threshold range.
3. The phase adaptive circuit in a resolver to digital converter according to claim 1, wherein: the phase shift circuit adopts a 90-degree phase shift circuit.
4. The method of claim 1, comprising the steps of:
step 1: receiving sine and cosine signals, and adjusting the received sine and cosine signals to the same quadrant to output sine signals with amplitude values within a threshold range to obtain zero-crossing point positive pulse signals with the same frequency;
step 2: acquiring a square wave signal ahead of an externally input reference signal, and generating a zero-crossing square wave signal;
and step 3: receiving a zero-crossing square wave signal and a zero-crossing positive pulse signal, and generating a zero-crossing positive pulse phase-locked square wave signal by taking the two signals as overturning conditions;
and 4, step 4: the square wave signal generating zero-crossing positive pulse phase locking is in phase shift between the reference signal and sine and cosine signals, and the input alternating current error signal is kept in phase and phase discrimination to be output as steamed bread waves.
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