JPH0552589A - Absolute encoder device - Google Patents

Abstract

PURPOSE:To reduce the number of signals of detector interface and to enable high speed rotation even in case of high resolution application. CONSTITUTION:A rotation number detector 1, an absolute value encoder 4 and a relative encoder 6 are provided, as well as an interpolation circuit 20 which detects absolute position in one single cycle of output signal of the relative value encoder 6 and then converts it into counting data, is also prepared. Accordingly, the number of signals of the detector interface can be well reduced, and the device can be used under high speed rotation condition even if its resolution is raised high, and finally absolute position can be detected with resolution of the relative encoder.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an absolute value encoder device, and more particularly to an absolute value encoder device for detecting the absolute position of a machine tool with high accuracy.

[0002]

2. Description of the Related Art An absolute encoder device is attached to a rotary shaft of a motor or the like, detects the number of revolutions of the rotary shaft of the motor or the like from the origin, and the position (angle) within one revolution, and outputs the data to the motor or the like. It is a unit that outputs to the control device.

FIG. 6 shows a conventional absolute value encoder device (5
00) is a block diagram. To detect the number of revolutions, the revolution number detector (1) outputs a signal of one pulse per one revolution of a rotating shaft of a motor or the like, and the number of revolutions counter (2) counts. The rotation counter (2) counts up or down depending on the rotation direction. The rotation speed detector (1) and the rotation speed counter (2) are backed up by a rechargeable battery (3) and operate even when the power is off. Then, when the power is turned on, the count data is sent to the detector interface (10).

To detect the absolute position within one rotation, the absolute value encoder (4) outputs a special code such as a gray code,
The signal conversion circuit (5) converts the special code into binary data. The absolute value encoder (4) and the signal conversion circuit (5) operate at power-on and send binary data to the detector interface (10).

To detect the relative position, the relative value encoder (6) outputs SIN waves and COS waves of a predetermined cycle per one rotation of the rotating shaft of the motor or the like, and the SIN waves and COS waves are output.
From the S wave, an A-phase rectangular wave with an integral multiple frequency in the multiplier circuit (7),
A B-phase rectangular wave is created, a pulse train having a quadruple frequency is created from the A-phase rectangular wave and the B-phase rectangular wave by a pulse train converter (8), and the pulse train is counted by an up-down counter (9). The relative value encoder (6), the multiplication circuit (7), the pulse train converter (8), and the up / down counter (9) operate when the power is turned on and send count data to the detector interface (10).

The detector interface (10) transmits the count data of the revolution counter (2) and the binary data of the signal conversion circuit (5) to a control device such as a motor.
Also, the count data of the up / down counter (9) is transmitted to a control device such as a motor.

A control device such as a motor is provided with the count data of the rotation speed counter (2) and the count data of the signal conversion circuit (5).
Recognize the current position from the binary data. The data obtained from these have low resolution and cannot be used for control. Therefore, after that, the position data of the motor or the like is controlled using the count data of the up / down counter (9).

FIG. 7 is a block diagram showing in detail the relative encoder (6), the multiplication circuit (7) and the pulse train converter (8) shown in FIG. In addition, FIG.
8 is a time chart of signals of respective parts of FIG. 7.

In FIG. 7, based on the SIN wave and COS wave outputs (a and b in FIG. 8) of the relative value encoder (6), a signal whose phase is delayed by 1 / n unit of their cycle is used as a phase modulation circuit. Signals generated by (11a) to (11n) and delayed in phase are converted into digital circuit rectangular waves (U to K in FIG. 8) by comparators (12a) to (12n). Next, the rectangular wave for the digital circuit is converted into the phase synthesis circuit (1
In step 3), the A-phase signal and the B-phase signal having a 90 ° phase difference corresponding to the A-phase signal and the B-phase signal of the incremental encoder (B and C in FIG. 8) are created. The A-phase signal and the B-phase signal are converted into pulse trains according to polarity by the pulse train conversion circuit (8) (see FIG.
No, Ko)

[0010]

Since the conventional absolute value encoder device (500) is configured as described above, there is a problem that the number of signals of the detector interface (10) is large. Further, since there is a limit to increasing the frequency of the pulse train, there is a problem that high-speed rotation cannot be achieved if the resolution is increased.

The present invention has been made to solve the above problems, and an object thereof is to obtain an absolute value encoder device capable of rotating at a high speed even when the resolution is increased and the number of signals of the detector interface is reduced.

[0012]

According to a first aspect, in an absolute value encoder device including a rotation speed detector, an absolute value encoder, and a relative value encoder, the output signal of the relative value encoder within one cycle is An absolute value encoder device having an interpolation circuit for detecting an absolute position and converting it into count data.

According to a second aspect, in the absolute value encoder device, the interpolation circuit converts the analog signal output of the relative value encoder into a sawtooth wave signal, and the output of the conversion circuit into binary data. And an A / D converter for performing the absolute value encoder device.

[0014]

In the absolute value encoder device according to the first aspect of the present invention, the data of the relative value encoder is divided into count data in the output cycle and interpolation data in the output cycle, and the interpolation data is treated as absolute value data. Take it out.

In the absolute value encoder device according to the second aspect of the present invention, the signal of the relative value encoder is converted into a sawtooth wave and further converted into a digital signal to eliminate a portion where the signal has a high frequency.

[0016]

The present invention will be described in more detail with reference to the embodiments shown in the drawings. However, this does not limit the present invention. FIG. 1 is a block diagram of an absolute value encoder device (100) according to an embodiment of the present invention. (1) is a rotation speed detector that outputs a signal of one pulse per one rotation of a rotating shaft such as a motor. (2) is a rotation speed counter for counting the output pulses of the rotation speed detector (1). (3) is a battery that is charged from the power supply when the power is on and supplies power to the rotation speed detector (1) and the rotation speed counter (2) when the power is off.

(4) is an absolute encoder that detects the absolute position of the rotating shaft of the motor or the like within one rotation and outputs it as a special code. (5) is a signal conversion circuit for converting the special code output from the absolute value encoder (4) into n-bit binary data.

Reference numeral (6) is a relative encoder which outputs a sine wave signal (SIN wave, COS wave) of a predetermined cycle per one rotation of a rotary shaft of a motor or the like. (20) is the S output from the relative encoder (6)
It is an interpolation circuit that creates absolute value data in one cycle of the IN wave and the COS wave.

FIG. 2 is a block diagram showing the detailed structure of the interpolation circuit (20) shown in FIG. (21) is a reference high frequency oscillator. (22) is a rising 1/2 frequency divider that outputs a pulse signal of 1/2 frequency in synchronization with the rising of the reference high frequency output from the oscillator (21). (23) is a falling 1/2 frequency divider that outputs a pulse signal of 1/2 frequency in synchronization with the falling of the reference high frequency output from the oscillator (21). Reference numeral (24) is a sawtooth wave creating circuit for producing a sawtooth wave in synchronization with the output pulse of the rising ½ frequency divider (22).

A switch (25a) is turned on when the output of the rising 1/2 frequency divider (22) is Hi and outputs the SIN wave (d in FIG. 2) output by the relative value encoder (6). Is. (25b) is a switch that is turned on when the output of the falling 1/2 frequency divider (23) is Hi and outputs the COS wave (e in FIG. 2) output by the relative value encoder (6). is there.

(26) is the switch (25a) (2)
5b) is an adder for adding the voltages of the output signals. (27) is a filter that extracts only the fundamental wave component from the output signal of the adder (26). (12) is a comparator for converting the output signal of the filter (27) into a pulse signal. (28) is a rising differential circuit that outputs a pulse at the rising edge of the output pulse signal of the comparator (12).

(29) is the sawtooth wave creating circuit (2
This is a sample and hold for sampling the sawtooth wave output by 4) with the output pulse of the rising differential circuit (28). The output of this sample hold (29) is
The sawtooth wave has the same frequency as the output of the relative value encoder (6). (30) is an A / D converter for converting the sawtooth wave output from the sample hold (29) into a digital signal.

Next, the operation of the interpolation circuit (20) will be described. From the output signal of the reference high frequency oscillator (21), the rising 1/2 frequency divider (22) and the rising 1/2 frequency divider (23) output 90 ° phase difference pulse signals (a and b in FIG. 3). To create.

The pulse signal (a in FIG. 3) output from the rising 1/2 divider (22) causes the switch (25a) to
Is the SIN wave output by the relative encoder (6) (see FIG.
D) is switched, and the switching SIN wave (Fig. 3
F) is output. If the phase of the output pulse of the rising 1/2 frequency divider (22) is cosωt and the phase of the SIN wave output by the relative encoder (6) is sin θ,
The phase of the switching SIN wave is cos ωt · sin θ.

The pulse signal (b in FIG. 3) output from the falling 1/2 frequency divider (23) is used to switch (25b).
Is the COS wave output by the relative encoder (6) (see FIG.
E) is switched and a switching COS wave is output. When the phase of the output pulse of the falling 1/2 frequency divider (23) is sin ωt and the phase of the COS wave output by the relative value encoder (6) is cos θ, the phase of the switching COS wave is sin ωt · cos θ.

The switching SIN wave and the switching COS wave are added by an adder (26), and a filter (2
7) to obtain the fundamental wave (g in FIG. 3). The phase of the fundamental wave is sin (ωt + θ) from cosωt · sinθ + sinωt · cosθ.

Therefore, the phase of the output pulse of the comparator (12) is different from the phase of the output pulse of the rising 1/2 frequency divider (22) and the falling 1/2 frequency divider (23).
The phase is deviated by θ.

The rising differential circuit (28) outputs a pulse (h in FIG. 3) based on the output pulse of the comparator (12), the phase of which is rising ½ frequency divider (22) The phase is shifted by θ with respect to the phase of the output pulse of the falling 1/2 frequency divider (23).

On the other hand, the sawtooth wave creating circuit (24) creates a sawtooth wave (c in FIG. 3) from the output pulse of the rising 1/2 frequency divider (22), and a sample hold (29).
Output to.

The sample hold (29) uses the output pulse (h in FIG. 3) of the rising differential circuit (28) to
The sawtooth wave (c in FIG. 3) is sampled and held.
The output of the sample hold (29) becomes a sawtooth wave (i in FIG. 3) having the same cycle as the output of the relative encoder (6).

Therefore, the binary code output from the A / D converter (30) indicates the position within one cycle of the output of the relative value encoder (6).

Next, the operation of the absolute value encoder device (100) will be described. To detect the number of revolutions, the revolution number detector (1) outputs a signal of one pulse per one revolution of a rotating shaft of a motor or the like, and the number of revolutions counter (2) counts. The rotation counter (2) counts up or down depending on the rotation direction. The rotation speed detector (1) and the rotation speed counter (2) are backed up by a rechargeable battery (3) and operate even when the power is off. Then, when the power is turned on, the count data is sent to the detector interface (10).

To detect the position within one rotation, the absolute value encoder (4) outputs a special code such as a gray code and the signal conversion circuit (5) converts the special code into binary data. The absolute value encoder (4) and the signal conversion circuit (5) operate when the power is turned on and send binary data to the detector interface (10). At the same time, as described above, the absolute position within one cycle of the output of the relative value encoder (6) is obtained as the output of the interpolation circuit (20). The relative value encoder (6) and the interpolation circuit (20) operate at power-on and send the output to the detector interface (10).

A control device such as a motor recognizes the current position by combining the count data of the rotation speed counter (2), the binary data of the signal conversion circuit (5) and the binary data of the interpolation circuit (20). Position control of motors etc.

In this absolute value encoder device (100), the total number of bits of the binary number data of the signal conversion circuit (5) and the binary number data of the interpolation circuit (20) is the conventional up / down counter (9). The number of bits of the count data in) should be the same. Therefore, the number of signals of the detector interface (10) is reduced by the number of bits of the binary data of the signal conversion circuit (5). In addition, the interpolation circuit (2
Since the output of 0) is the same as the counter data, no other counter is needed.

Next, a relative value encoder for triangular wave output,
An embodiment using the interpolation circuit for the relative value encoder of the triangular wave output will be described. The other constituent elements are the same as those in the above-described embodiment, and the description thereof is omitted. In FIG. 4, the relative value encoder (6 ′) outputs a triangular wave signal having a 90 ° phase difference as in A and B of FIG. Interpolation circuit (20 ')
The inverting amplifiers (40a) and (40b) of FIG. 8 inversely amplify the triangular wave signals output from the relative value encoder (6 ') and output triangular wave signals such as C and D in FIG.

Comparator (12f) (12g) (12
h) (12e) produces pulse signals having a quarter period width such as F, G, H, and E of FIG. 5 from the four triangular wave signals of A, B, C, and D of FIG. Switch (25f) (25g)
(25h) and (25e) are turned on when the output pulses of the comparators (12f), (12g), (12h) and (12e) are Hi, and output the input signals.

As a result, the switch (25f) (25g)
A which is a combination of the outputs of (25h), (25e), and (25c)
The input of the / D converter (30) is a sawtooth wave like I in FIG. This corresponds to i in FIG. 3 (note that FIG.
And Figure 5 have different time scales). This sawtooth wave is converted into binary data by the A / D converter (30) and output. With the absolute value encoder device having the above configuration, the same effect as that of the absolute value encoder device (100) in FIG. 1 can be obtained.

[0039]

As described above, according to the absolute value encoder device of the present invention, since the data of the relative value encoder is only the output data of the interpolation circuit, the number of signals of the detector interface can be reduced. Further, since the multiplication circuit and the like where the signal has a high frequency is eliminated, it can be used at high speed rotation even if the resolution is increased.

Furthermore, since the interpolation circuit uses the absolute value data method, it is possible to detect the absolute position with the resolution of the relative value encoder.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of an absolute value encoder device of the present invention.

2 is a block diagram of an interpolation circuit of the absolute value encoder device of FIG. 1. FIG.

FIG. 3 is a time chart of signals at various parts of the interpolation circuit of FIG.

FIG. 4 is a block diagram of a main part of another embodiment of the absolute value encoder device of the present invention.

FIG. 5 is a time chart of signals of respective parts in FIG.

FIG. 6 is a block diagram of an example of a conventional absolute value encoder device.

FIG. 7 is a detailed block diagram of a main part of the absolute value encoder device of FIG.

FIG. 8 is a time chart of signals of respective parts of FIG.

[Explanation of symbols]

 DESCRIPTION OF SYMBOLS 1 rotation speed detector 2 rotation speed counter 4 absolute value encoder 5 signal conversion circuit 6 relative value encoder 6'relative value encoder 20 interpolation circuit 20 'interpolation circuit

Claims (2)

[Claims] 1. A rotation speed detector, an absolute value encoder,
An absolute value encoder device including a relative value encoder, comprising an interpolation circuit that detects an absolute position within one cycle of an output signal of the relative value encoder and converts the absolute position into count data. 2. The absolute value encoder device according to claim 1, wherein the interpolation circuit converts the analog signal output of the relative value encoder into a sawtooth wave signal, and the output of the conversion circuit into binary data. An absolute value encoder device having an A / D converter for conversion.