CN110545096B - Quick starting circuit - Google Patents
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- CN110545096B CN110545096B CN201910821605.XA CN201910821605A CN110545096B CN 110545096 B CN110545096 B CN 110545096B CN 201910821605 A CN201910821605 A CN 201910821605A CN 110545096 B CN110545096 B CN 110545096B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
- H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
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Abstract
The invention discloses a quick start circuit, and relates to the technical field of integrated circuits. The quick starting circuit comprises a level conversion module, an inverter module, a first field effect transistor, a second field effect transistor and a resistor, wherein the inverter module is connected with the level conversion module; the second field effect transistor is connected to the power supply voltage; one end of the resistor is connected with the second field effect transistor and is connected with the starting voltage output end of the quick starting circuit, and the other end of the resistor is grounded; the starting voltage output end outputs starting voltage to the subsequent circuit to start the subsequent circuit, and the starting voltage output end is also connected to the input end of the level conversion module. According to the technical scheme, the starting voltage of the starting voltage output end is output to the level conversion module, so that the circuit is more reliable and is more timely to close.
Description
Technical Field
The invention relates to the technical field of integrated circuits, in particular to a quick start circuit.
Background
The power supply module is an indispensable part in the integrated circuit, and the starting speed of the power supply directly determines the response speed of the whole system. In particular, in the case of advocating low power consumption designs, the response time of the system will be longer, and the conventional start-up circuit design cannot meet the current design requirements.
The traditional starting circuit adopts a current filling mode to enable the circuit to reach a normal working state, but the resistance value of the circuit in the low-power consumption design is very large, the working current is very small, meanwhile, the parasitic capacitance in the circuit is larger than that in the conventional power consumption design, and the current filling mode can take longer time to charge the parasitic capacitance in the circuit, so that the circuit can be completed in a longer time. Another problem is that the conventional start-up circuit is greatly affected by the process and the start-up time varies greatly from process to process.
FIG. 1 is a schematic diagram of a conventional starting circuit in the prior art, wherein the entire starting circuit is in a zero state before a power supply is powered on; current I passing through second PMOS tube MP2 after power-up Mp2 Calculated by the following equation:
wherein VDD is the power supply voltage, V GSMp2 Is the gate-source voltage of the second PMOS tube, V GSMp4 Is the gate-source voltage of the fourth PMOS tube, V GSMp5 Is the gate-source voltage of the fifth PMOS tube, R 1 The resistance value of the first resistor R1;
the second PMOS transistor Mp2 and the third PMOS transistor Mp3 are in mirror image relationship, so that the currents are equal, the output voltage Vout of the starting circuit charges the post-stage circuit, the zero state balance of the circuit is broken, the circuit starts to start, and fig. 2 is a schematic diagram of starting time.
After the circuit is started, during normal operation, the feedback voltage Vb starts the first PMOS tube MP1, and at this time, the current I of the first PMOS tube MP1 Mp1 Calculated by the following equation:
wherein mu n The electron mobility is Cox is the gate oxide capacitance of a unit area, and Wp/Lp is the width-to-length ratio of the first PMOS tube MP 1;
at this time, the gate voltages of the second PMOS transistor Mp2 and the third PMOS transistor Mp3 will be raised, the second PMOS transistor Mp2 and the third PMOS transistor Mp3 enter the cut-off region, and the output voltage Vout has no output current. However, the current of the first PMOS transistor Mp1 always exists, which does not conform to the design of low power consumption, and meanwhile, the charging process time is different due to the influence of the process, which makes the individual difference of the products larger.
Disclosure of Invention
The invention mainly aims to provide a quick starting circuit which aims at improving the current starting speed and reducing the influence caused by a process.
In order to achieve the above object, the present invention provides a fast start circuit, which includes a level conversion module, an inverter module connected to the level conversion module, a first field effect transistor, a second field effect transistor, and a resistor; the level conversion module amplifies an input signal and outputs the amplified signal to the inverter module, and the inverter module reversely transmits the signal to the first field effect transistor so as to turn on or off the first field effect transistor; the second field effect transistor is connected to the power supply voltage; one end of the resistor is connected with the second field effect transistor and the starting voltage output end of the quick starting circuit, and the other end of the resistor is grounded; the starting voltage output end outputs starting voltage to the subsequent circuit to start the subsequent circuit, and the starting voltage output end is also connected to the input end of the level conversion module to output the starting voltage to the level conversion module.
Preferably, the fast starting circuit further comprises a third field effect transistor and a fourth field effect transistor which are connected with each other; the third field effect transistor is also connected with the second field effect transistor so that the second field effect transistor mirrors the current of the second field effect transistor to the third field effect transistor; the third field effect transistor and the fourth field effect transistor are respectively connected with a first reference current output end and a second reference current output end and are used for respectively outputting stable first reference current and second reference current.
Preferably, the first field effect transistor is an NMOS transistor, and the second field effect transistor, the third field effect transistor, and the fourth field effect transistor are PMOS transistors.
Preferably, the source electrode of the first field effect transistor is grounded, the drain electrode of the first field effect transistor is connected with the grid electrode of the second field effect transistor, and the grid electrode of the first field effect transistor is connected with the output end of the inverter module; the output end of the level conversion module is connected with the input end of the inverter module; the source electrode of the second field effect transistor is connected with the power supply voltage, the drain electrode of the second field effect transistor is connected with one end of the resistor and the starting voltage output end, and the other end of the resistor is grounded.
Preferably, sources of the third field effect transistor and the fourth field effect transistor are connected to a power supply voltage, and gates of the third field effect transistor and the fourth field effect transistor are connected to each other and to the gate of the second field effect transistor; the drain electrode of the third field effect transistor is connected with the grid electrode of the third field effect transistor and the first reference current output end; and the drain electrode of the fourth field effect transistor is connected with the second reference current output end.
Preferably, a detection module is further connected between the starting voltage output end and the level conversion module, and the detection module outputs a detection result to the input end of the level conversion module according to the starting voltage.
Preferably, the level conversion module comprises a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor and a twelfth field effect transistor; the sources of the fifth field effect transistor and the sixth field effect transistor are connected to a power supply voltage, the drain electrode of the fifth field effect transistor is connected to the source electrode of the seventh field effect transistor, and the drain electrode of the sixth field effect transistor is connected to the source electrode of the eighth field effect transistor; the grid electrode of the seventh field effect transistor is connected with the grid electrode of the ninth field effect transistor and is connected with the first input end of the level conversion module, the drain electrode of the seventh field effect transistor is connected with the drain electrode of the ninth field effect transistor, the drain electrode of the ninth field effect transistor is also connected with the grid electrode of the sixth field effect transistor, and the source electrode of the ninth field effect transistor is grounded; the gates of the eighth field effect transistor and the tenth field effect transistor are connected with each other and the second input end of the level conversion module, the drain electrode of the eighth field effect transistor is connected with the drain electrode of the tenth field effect transistor, the drain electrode of the tenth field effect transistor is also connected with the gate of the fifth field effect transistor, and the source electrode of the tenth field effect transistor is grounded; the grids of the eleventh field effect transistor and the twelfth field effect transistor are connected with each other and are connected with the drains of the eighth field effect transistor and the tenth field effect transistor; the source electrode of the eleventh field effect transistor is connected with the power supply voltage, the drain electrode of the eleventh field effect transistor is connected with the drain electrode of the twelfth field effect transistor, and the source electrode of the twelfth field effect transistor is grounded; and the drains of the eleventh field effect transistor and the twelfth field effect transistor are connected with the output end of the level conversion module.
Preferably, the first input end of the level conversion module is input with 0, and the second input end of the level conversion module is connected with the detection module.
Preferably, the level conversion module further comprises a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, a twelfth field effect transistor, a thirteenth field effect transistor, a fourteenth field effect transistor, a fifteenth field effect transistor and a sixteenth field effect transistor; the sources of the fifth field effect transistor and the sixth field effect transistor are connected to a power supply voltage, the drain electrode of the fifth field effect transistor is connected to the source electrode of the seventh field effect transistor, and the drain electrode of the sixth field effect transistor is connected to the source electrode of the eighth field effect transistor; the grid electrode of the seventh field effect transistor is connected with the grid electrode of the ninth field effect transistor, and is connected with the drain electrodes of the thirteenth field effect transistor and the fourteenth field effect transistor and the grid electrodes of the fifteenth field effect transistor and the sixteenth field effect transistor; the drain electrode of the seventh field effect transistor is connected with the drain electrode of the ninth field effect transistor, the drain electrode of the ninth field effect transistor is also connected with the grid electrode of the sixth field effect transistor, and the source electrode of the ninth field effect transistor is grounded; the gates of the eighth field effect transistor and the tenth field effect transistor are connected with each other and are connected with the drains of the fifteenth field effect transistor and the sixteenth field effect transistor; the drain electrode of the eighth field effect transistor is connected with the drain electrode of the tenth field effect transistor, the drain electrode of the tenth field effect transistor is also connected with the grid electrode of the fifth field effect transistor, and the source electrode of the tenth field effect transistor is grounded; the grids of the eleventh field effect transistor and the twelfth field effect transistor are connected with each other and are connected with the drains of the eighth field effect transistor and the tenth field effect transistor; the source electrode of the eleventh field effect transistor is connected with the power supply voltage, the drain electrode of the eleventh field effect transistor is connected with the drain electrode of the twelfth field effect transistor, and the source electrode of the twelfth field effect transistor is grounded; the drains of the eleventh field effect transistor and the twelfth field effect transistor are connected to the output end of the level conversion module; the source electrode and the grid electrode of the thirteenth field effect transistor are connected to the starting voltage output end, and the grid electrode of the thirteenth field effect transistor is also connected to the grid electrode of the fourteenth field effect transistor; the source electrode of the fourteenth field effect transistor is grounded; the source electrode of the fifteenth field effect transistor is connected to the starting voltage output end, and the source electrode of the sixteenth field effect transistor is grounded.
Preferably, the thirteenth field effect transistor, the fourteenth field effect transistor, the fifteenth field effect transistor and the sixteenth field effect transistor are low voltage transistors.
According to the technical scheme, the level conversion module is connected with the inverter module, and in the starting process, the outputs of the level conversion module and the inverter module are only in logic relations of 0 and 1, so that the influence caused by a process can be effectively reduced; the starting voltage of the starting voltage output end is output to the level conversion module, so that the starting circuit can further determine that the output starting voltage reaches an expected output value, and the circuit is more reliable and is turned off more timely.
Drawings
FIG. 1 is a schematic diagram of a prior art start-up circuit;
FIG. 2 is a schematic diagram of a fast start circuit according to the present invention;
FIG. 3 is a schematic diagram of a level shifting block in the fast start circuit of the present invention;
fig. 4 is a schematic diagram of another embodiment of a level shifting module in a fast start circuit according to the present invention.
The achievement of the objects, functional features and advantages of the present invention will be further described with reference to the accompanying drawings, in conjunction with the embodiments.
Detailed Description
It should be understood that the specific embodiments described herein are for purposes of illustration only and are not intended to limit the scope of the invention.
The invention is further described below with reference to the accompanying drawings.
As shown in fig. 2, the quick start circuit includes a level conversion module, an inverter module INV connected to the level conversion module, a first fet M1, a second fet M2, and a resistor R; the level conversion module amplifies an input signal and outputs the amplified signal to the inverter module INV, and the inverter module INV reversely and then sends the signal to the first field effect transistor M1 to turn on or off the first field effect transistor M1; the second field effect transistor M2 is connected to the power supply voltage VDD; one end of the resistor R is connected to the second field effect transistor M2 and is connected to the starting voltage output end V of the quick starting circuit, and the other end of the resistor R is grounded to VSS; the starting voltage output end V outputs a starting voltage Vref to a subsequent circuit to start the subsequent circuit, and the starting voltage output end V is also connected to the input end of the level conversion module to output the starting voltage Vref to the level conversion module.
The function of the level shifting block is to shift a low level to a high level voltage output. In a specific embodiment, the threshold value of the input voltage (i.e., the low level voltage) of the level conversion module may be set to the value of the starting voltage required by the quick start circuit of the present invention, that is, when the starting voltage Vref reaches the preset voltage value, the level conversion module may implement the level conversion function.
Before power-on, the quick start circuit is in a zero state, and no voltage drop exists in the circuit. When the power is on, the starting voltage Vref is 0, the output of the level conversion module is 0, and 1 (namely high level) is output after passing through the inverter module INV, namely the grid electrode of the first field effect tube M1 is high level, and the first field effect tube M1 is conducted, so that the grid electrode potential of the second field effect tube M2 is 0, and the conduction is carried out and large current is generated; when the starting voltage Vref reaches or exceeds a preset output value, the output of the level conversion module is 1, the grid electrode of the first field effect transistor M1 is 0 after passing through the inverter, the second field effect transistor M2 is closed, and the circuit starts to work normally.
Preferably, the fast start circuit further comprises a third fet M3 and a fourth fet M4 connected to each other; the third fet M3 is further connected to the second fet M2, so that the second fet M2 mirrors its current to the third fet M3; the third fet M3 and the fourth fet M4 are respectively connected to a first reference current output end and a second reference current output end, and are configured to output a stable first reference current I1 and a stable second reference current I2, respectively.
After power-up, the third field effect transistor M3 and the fourth field effect transistor M4 stabilize the current of the second field effect transistor M2. When the starting voltage Vref reaches or exceeds a preset output value, the second fet M2 mirrors the current of the third fet M3, and the current of the second fet M2 is a temperature independent current, so the starting voltage Vref is a temperature independent voltage.
Preferably, the first fet M1 is an NMOS transistor, and the second fet M2, the third fet M3, and the fourth fet M4 are PMOS transistors.
Preferably, the source electrode of the first field effect transistor M1 is grounded VSS, the drain electrode is connected to the gate electrode of the second field effect transistor M2, and the gate electrode is connected to the output end of the inverter module INV; the output end of the level conversion module is connected with the input end of the inverter module INV; the source electrode of the second field effect transistor M2 is connected to the power supply voltage VDD, the drain electrode is connected to one end of the resistor R and the starting voltage output end V, and the other end of the resistor R is grounded to VSS.
Preferably, the sources of the third fet M3 and the fourth fet M4 are connected to the power supply voltage VDD, and the gates are connected to each other and to the gate of the second fet M2; the drain electrode of the third field effect transistor M3 is connected with the grid electrode and the first reference current output end; the drain electrode of the fourth field effect transistor M4 is connected to the second reference current output end.
Preferably, a detection module is further connected between the starting voltage output end V and the level conversion module, and the detection module outputs a detection result to the input end of the level conversion module according to the starting voltage. When the start voltage Vref is output as 0 (i.e. the circuit is not started), the detection module outputs as 0, and the level conversion module outputs as 0. When the detection module detects that the starting voltage output end V has stable output, the output of the detection module is 1, and the output of the level conversion module is 1. The detection result is output through the detection module, so that the level conversion module can more accurately convert and amplify the input signal, and the stability of the circuit is improved.
Preferably, as shown in fig. 3, the level conversion module includes a fifth fet M5, a sixth fet M6, a seventh fet M7, an eighth fet M8, a ninth fet M9, a tenth fet M10, an eleventh fet M11, and a twelfth fet M12; the sources of the fifth field effect transistor M5 and the sixth field effect transistor M6 are connected to the power supply voltage VDD, the drain electrode of the fifth field effect transistor M5 is connected to the source electrode of the seventh field effect transistor M7, and the drain electrode of the sixth field effect transistor M6 is connected to the source electrode of the eighth field effect transistor M8; the grid electrode of the seventh field effect transistor M7 is connected with the grid electrode of the ninth field effect transistor M9, and is connected with the first input end N1 of the level conversion module, the drain electrode of the seventh field effect transistor M7 is connected with the drain electrode of the ninth field effect transistor M9, the drain electrode of the ninth field effect transistor M9 is also connected with the grid electrode of the sixth field effect transistor M6, and the source electrode of the ninth field effect transistor M9 is grounded to VSS; the gates of the eighth fet M8 and the tenth fet M10 are connected to each other and to the second input terminal N2 of the level conversion module, the drain of the eighth fet M8 is connected to the drain of the tenth fet M10, the drain of the tenth fet M10 is further connected to the gate of the fifth fet M5, and the source of the tenth fet M10 is grounded VSS; the gates of the eleventh fet M11 and the twelfth fet M12 are connected to each other and to the drains of the eighth fet M8 and the tenth fet M10; the source electrode of the eleventh field effect transistor M11 is connected to the power voltage VDD, the drain electrode of the eleventh field effect transistor M11 is connected to the drain electrode of the twelfth field effect transistor M12, and the source electrode of the twelfth field effect transistor M12 is grounded to VSS; the drains of the eleventh fet M11 and the twelfth fet M12 are connected to the output terminal Y of the level conversion module.
Preferably, the first input terminal N1 of the level shift module is input with 0, and the second input terminal N2 of the level shift module is connected to the detection module.
In another embodiment, as shown in fig. 3 and 4, the level conversion module further includes a fifth fet M5, a sixth fet M6, a seventh fet M7, an eighth fet M8, a ninth fet M9, a tenth fet M10, an eleventh fet M11, a twelfth fet M12, a thirteenth fet M13, a fourteenth fet M14, a fifteenth fet M15, and a sixteenth fet M16; the sources of the fifth field effect transistor M5 and the sixth field effect transistor M6 are connected to the power supply voltage VDD, the drain electrode of the fifth field effect transistor M5 is connected to the source electrode of the seventh field effect transistor M7, and the drain electrode of the sixth field effect transistor M6 is connected to the source electrode of the eighth field effect transistor M8; the gates of the seventh fet M7 and the ninth fet M9 are connected to each other, and to the drains of the thirteenth fet M13 and the fourteenth fet M14, and to the gates of the fifteenth fet M15 and the sixteenth fet M16; the drain electrode of the seventh field effect transistor M7 is connected to the drain electrode of the ninth field effect transistor M9, the drain electrode of the ninth field effect transistor M9 is also connected to the gate electrode of the sixth field effect transistor M6, and the source electrode of the ninth field effect transistor M9 is grounded to VSS; the gates of the eighth fet M8 and the tenth fet M10 are connected to each other and to the drains of the fifteenth fet M15 and the sixteenth fet M16; the drain electrode of the eighth field effect transistor M8 is connected to the drain electrode of the tenth field effect transistor M10, the drain electrode of the tenth field effect transistor M10 is further connected to the gate electrode of the fifth field effect transistor M5, and the source electrode of the tenth field effect transistor M10 is grounded to VSS; the gates of the eleventh fet M11 and the twelfth fet M12 are connected to each other and to the drains of the eighth fet M8 and the tenth fet M10; the source electrode of the eleventh field effect transistor M11 is connected to the power voltage VDD, the drain electrode of the eleventh field effect transistor M11 is connected to the drain electrode of the twelfth field effect transistor M12, and the source electrode of the twelfth field effect transistor M12 is grounded to VSS; the drains of the eleventh field effect transistor M11 and the twelfth field effect transistor M12 are connected to the output end Y of the level conversion module; the source electrode and the grid electrode of the thirteenth field effect transistor M13 are connected to the starting voltage output end V, and the grid electrode of the thirteenth field effect transistor M13 is also connected to the grid electrode of the fourteenth field effect transistor M14; the source electrode of the fourteenth field effect transistor M14 is grounded to VSS; the source of the fifteenth fet M15 is connected to the start voltage output terminal V, and the source of the sixteenth fet M16 is grounded VSS.
Specifically, when the start voltage Vref gradually increases, the tenth fet M10 is turned on, and the level conversion module outputs 1.
Preferably, the thirteenth fet M13, the fourteenth fet M14, the fifteenth fet M15, and the sixteenth fet M16 are low-voltage transistors.
The specific working principle of the invention is as follows:
before power-on, the quick start circuit is in a zero state, and no voltage drop exists in the circuit.
When the power-on is performed, the starting voltage Vref is 0, the output of the level conversion module is 0, the output of the inverter module INV is 1, the grid electrode of the first field effect tube M1 is in a high level, the first field effect tube M1 is conducted, so that the grid electrode potential of the second field effect tube M2, the third field effect tube M3 and the fourth field effect tube M4 is 0, the conduction is performed, and a large current is generated, and at the moment, the current on the resistor R is calculated by the following equation:
the method comprises the steps of carrying out a first treatment on the surface of the Wherein VDD is the power voltage, vsd is the drain-source voltage of the second fet M2.
When the starting voltage Vref rises and reaches or exceeds a preset output value, the level conversion module outputs a high level, the grid electrode of the first field effect tube M1 is 0 after passing through the inverter module INV, the first field effect tube M1 is closed, the second field effect tube M2 passes through the first reference current I1 of the mirror image third field effect tube M3, and the circuit starts to work normally.
According to the technical scheme, the level conversion module is connected with the inverter module, and in the starting process, the output of the level conversion module and the output of the inverter module INV only have logic relations of 0 and 1, so that the influence caused by a process can be effectively reduced; the starting voltage Vref of the starting voltage output end V is output to the level conversion module, so that the starting circuit can further determine that the output starting voltage Vref reaches an expected output value, and the circuit is more reliable and is turned off more timely.
It should be understood that the foregoing is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention, and all equivalent structures or equivalent processes using the descriptions of the present invention and the accompanying drawings, or direct or indirect application in other relevant technical fields, are included in the scope of the present invention.
Claims (9)
1. A quick start circuit is characterized in that the quick start circuit comprises a level conversion module, an inverter module connected with the level conversion module, a first field effect transistor, a second field effect transistor and a resistor,
the level conversion module amplifies an input signal and outputs the amplified signal to the inverter module, and the inverter module reversely transmits the signal to the first field effect transistor so as to turn on or off the first field effect transistor; the second field effect transistor is connected to the power supply voltage; one end of the resistor is connected with the second field effect transistor and the starting voltage output end of the quick starting circuit, and the other end of the resistor is grounded; the starting voltage output end outputs starting voltage to the subsequent circuit to start the subsequent circuit, and is also connected to the input end of the level conversion module to output the starting voltage to the level conversion module;
the rapid starting circuit further comprises a third field effect transistor and a fourth field effect transistor which are connected with each other; the third field effect transistor is also connected with the second field effect transistor so that the second field effect transistor mirrors the current of the second field effect transistor to the third field effect transistor; the third field effect transistor and the fourth field effect transistor are respectively connected with a first reference current output end and a second reference current output end and are used for respectively outputting stable first reference current and second reference current.
2. The fast start-up circuit of claim 1, wherein the first field effect transistor is an NMOS transistor, and the second, third, and fourth field effect transistors are PMOS transistors.
3. The rapid start circuit of claim 2, wherein the source of the first fet is grounded, the drain is connected to the gate of the second fet, and the gate is connected to the output of the inverter module; the output end of the level conversion module is connected with the input end of the inverter module;
the source electrode of the second field effect transistor is connected with the power supply voltage, the drain electrode of the second field effect transistor is connected with one end of the resistor and the starting voltage output end, and the other end of the resistor is grounded.
4. The rapid start circuit of claim 3, wherein sources of the third and fourth field effect transistors are connected to a power supply voltage, gates are connected to each other and to the gate of the second field effect transistor; the drain electrode of the third field effect transistor is connected with the grid electrode of the third field effect transistor and the first reference current output end; and the drain electrode of the fourth field effect transistor is connected with the second reference current output end.
5. The quick start circuit according to claim 1, wherein a detection module is further connected between the start voltage output terminal and the level conversion module, and the detection module outputs a detection result to an input terminal of the level conversion module according to the start voltage.
6. The rapid start circuit of claim 5, wherein the level shift module comprises a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, and a twelfth field effect transistor;
the sources of the fifth field effect transistor and the sixth field effect transistor are connected to a power supply voltage, the drain electrode of the fifth field effect transistor is connected to the source electrode of the seventh field effect transistor, and the drain electrode of the sixth field effect transistor is connected to the source electrode of the eighth field effect transistor;
the grid electrode of the seventh field effect transistor is connected with the grid electrode of the ninth field effect transistor and is connected with the first input end of the level conversion module, the drain electrode of the seventh field effect transistor is connected with the drain electrode of the ninth field effect transistor, the drain electrode of the ninth field effect transistor is also connected with the grid electrode of the sixth field effect transistor, and the source electrode of the ninth field effect transistor is grounded;
the gates of the eighth field effect transistor and the tenth field effect transistor are connected with each other and the second input end of the level conversion module, the drain electrode of the eighth field effect transistor is connected with the drain electrode of the tenth field effect transistor, the drain electrode of the tenth field effect transistor is also connected with the gate of the fifth field effect transistor, and the source electrode of the tenth field effect transistor is grounded;
the grids of the eleventh field effect transistor and the twelfth field effect transistor are connected with each other and are connected with the drains of the eighth field effect transistor and the tenth field effect transistor; the source electrode of the eleventh field effect transistor is connected with the power supply voltage, the drain electrode of the eleventh field effect transistor is connected with the drain electrode of the twelfth field effect transistor, and the source electrode of the twelfth field effect transistor is grounded;
and the drains of the eleventh field effect transistor and the twelfth field effect transistor are connected with the output end of the level conversion module.
7. The fast start-up circuit of claim 6, wherein the first input of the level shifter module is input as 0 and the second input of the level shifter module is connected to the detection module.
8. The fast start-up circuit of claim 1, wherein the level shift module further comprises a fifth field effect transistor, a sixth field effect transistor, a seventh field effect transistor, an eighth field effect transistor, a ninth field effect transistor, a tenth field effect transistor, an eleventh field effect transistor, a twelfth field effect transistor, a thirteenth field effect transistor, a fourteenth field effect transistor, a fifteenth field effect transistor, and a sixteenth field effect transistor;
the sources of the fifth field effect transistor and the sixth field effect transistor are connected to a power supply voltage, the drain electrode of the fifth field effect transistor is connected to the source electrode of the seventh field effect transistor, and the drain electrode of the sixth field effect transistor is connected to the source electrode of the eighth field effect transistor;
the grid electrode of the seventh field effect transistor is connected with the grid electrode of the ninth field effect transistor, and is connected with the drain electrodes of the thirteenth field effect transistor and the fourteenth field effect transistor and the grid electrodes of the fifteenth field effect transistor and the sixteenth field effect transistor; the drain electrode of the seventh field effect transistor is connected with the drain electrode of the ninth field effect transistor, the drain electrode of the ninth field effect transistor is also connected with the grid electrode of the sixth field effect transistor, and the source electrode of the ninth field effect transistor is grounded;
the gates of the eighth field effect transistor and the tenth field effect transistor are connected with each other and are connected with the drains of the fifteenth field effect transistor and the sixteenth field effect transistor; the drain electrode of the eighth field effect transistor is connected with the drain electrode of the tenth field effect transistor, the drain electrode of the tenth field effect transistor is also connected with the grid electrode of the fifth field effect transistor, and the source electrode of the tenth field effect transistor is grounded;
the grids of the eleventh field effect transistor and the twelfth field effect transistor are connected with each other and are connected with the drains of the eighth field effect transistor and the tenth field effect transistor; the source electrode of the eleventh field effect transistor is connected with the power supply voltage, the drain electrode of the eleventh field effect transistor is connected with the drain electrode of the twelfth field effect transistor, and the source electrode of the twelfth field effect transistor is grounded; the drains of the eleventh field effect transistor and the twelfth field effect transistor are connected to the output end of the level conversion module;
the source electrode and the grid electrode of the thirteenth field effect transistor are connected to the starting voltage output end, and the grid electrode of the thirteenth field effect transistor is also connected to the grid electrode of the fourteenth field effect transistor; the source electrode of the fourteenth field effect transistor is grounded; the source electrode of the fifteenth field effect transistor is connected to the starting voltage output end, and the source electrode of the sixteenth field effect transistor is grounded.
9. The rapid start circuit of claim 8, wherein the thirteenth fet, the fourteenth fet, the fifteenth fet, and the sixteenth fet are low voltage transistors.
Priority Applications (1)
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