CN110534529A - 一种tft阵列基板及其显示面板 - Google Patents

一种tft阵列基板及其显示面板 Download PDF

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CN110534529A
CN110534529A CN201910732658.4A CN201910732658A CN110534529A CN 110534529 A CN110534529 A CN 110534529A CN 201910732658 A CN201910732658 A CN 201910732658A CN 110534529 A CN110534529 A CN 110534529A
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metal layer
layer
tft array
array substrate
tail portion
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刘净
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US16/617,567 priority patent/US20210335824A1/en
Priority to PCT/CN2019/111630 priority patent/WO2021027053A1/zh
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1222Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
    • H01L27/1225Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
    • HELECTRICITY
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    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • HELECTRICITY
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    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725Source or drain electrodes for field effect devices
    • H01L29/41733Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • HELECTRICITY
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    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42372Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out
    • H01L29/42376Gate electrodes for field effect devices for field-effect transistors with insulated gate characterised by the conducting layer, e.g. the length, the sectional shape or the lay-out characterised by the length or the sectional shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312Gate electrodes for field effect devices
    • H01L29/42316Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/786Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/7869Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate

Abstract

本发明提供了一种TFT阵列基板,包括基板层和设置在所述基板层上的金属层。其中所述金属层包括第一金属层和设置在所述第一金属层上的第二金属层,所述第一金属层包括主体部和尾部,其中所述第一金属层的主体部向上对应所述第二金属层,而所述第一金属层的尾部则是所述第一金属层自所述主体部的侧端部延伸出所述第二金属层外的部分。本发明提供了一种TFT阵列基板,其采用新型的金属层形貌特征,从而有效的改善其所在阵列基板在暗态下的漏光情况,进而提高了所在产品的对比度。

Description

一种TFT阵列基板及其显示面板
技术领域
本发明涉及显示技术领域,尤其是,其中涉及的一种TFT阵列基板及其显示面板。
背景技术
已知,随着平面显示技术的不断发展,业界不断推出显示效果更好,同时也更为轻便的平面显示器,例如,液晶显示器,OLED显示器等等。这些平面显示器虽然由于发光原理的不同,在具体结构上有所区别,但其都有一个共同的组成部分即TFT阵列基板。
其中所述TFT阵列基板作为显示器驱动部分的重要组成部分,是实现显示器进行正常显示功能的一个关键组件。而所述TFT阵列基板上都会设置金属层用于构成功能电路的电子元件以及进行数据信号的传递。
进一步的,随着信息技术的进步,平面显示器正在不断的朝着大尺寸化方向发展。随着平面显示尺寸增大的同时,也对其显示图像、影像的显示品质要求提出了更高的要求;还有就是对于平面显示的对比度的要求也是不断增加。
但是,经过调查发现,市面上的许多显示产品均有不同程度上的对比度不达的问题。经理论和实验分析,主要是由于阵列基板上十字交叉处的金属层在暗态下存在漏光现象。
因此,确有必要来开发一种新型的TFT阵列基板,来克服现有技术中的缺陷。
发明内容
本发明的一个方面是提供一种TFT阵列基板,其采用新型的金属层形貌特征,从而有效的改善其所在阵列基板在暗态下的漏光情况,进而提高了所在产品的对比度。
本发明采用的技术方案如下:
一种TFT阵列基板,包括基板层和设置在所述基板层上的金属层。其中所述金属层包括第一金属层和设置在所述第一金属层上的第二金属层,所述第一金属层包括主体部和尾部,其中所述第一金属层的主体部向上对应所述第二金属层,而所述第一金属层的尾部则是所述第一金属层自所述主体部的侧端部延伸出所述第二金属层外的部分。也就是说,所述第二金属层向下覆盖所述第一金属层的所述主体部,但所述第一金属层的所述尾部是不被所述第二金属层所覆盖的,其向上暴露于所述第二金属层外。
进一步的,在不同实施方式中,其中所述第一金属层的尾部包括分别设置在所述主体部两侧端处的第一尾部和第二尾部。具体的,其中所述第一尾部和第二尾部可以是对称设置,但不限于。
进一步的,在不同实施方式中,其中所述第一金属层采用第一材料构成,而所述第二金属层采用第二材料构成。
进一步的,在不同实施方式中,其中所述第一金属层采用的第一材料优选为金属钼(Mo)或是金属钼的合金。例如,金属钼的二元合金或是三元合金,具体可随需要而定,并无限定。
进一步的,在不同实施方式中,其中所述第二金属层采用的第二材料为金属铝或金属铜。
进一步的,在不同实施方式中,其中所述第一金属层的厚度范围在0~1000埃。
进一步的,在不同实施方式中,其中所述第二金属层的厚度范围在0~8000埃。
进一步的,在不同实施方式中,其中所述第一金属层用作阻挡金属层(barrier),而所述第二金属层用作电极金属层。
进一步的,在不同实施方式中,其中所述第二金属层上还设置有第三金属层。其中所述第一金属层和所述第三金属层可以是用作为阻挡金属层,并将作为电极金属层的所述第二金属层夹持于两者之间;其中所述第一金属层包括所述主体部和尾部。
其中优选的,所述金属层为源漏极层,其中位于所述电极金属层下的第一金属层包括延伸出所述第二金属层外的尾部,而位于所述第二金属层上的第三金属层不设置延伸出所述源漏极层的尾部。
进一步的,在不同实施方式中,其中所述金属层可以用作为栅极层(GateElectrode)、栅极走线(Gate Line)、栅极衬垫(Gate Pad)、数据走线(Data Line)、数据衬垫(Data Pad)、源极金属层或是漏极金属层,具体可随需要而定,并无限定。进一步的,以上涉及的所述金属层并不限于双层金属层叠层结构,其也可以是选用三层金属层的叠层结构,具体可随需要而定,并无限定。
进一步的,在不同实施方式中,其中所述第一金属层的尾部的长度在0~0.25微米。
进一步的,在不同实施方式中,其中所述金属层为栅极层,其中所述第一金属层的尾部的长度L1在0.05~0.25微米。
进一步的,在不同实施方式中,其中所述金属层为栅极层,其构型侧部倾角θ1的角度范围在25~50度范围内。
进一步的,在不同实施方式中,其中所述金属层为源漏极层,其中所述第一金属层的尾部的长度L2在0~0.10微米。
进一步的,在不同实施方式中,其中所述金属层为源漏极层,其构型侧部倾角θ2的角度范围在50~90度范围内。
进一步的,在不同实施方式中,其中所述金属层上设置有绝缘层,所述绝缘层上设置有有源层(Active),其中所述有源层优选为铟镓锌氧化物(IGZO)层。
进一步的,在不同实施方式中,其中所述金属层上设置有绝缘层,所述绝缘层上设置有有源层(Active),其中所述有源层优选为非晶硅层。
进一步的,在不同实施方式中,其中所述绝缘层可根据需要选择单层结构或是多层叠层结构,例如,双层叠层结构,或是三层叠层结构,具体可随需要而定,并无限定。
进一步的,本发明的又一方面是提供一种显示面板,其采用的TFT阵列基板为本发明涉及的所述TFT阵列基板。
相对于现有技术,本发明的有益效果是:本发明涉及的一种TFT阵列基板,其中设置的金属层通过选用特定长度的阻挡金属层的尾部长度,以及电极金属层构型侧部倾角的角度范围,使其整体构型具有特定的外形形貌,从而有效的改善了其所在TFT阵列基板在暗态下的漏光情况,进而提高了产品对比度。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明的一个实施方式中提供的一种TFT阵列基板的结构示意图;
图2为本发明的又一个实施方式中提供的一种TFT阵列基板的结构示意图;
图3为本发明的又一个实施方式中提供的一种TFT阵列基板的结构示意图;
图4为本发明的又一个实施方式中提供的一种TFT阵列基板的结构示意图;以及
图5为本发明的又一个实施方式中提供的一种TFT阵列基板的结构示意图。
具体实施方式
以下将结合附图和实施例,对本发明涉及的一种TFT阵列基板及其显示面板的技术方案作进一步的详细描述。
请参阅图1所示,本发明的一个实施方式提供了一种TFT阵列基板,其包括玻璃基板层10,其上设置有金属层11,其中所述金属层11上设置有绝缘层13。
其中所述金属层11包括叠置的阻挡金属层(Barrier)110和电极金属层112,其中所述阻挡金属层110除了位于所述电极金属层下的主体部111外,还包括自所述主体部111的两侧端部分别向外延伸出所述电极金属层112外的尾部113,具体的,其中所述阻挡金属层110尾部113的长度L1在0.05~0.25微米。
其中所述电极金属层112为具有侧部倾角的梯形构型,具体的,其中所述倾角θ1的优选角度范围在25~50度。所述阻挡金属层110的构型可以是对应于所述电极金属层112的梯形构型,但也可以是一个矩形构型,具体可随需要而定,并无限定。
进一步的,其中所述金属层11具体可以用作栅极层(Gate Electrode)、栅极走线(Gate Line)、栅极衬垫(Gate Pad)等等,可随需要而定,并无限定。其中所述电极金属层112,其采用的构成材料为金属铝或金属铜;而所述阻挡金属层110采用的构成材料优选为金属钼(Mo)或是金属钼的合金。例如,金属钼的二元合金或是三元合金,具体可随需要而定,并无限定。
请参阅图2所示,本发明的又一个实施方式提供了一种TFT阵列基板,其包括玻璃基板层10,其上设置有金属层12,其中所述金属层12上设置有绝缘层13。
其中所述金属层12也是包括叠置的阻挡金属层(Barrier)120和电极金属层122,其中所述阻挡金属层120除了位于所述电极金属层122下的主体部121外,还包括自所述主体部121的两端部分别向外延伸出所述电极金属层122外的尾部123,具体的,其中所述阻挡金属层120尾部123的长度L2在0~0.10微米。
其中所述电极金属层122为具有侧部倾角的梯形构型,具体的,其中所述倾角θ2的优选角度范围在50~90度。所述阻挡金属层120的构型可以是对应于所述第二电极金属层122的梯形构型,但也可以是一个矩形构型,具体可随需要而定,并无限定。
进一步的,其中所述电极金属层122可以用作为源漏极层(SD)、数据走线(DataLine)以及数据衬垫(Data Pad)等等,其采用的构成材料为金属铝或金属铜;而所述阻挡金属层120采用的构成材料优选为金属钼(Mo)或是金属钼的合金。例如,金属钼的二元合金或是三元合金,具体可随需要而定,并无限定。
进一步的,请参阅图3所示,其图示了本发明又一实施方式提供的一种TFT阵列基板结构。其中所述TFT阵列基板包括玻璃基板层20,其上设置有栅极层21、绝缘层23、有源层24以及源漏极层22。
具体来讲,其中所述栅极层21设置在所述玻璃基板层20上,所述绝缘层23设置在所述栅极层21上,所述有源层(Active)设置在所述绝缘层23上,而所述源漏极层22包括两个,分别设置在所述有源层24的两端上,并通过所述有源层24电性连接。其中所述有源层24为铟镓锌氧化物(IGZO)层,但不限于。
进一步的,其中所述栅极层21包括叠置的阻挡金属层(Barrier)210和电极金属层212,其中所述阻挡金属层210除了位于所述电极金属层212下的主体部211外,还包括自所述主体部211的两端部分别向外延伸出所述电极金属层212外的尾部213,其中所述阻挡金属层210尾部213的长度L1在0.05~0.25微米。
其中所述栅极层21为具有侧部倾角的梯形构型,具体的,其中所述倾角θ1的优选角度范围在25~50度。所述阻挡金属层210的构型可以是对应于所述电极金属层212的梯形构型,但也可以是一个矩形构型,具体可随需要而定,并无限定。
进一步的,其中所述电极金属层212采用的构成材料为金属铝或金属铜;而所述阻挡金属层210采用的构成材料优选为金属钼(Mo)或是金属钼的合金。例如,金属钼的二元合金或是三元合金,具体可随需要而定,并无限定。
其中所述源漏极层22也是包括叠置的阻挡金属层(Barrier)和电极金属层222,但与所述栅极层21不同之处在于,所述阻挡金属层包括上、下间隔设置的第一阻挡金属层220和第二阻挡金属层224,两者将所述电极金属层222夹在中间,构成一个“三明治”型构型。
进一步的,其中所述电极金属层222采用的构成材料为金属铝或金属铜;而所述阻挡金属层采用的构成材料优选为金属钼(Mo)或是金属钼的合金。例如,金属钼的二元合金或是三元合金,具体可随需要而定,并无限定。
其中如图中所示,所述源漏极层22根据需要采用了台阶型构型,而所述台阶型构型的水平部为具有侧部倾角的梯形构型,具体的,其中所述倾角θ2的优选角度范围在50~90度。
其中所述阻挡金属层的构型可以是对应于所述电极金属层222的构型,且位于下方的所述第一阻挡金属层220除了位于所述第二电极金属层下的主体部221外,还包括自所述主体部221的侧端部向外延伸出所述第二电极金属层222外的尾部223,其中所述尾部223的长度L2在0~0.10微米。而位于上方的所述第二阻挡金属层224优选不设置延伸出所述电极金属层222外的尾部,但不限于。
进一步的,请参阅图4所示,其图示了本发明又一实施方式提供的一种TFT阵列基板结构,其结构与图3所示的TFT阵列基板大致相同,为避免不必要的赘述,以下只对两者不同之处进行说明。
不同之处之一在于所述有源层24的结构,如图4中所示,其中所述有源层24采用非晶硅材质构成,进而使得其优选为双层结构,一层240为非晶硅材质构成,一层242为掺杂非晶硅材质构成。具体的,如图4中所示,所述有源层24的两层结构的构型为矩形构型。
不同之处之二在于所述源漏极层22的结构,不同于图3中所示的所述源漏极层22的三层结构,如图4中所示,其中所述源漏极层22则是采用双层结构构成,包括阻挡金属层220和电极金属层224。
进一步的,请参阅图5所示,其图示了本发明又一实施方式提供的一种TFT阵列基板结构,其结构与图4所示的TFT阵列基板大致相同,为避免不必要的赘述,以下只对两者不同之处进行说明。
图5与图4所示阵列基板的结构不同之处在于所述有源层选择的具体形状,其中虽然所述有源层也是采用了非晶硅材质构成,但在层级采用的具体结构方案上两者有所区别。具体为,图5所示的有源层25结构中的非晶硅材质层250成一个拱形构型,其上设置的掺杂非晶硅材质层252则为“台阶”构型。不同于图4所示的有源层24的“矩形”构型。
进一步的,本发明的又一方面是提供一种显示面板,其采用的TFT阵列基板为本发明涉及的所述TFT阵列基板。
本发明涉及的一种TFT阵列基板,其中设置的金属层通过选用特定长度的阻挡金属层的尾部长度,以及电极金属层构型侧部的倾角角度范围,使其整体构型具有特定的外形形貌,从而有效的改善了其所在TFT阵列基板在暗态下的漏光情况,提高了产品对比度。
本发明的技术范围不仅仅局限于上述说明中的内容,本领域技术人员可以在不脱离本发明技术思想的前提下,对上述实施例进行多种变形和修改,而这些变形和修改均应当属于本发明的范围内。

Claims (10)

1.一种TFT阵列基板,包括基板层和设置在所述基板层上的金属层;其特征在于,其中所述金属层包括第一金属层和设置在所述第一金属层上的第二金属层;其中所述第一金属层包括主体部和尾部,其中所述第一金属层的主体部向上对应所述第二金属层,而所述第一金属层的尾部则是所述第一金属层自所述主体部的侧端部延伸出所述第二金属层外的部分。
2.根据权利要求1所述的TFT阵列基板;其特征在于,其中所述第一金属层用作阻挡金属层,而所述第二金属层用作电极金属层。
3.根据权利要求2所述的TFT阵列基板;其特征在于,其中所述第二金属层上还设置有第三金属层,其中所述第三金属层用作阻挡金属层。
4.根据权利要求1所述的TFT阵列基板;其特征在于,其中所述第一金属层尾部的长度在0~0.25微米范围内。
5.根据权利要求1所述的TFT阵列基板;其特征在于,其中所述金属层为栅极层,其中所述第一金属层尾部的长度L1在0.05~0.25微米范围内。
6.根据权利要求1所述的TFT阵列基板;其特征在于,其中所述金属层为栅极层,其构型侧部倾角θ1的角度范围在25~50度范围内。
7.根据权利要求1所述的TFT阵列基板;其特征在于,其中所述金属层为源漏极层,其中所述第一金属层尾部的长度L2在0~0.10微米范围内。
8.根据权利要求1所述的TFT阵列基板;其特征在于,其中所述金属层为源漏极层,其构型侧部倾角θ2的角度范围在50~90度范围内。
9.根据权利要求1所述的TFT阵列基板;其特征在于,其中所述第一金属层的厚度在0~1000埃范围内;其中所述第二金属层的厚度在0~8000埃范围内。
10.一种显示面板;其特征在于,其包括根据权利要求1所述的TFT阵列基板。
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