CN110362058A - The system tested for multiple interfaces - Google Patents
The system tested for multiple interfaces Download PDFInfo
- Publication number
- CN110362058A CN110362058A CN201810319284.9A CN201810319284A CN110362058A CN 110362058 A CN110362058 A CN 110362058A CN 201810319284 A CN201810319284 A CN 201810319284A CN 110362058 A CN110362058 A CN 110362058A
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- China
- Prior art keywords
- module
- pci
- card
- interface
- fpga
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
Abstract
The invention discloses the systems that the present invention is tested for multiple interfaces, the system tested for multiple interfaces, including being provided with power module, pci expansion slot, PCI function card and mainboard module on rear panel module, rear panel module and PC machine are carried out data transmission by NGA/DVI, it is provided with several PCI-e in pci expansion slot and carries card, PCI-e load card is internally provided with FMC expansion interface and connect with external module.The external module includes LVDS high-speed interface submodule, digital audio interface submodule, optical fiber interface submodule, expansion module, the high-speed interface submodule, optical fiber interface submodule are carried out data transmission by PCIE high-speed bus, and digital audio interface submodule receives PCI-e and carries the data progress audio output that card is sent.It further includes memory modules, flash memory module that the PCI-e, which carries card, FPGA module, the memory modules and flash memory module are connect with FPGA module, FPGA module is carried out data transmission by LVDS high speed port, serdes high speed port, I/O high speed port and FMC expansion interface, and FPGA module also sends data to mainboard module.
Description
Technical field
The present invention relates to a kind of test macros, and in particular to the system tested for multiple interfaces.
Background technique
The interface used in many test macros now can only all meet single function.And efficiency of transmission is slow, often
It influences each other between normal modules, transmits the low efficiency of data, test slowly, and then influences working efficiency, adopts in industrial personal computer
Its bus for transmitting data of interface mismatches, and mutually swin flu is relatively difficult between data.
The system tested for multiple interfaces that the present invention uses has the function of testing multiple interfaces, meet most
In the case where few interface and quantity, it is desirable that the interface of the equipment is also equipped with certain scalability, in case increasing subsequent function
Energy.By the analysis to demand, which needs interface function to be tested to have type more, the feature more than quantity, while certain
The index request of interface is of little use, in the case where meeting above-mentioned function and interface requirements, it is also necessary to which having certain interface can
Scalability.
Detailed comparisons and demonstration by kinds of schemes propose to use general industrial personal computer, are internally integrated multiple types and connect
Mouthful board, while retain part general-purpose interface for extension scheme.Wherein board uses two kinds of card insert types of PCI-E and PCI
Board solution.
Summary of the invention
The technical problem to be solved by the present invention is to current integrated test systems, and transmission signal is single, interaction between data
Difficulty, and the scalability of many systems is poor, and it is an object of that present invention to provide the system tested for multiple interfaces, solutions
Certainly above-mentioned problem.
The present invention is achieved through the following technical solutions:
For the system that multiple interfaces are tested, including power module, pci expansion slot, PCI are provided on rear panel module
Function card and mainboard module, rear panel module and host computer are carried out data transmission by NGA/DVI, if being provided in pci expansion slot
Dry PCI-e carries card, and PCI-e load card is internally provided with FMC expansion interface and connect with external module.The PCI function card need to be adopted
With single-ended analog inputs more than 8 channels, data conversion is carried out by least 12 A/D converters, acquisition rate need to be greater than
100kHz can just be guaranteed to carry out multiplex roles integration test with the mode.
Further, the external module includes that LVDS high-speed interface submodule, digital audio interface submodule, optical fiber connect
Openning module, expansion module, the high-speed interface submodule, optical fiber interface submodule carry out data biography by PCIE high-speed bus
Defeated, digital audio interface submodule receives PCI-e and carries the data progress audio output that card is sent.
Further, it further includes memory modules, flash memory module that the PCI-e, which carries card, FPGA module, the memory modules and
Flash memory module is connect with FPGA module, and FPGA module is extended by LVDS high speed port, serdes high speed port, I/O high speed port and FMC
Interface carries out data transmission, and FPGA module also sends data to mainboard module.
Further, the pci expansion slot of the rear panel module setting is at least 2.
Further, the PCI function card of the rear panel module setting is at least 2.
The PCI-e that the present invention uses carries card mainly by FPGA as core processor, is connect with host computer using PCIE2.0x8
Mouthful, data transfer bandwidth theoretical value is up to 40Gbps, and FPGA external harmoniousness DDR3 cache, externally uses FMC connection
Device has drawn three kinds of signals from FPGA:
1, LVDS high-speed differential signal, can external common LVDS signal peripheral hardware, multiple groups LVDS signal can group close
Carry out transmitting data in parallel, significantly increases data transfer bandwidth.
2, serdes high-speed differential signal, the signal are the signals drawn from the GTP mouth of FPGA, can be connect customized
Serdes signal peripheral hardware, can do RapidIO bus, connect RapidIO bus peripheral hardware, can also do SGMII high-speed interface and
Other serdes signal peripheral hardwares.
3, IO parallel signal can be used as common IO control signal, can also form parallel signal and carry out data transmission,
It can also be used as such as SPI, the common bus such as I2C, UART connects corresponding peripheral hardware.The I/O port of FPGA is a kind of flexibly to connect very much
Mouthful.
PCI-e carries card since the high speed ports such as LVDS have been drawn in front end, and rear end is again using PCIE high-speed bus, the load card
It is very suitable to high speed data transfer, therefore LVDS, the interfaces such as optical fiber mainly use the load card to integrate.
The present invention uses PICMG framework, is internally integrated the backboard and mainboard of PICMG1.3, chooses the framework mode, mainly
Reason of both having: 1, the functional interface to be realized of this equipment itself is more, and more PCIE or pci interface is needed to come
The board of integrated different function and interface；2, in view of scalability is more flexible, if only considering to design a kind of PCIE or PCI
Card otherwise be limited to interface quantity or be limited to function, such as only design PCI card, then be limited to transmission bandwidth, can not
It will be more than the real-time data transmission of several Gbps, interface quantity is generally insufficient if the card for only designing PCI-e, because of PCI-e
There are an x1, x4, x8, tetra- kinds of interfaces of x16, wherein only PCIE x16 is compatible with 4 kinds of protocol interfaces, but the sexual valence of x16 Universal joint
Relatively high industrial control mainboard is usually no more than two, considerably less, is unfavorable for extending, and the compatible 4 kinds of physics of only PCIE x1 connect
Mouthful, but x1 bandwidth is insufficient, advantageously unlike PCI.
PCI carries card and is mainly used for the integrated lower function subcard of rate, which is mainly also using FPGA as data
The core component exchanged with interface is handled, front end is also to have drawn LVDS signal and I/O signal using FMC, and rear end is integrated with
Pci bridge chip is designed as core architecture.Front terminal module is as shown in Fig. 2, can be integrated on the subcard.
It develops PCI and carries card, the extension insufficient situation of slot position can either be alleviated, while Ben Kanei increases PCI Bridge, the bridge core
Piece has certain processing capacity, the function control of processing and data forwarding and submodule for data, and software development rises
Coming all can be more flexible and conveniently.
Compared with prior art, the present invention having the following advantages and benefits:
1, the system that the present invention is tested for multiple interfaces, transmission signal multiplicity, is able to carry out different signals and passes
It is defeated；
2, the present invention is used for the system that multiple interfaces are tested, and there are many expansion interface, extensions for setting on rear panel module
Performance is strong；
3, the system that the present invention is tested for multiple interfaces, is used uniformly PCIE bus, data exchange facilitates rapid.
Detailed description of the invention
Attached drawing described herein is used to provide to further understand the embodiment of the present invention, constitutes one of the application
Point, do not constitute the restriction to the embodiment of the present invention.In the accompanying drawings:
Fig. 1 is present system block diagram.
Fig. 2 is that PCI-e of the present invention carries card and interface sub-module functional block diagram.
Specific embodiment
To make the objectives, technical solutions, and advantages of the present invention clearer, below with reference to embodiment and attached drawing, to this
Invention is described in further detail, and exemplary embodiment of the invention and its explanation for explaining only the invention, are not made
For limitation of the invention.
Embodiment
As shown in Figure 1, 2, the present invention is used for the system that multiple interfaces are tested, and is for what multiple interfaces were tested
System, including power module, pci expansion slot, PCI function card and mainboard module, rear panel module and PC machine are provided on rear panel module
Carried out data transmission by NGA/DVI, several PCI-e are provided in pci expansion slot and carry card, PCI-e carries card and is internally provided with
FMC expansion interface is connect with external module.The external module includes LVDS high-speed interface submodule, digital audio interface submodule
Block, optical fiber interface submodule, expansion module, the high-speed interface submodule, optical fiber interface submodule pass through PCIE high-speed bus
Carry out data transmission, digital audio interface submodule receives PCI-e and carries the data progress audio output that card is sent.The PCI-e
Carrying card further includes memory modules, flash memory module, FPGA module, and the memory modules and flash memory module are connect with FPGA module,
FPGA module is carried out data transmission by LVDS high speed port, serdes high speed port, I/O high speed port and FMC expansion interface, FPGA mould
Block also sends data to mainboard module.The pci expansion slot of the rear panel module setting is at least 2.The rear panel module is set
The PCI function card set is at least 2.
The PCI-e that the present invention uses carries card mainly by FPGA as core processor, is connect with host computer using PCIE2.0x8
Mouthful, data transfer bandwidth theoretical value is up to 40Gbps, and FPGA external harmoniousness DDR3 cache, externally uses FMC connection
Device has drawn three kinds of signals: LVDS high-speed differential signal from FPGA, can external common LVDS signal peripheral hardware, multiple groups
LVDS signal can combine transmitting data in parallel, significantly increase data transfer bandwidth.Serdes high-speed differential signal,
The signal is the signal drawn from the GTP mouth of FPGA, can connect customized serdes signal peripheral hardware, it is total can be RapidIO
Line connects RapidIO bus peripheral hardware, can also do SGMII high-speed interface and other serdes signal peripheral hardwares.IO parallel signal,
It can be used as common IO control signal, parallel signal can also be formed and carried out data transmission, can also be used as such as SPI, I2C,
The common bus such as UART connects corresponding peripheral hardware.The I/O port of FPGA is a kind of very flexible interface.
PCI-e carries card since the high speed ports such as LVDS have been drawn in front end, and rear end is again using PCIE high-speed bus, the load card
It is very suitable to high speed data transfer, therefore LVDS, the interfaces such as optical fiber mainly use the load card to integrate.
This system can not can integrate all functions since interface is more with one two cards, and must design
The multiple boards of multiple interfaces realize all functions, and the mode that our company considers is that two kinds of load of design are blocked, one is PCI-e's
Card is carried, another is that PCI carries card, then all interfaces are designed as to the solution of subcard.Design two kinds of load cards not
Only facilitate the extension between different interface subcards, and be more advantageous to the Function Extension in user's future, is needed in user in future
It when increasing certain interfaces, does not need to redesign entire function, it is only necessary to design an interface card, be integrated into PCI-e or PCI
Load card on can be realized as, the development time can greatly be shortened in this way, while a large amount of funds can be saved for user.
The present invention uses PICMG framework, is internally integrated the backboard and mainboard of PICMG1.3, chooses the framework mode, mainly
Reason of both having: 1, the functional interface to be realized of this equipment itself is more, and more PCIE or pci interface is needed to come
The board of integrated different function and interface；2, in view of scalability is more flexible, if only considering to design a kind of PCIE or PCI
Card otherwise be limited to interface quantity or be limited to function, such as only design PCI card, then be limited to transmission bandwidth, can not
It will be more than the real-time data transmission of several Gbps, interface quantity is generally insufficient if the card for only designing PCI-e, because of PCI-e
There are an x1, x4, x8, tetra- kinds of interfaces of x16, wherein only PCIE x16 is compatible with 4 kinds of protocol interfaces, but the sexual valence of x16 Universal joint
Relatively high industrial control mainboard is usually no more than two, considerably less, is unfavorable for extending, and the compatible 4 kinds of physics of only PCIE x1 connect
Mouthful, but x1 bandwidth is insufficient, advantageously unlike PCI.
PCI carries card and is mainly used for the integrated lower function subcard of rate, which is mainly also using FPGA as data
The core component exchanged with interface is handled, front end is also to have drawn LVDS signal and I/O signal using FMC, and rear end is integrated with
Pci bridge chip is designed as core architecture.Front terminal module is as shown in Fig. 2, can be integrated on the subcard.
It develops PCI and carries card, the extension insufficient situation of slot position can either be alleviated, while Ben Kanei increases PCI Bridge, the bridge core
Piece has certain processing capacity, the function control of processing and data forwarding and submodule for data, and software development rises
Coming all can be more flexible and conveniently.
The above two design for carrying card plus subcard, most subcard can both select PCI-e to carry card to integrate, can also be with
Selecting PCI to carry, card is integrated, subject to the space that the quantity of integrated card can be accommodated according to interface connector.Therefore, it either selects
The integrated card of PCI-e or the integrated card of PCI, it is final to need to be comprehensively considered according to the slot position quantity of PICMG backboard.
Above-described specific embodiment has carried out further the purpose of the present invention, technical scheme and beneficial effects
It is described in detail, it should be understood that being not intended to limit the present invention the foregoing is merely a specific embodiment of the invention
Protection scope, all within the spirits and principles of the present invention, any modification, equivalent substitution, improvement and etc. done should all include
Within protection scope of the present invention.
Claims (4)
1. for the system that multiple interfaces are tested, including being provided with power module, pci expansion slot, PCI function on rear panel module
Energy card and mainboard module, rear panel module is carried out data transmission with host computer machine by NGA/DVI, if being provided in pci expansion slot
Dry PCI-e carries card, and PCI-e load card is internally provided with FMC expansion interface and connect with external module, which is characterized in that the PCI
Function card need to carry out data conversion, acquisition rate by least 12 A/D converters using single-ended analog inputs more than 8 channels
100kHz need to be greater than.
2. the system according to claim 1 tested for multiple interfaces, which is characterized in that the PCI-e carries card
It further include memory modules, flash memory module, FPGA module, the memory modules and flash memory module are connect with FPGA module, FPGA mould
Block is carried out data transmission by LVDS high speed port, serdes high speed port, I/O high speed port and FMC expansion interface, and FPGA module will also
Data are sent to mainboard module.
3. the system according to claim 1 tested for multiple interfaces, which is characterized in that the rear panel module is set
The pci expansion slot set is at least 2.
4. the system according to claim 1 tested for multiple interfaces, which is characterized in that the rear panel module is set
The PCI function card set is at least 2.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810319284.9A CN110362058A (en) | 2018-04-11 | 2018-04-11 | The system tested for multiple interfaces |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810319284.9A CN110362058A (en) | 2018-04-11 | 2018-04-11 | The system tested for multiple interfaces |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN110362058A true CN110362058A (en) | 2019-10-22 |
Family
ID=68214370
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810319284.9A Withdrawn CN110362058A (en) | 2018-04-11 | 2018-04-11 | The system tested for multiple interfaces |
Country Status (1)
| Country | Link |
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| CN (1) | CN110362058A (en) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110943890A (en) * | 2019-12-09 | 2020-03-31 | 北京无线电测量研究所 | Automatic testing arrangement of many interface types and chronogenesis digital equipment |
| CN111367259A (en) * | 2020-03-17 | 2020-07-03 | 四川九洲电器集团有限责任公司 | Low-cost digital signal processing module automatic testing device and method |
| CN112231263A (en) * | 2020-10-29 | 2021-01-15 | 山东超越数控电子股份有限公司 | FPGA intermediate layer card extends device |
| WO2023159451A1 (en) * | 2022-02-25 | 2023-08-31 | 中国科学院半导体研究所 | Data simulation apparatus and method |
-
2018
- 2018-04-11 CN CN201810319284.9A patent/CN110362058A/en not_active Withdrawn
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110943890A (en) * | 2019-12-09 | 2020-03-31 | 北京无线电测量研究所 | Automatic testing arrangement of many interface types and chronogenesis digital equipment |
| CN111367259A (en) * | 2020-03-17 | 2020-07-03 | 四川九洲电器集团有限责任公司 | Low-cost digital signal processing module automatic testing device and method |
| CN112231263A (en) * | 2020-10-29 | 2021-01-15 | 山东超越数控电子股份有限公司 | FPGA intermediate layer card extends device |
| WO2023159451A1 (en) * | 2022-02-25 | 2023-08-31 | 中国科学院半导体研究所 | Data simulation apparatus and method |
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Legal Events
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| PB01 | Publication | ||
| PB01 | Publication | ||
| WW01 | Invention patent application withdrawn after publication | ||
| WW01 | Invention patent application withdrawn after publication |
Application publication date: 20191022 |