CN110164955A - 一种横向变掺杂终端结构 - Google Patents
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Abstract
本发明公开了一种横向变掺杂终端结构,包括埋氧层和设于所述埋氧层上的耐压层,所述耐压层包括主结区、倒角区和平行区;所述倒角区的浓度参数为NNOV(rc,χ),所述平行区的浓度参数为NCON(χ),所述耐压层的浓度参数为NADD(rc,χ),倒角区的浓度参数为NNOV(rc,χ)的计算公式为:NNOV(rc,χ)=NCON(χ)+NADD(rc,χ),其中,χ为以所述主结区的外侧边缘处为起点的坐标,rc为所述倒角区的内侧的曲率半径,Ec为耐压层临界击穿电场,q为电子电荷量,εs为耐压层的介电常数。通过对掺杂浓度的计算改变倒角区和平行区的浓度参数,使横向变掺杂终端结构上的电场分布更加均匀,提高器件的击穿电压,消除版图倒角处的曲率效应引起击穿电压降低的影响。
Description
技术领域
本发明涉及功率半导体器件技术领域,尤其涉及一种横向变掺杂终端结构。
背景技术
功率半导体器件主要由元胞区和终端区两部分组成,终端结构的设计对功率器件的击穿电压特性至关重要。场板和场限环是最常用的终端结构,但随着器件耐压的增加,当场限环个数增加到一定程度后,对击穿电压的提高效果不再明显,过量的场限环会浪费了大量的芯片面积,增加了生产成本。文献Stengl R,Gosele U.Variation of lateraldoping-A new concept to avoid high voltage breakdown of planar junctions,Proceedings of International Electron Devices Meeting,1985等提出的横向变掺杂(Variable Lateral Doping,VLD)终端结构,大大减小了终端长度与芯片面积,提高了耐压效率,降低了成产成本,并逐渐被广泛用于功率MOSFET等器件。VLD是一种通过设置合适的掩膜版窗口形状和窗口的参数值,在重掺杂的主结附近进行离子注入形成横向变掺杂结构,离主结越近的地方注入量越大,越远的地方注入量越小,并通过杂质的横向扩散使得注入的杂质连成一片。
VLD终端要实现高的击穿电压,需要P型变掺杂区被完全耗尽,因此击穿电压对P型变掺杂区的杂质浓度非常敏感,杂质浓度设置不当将会造成击穿电压的急剧降低。
发明内容
本发明所要解决的技术问题是:提供一种具有较高击穿电压和均匀电场分布的横向变掺杂终端结构。
为了解决上述技术问题,本发明采用的技术方案为:一种横向变掺杂终端结构,包括埋氧层和设于所述埋氧层上的耐压层,所述耐压层包括主结区、倒角区和平行区,所述倒角区和平行区分别连接于所述主结区的外侧,所述倒角区与平行区交替相连;
所述倒角区的浓度参数为NNOV(rc,χ),所述平行区的浓度参数为NCON(χ),所述耐压层的浓度参数为NADD(rc,χ),倒角区的浓度参数为NNOV(rc,χ)的计算公式为:NNOV(rc,χ)=NCON(χ)+NADD(rc,χ),其中,χ为以所述主结区的外侧边缘处为起点的坐标,rc为所述倒角区的内侧的曲率半径,Ec为耐压层临界击穿电场,q为电子电荷量,εs为耐压层的介电常数。
本发明的有益效果在于:通过对掺杂浓度的计算改变倒角区和平行区的浓度参数,使横向变掺杂终端结构上的电场分布更加均匀,提高器件的击穿电压,消除版图倒角处的曲率效应引起击穿电压降低的影响。
附图说明
图1为本发明实施例一的横向变掺杂终端结构的结构示意图;
图2为本发明实施例一的横向变掺杂终端结构的倒角区剖视图;
图3为本发明实施例一的横向变掺杂终端结构的平行区剖视图;
图4为本发明实施例一的横向变掺杂终端结构的平行区杂质分布示意图;
图5为本发明实施例一的横向变掺杂终端结构的倒角区杂质分布示意图。
标号说明:
1、埋氧层;
2、耐压层;
3、主结区;
4、倒角区;
5、平行区。
具体实施方式
为详细说明本发明的技术内容、所实现目的及效果,以下结合实施方式并配合附图予以说明。
本发明最关键的构思在于:通过对掺杂浓度的计算改变倒角区和平行区的浓度参数,使横向变掺杂终端结构上的电场分布更加均匀,提高器件的击穿电压。
请参照图1至图5,一种横向变掺杂终端结构,包括埋氧层1和设于所述埋氧层1上的耐压层2,所述耐压层2包括主结区3、倒角区4和平行区5,所述倒角区4和平行区5分别连接于所述主结区3的外侧,所述倒角区4与平行区5交替相连;
所述倒角区4的浓度参数为NNOV(rc,χ),所述平行区5的浓度参数为NCON(χ),所述耐压层2的浓度参数为NADD(rc,χ),倒角区4的浓度参数为NNOV(rc,χ)的计算公式为:NNOV(rc,χ)=NCON(χ)+NADD(rc,χ),其中,χ为以所述主结区3的外侧边缘处为起点的坐标,rc为所述倒角区4的内侧的曲率半径,Ec为耐压层2临界击穿电场,q为电子电荷量,εs为耐压层的介电常数。
本发明的结构原理简述如下:通过在耐压层上明确划分主结区、倒角区和平行区,利用NNOV(rc,χ)=NCON(χ)+NADD(rc,χ)和计算公式对倒角区和平行区的浓度精确计算和控制,优化横向变掺杂终端结构上的电场分布和击穿电压。
从上述描述可知,本发明的有益效果在于:通过对掺杂浓度的计算改变倒角区和平行区的浓度参数,使横向变掺杂终端结构上的电场分布更加均匀,提高器件的击穿电压,消除版图倒角处的曲率效应引起击穿电压降低的影响。
进一步的,所述倒角区4的宽度和平行区5的宽度相等。
进一步的,所述平行区5的掺杂浓度为其中W为平行区5的宽度,ts为平行区厚度。
进一步的,所述平行区5的掺杂浓度为其中W为平行区5的宽度,ts为平行区厚度。
进一步的,所述耐压层2由硅、锗、锗硅、碳化硅、砷化镓、磷化铟或氮化镓材料制作。
由上述描述可知,硅、锗、锗硅、碳化硅、砷化镓、磷化铟或氮化镓作为横向变掺杂终端结构的材料可以提高电子迁移率和导热性能。
进一步的,所述耐压层2用于二极管、BJT、MOSFET、JFET、SIT、IGBT、晶闸管、GTO或MCT。
由上述描述可知,用于二极管、BJT、MOSFET、JFET、SIT、IGBT、晶闸管、GTO或MCT的耐压层可抑制电场聚集,消除曲率效应。
实施例一
请参照图1至图5,本发明的实施例一为:一种横向变掺杂终端结构,包括埋氧层1和设于所述埋氧层1上的耐压层2,所述耐压层2包括主结区3、倒角区4和平行区5,所述倒角区4和平行区5分别连接于所述主结区3的外侧,所述倒角区4与平行区5交替相连;
所述倒角区4的浓度参数为NNOV(rc,χ),所述平行区5的浓度参数为NCON(χ),所述耐压层2的浓度参数为NADD(rc,χ),倒角区4的浓度参数为NNOV(rc,χ)的计算公式为:NNOV(rc,χ)=NCON(χ)+NADD(rc,χ),其中,χ为以所述主结区3的外侧边缘处为起点的坐标,rc为所述倒角区4的内侧的曲率半径,Ec为耐压层2临界击穿电场,q为电子电荷量,εs为耐压层2的介电常数。
请参照附图1,在本实施例中,所述倒角区4的宽度和平行区5的宽度相等。
所述平行区5的掺杂浓度为或其中W为平行区5的宽度,ts为平行区厚度。
请参照附图1,所述埋氧层1不存在曲率效应,因此可以得到泊松方程:
采用终端表面任意位置的电场同时达到临界击穿电场的理想条件E(χ)=Ec,可以推出终端平行区5的掺杂浓度NCON(χ)。
在终端倒角区4,越靠近主结区3的位置,耐压层2曲率半径越小,受到曲率效应影响越大,如果终端倒角区4仍然采用和终端平行区5相同的杂质分布,就会造成耐压层2电场聚集,击穿电压将急剧下降。因此,考虑到终端倒角区4的曲率效应,必须建立柱坐标系下的泊松方程
同样采用终端表面任意位置的电场同时达到临界击穿电场的理想条件E(χ)=Ec,可以给出求解方程2的边界条件:
根据边界条件φ(rc+W,0)=VD,φ(rc,0)=0,得出考虑了终端倒角区4曲率效应影响的杂质浓度分布:
NNOV(rc,χ)=NCON(χ)+NADD(rc,χ)
(0≤χ≤W)
NNOV(rc,χ)在终端平行区5掺杂基础上,增加了一项与rc+χ成反比例变化的NADD(rc,χ)。随着终端倒角区4曲率半径的减小,终端倒角区4的掺杂浓度随着曲率半径的减小明显增加,如图5所示。这是因为终端倒角区4曲率半径的减小会带来更大的曲率效应,电场峰值增加,因此在终端倒角区4提高掺杂浓度,可以在电离后引入更多的负电荷,产生与原本与电场方向相反的电场,降低终端倒角区4附近的电场强度。
本实施例的主要工艺步骤包括:
S1、在埋氧层1上生长一层牺牲氧化层;
S2、根据终端平行区5的杂质浓度分布和终端倒角区4的杂质浓度分布,设计掩膜版窗口;
S3、光刻,刻蚀氧化层,露出离子注入窗口;
S4、离子注入,并通过高温退火使注入的杂质连成一片形成最终的横向变掺杂终端结构。
可选的,所述耐压层2由硅、锗、锗硅、碳化硅、砷化镓、磷化铟或氮化镓材料制作。硅、锗、锗硅、碳化硅、砷化镓、磷化铟或氮化镓作为横向变掺杂终端结构的材料可以提高电子迁移率和导热性能。
可选的,所述耐压层2用于二极管、BJT、MOSFET、JFET、SIT、IGBT、晶闸管、GTO或MCT,用于二极管、BJT、MOSFET、JFET、SIT、IGBT、晶闸管、GTO或MCT的耐压层可抑制电场聚集,消除曲率效应。
综上所述,本发明提供的横向变掺杂终端结构,通过对掺杂浓度的计算改变倒角区和平行区的浓度参数,使横向变掺杂终端结构上的电场分布更加均匀,提高器件的击穿电压,消除版图倒角处的曲率效应引起击穿电压降低的影响;硅、锗、锗硅、碳化硅、砷化镓、磷化铟或氮化镓作为横向变掺杂终端结构的材料可以提高电子迁移率和导热性能;用于二极管、BJT、MOSFET、JFET、SIT、IGBT、晶闸管、GTO或MCT的耐压层可抑制电场聚集,消除曲率效应。
以上所述仅为本发明的实施例,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等同变换,或直接或间接运用在相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (6)
1.一种横向变掺杂终端结构,包括埋氧层和设于所述埋氧层上的耐压层,其特征在于:所述耐压层包括主结区、倒角区和平行区,所述倒角区和平行区分别连接于所述主结区的外侧,所述倒角区与平行区交替相连;
所述倒角区的浓度参数为NNOV(rc,χ),所述平行区的浓度参数为NCON(χ),所述耐压层的浓度参数为NADD(rc,χ),倒角区的浓度参数为NNOV(rc,χ)的计算公式为:NNOV(rc,χ)=NCON(χ)+NADD(rc,χ),其中,χ为以所述主结区的外侧边缘处为起点的坐标,rc为所述倒角区的内侧的曲率半径,Ec为耐压层临界击穿电场,q为电子电荷量,εs为耐压层的介电常数。
2.根据权利要求1所述的横向变掺杂终端结构,其特征在于:所述倒角区的宽度和平行区的宽度相等。
3.根据权利要求1所述的横向变掺杂终端结构,其特征在于:所述平行区的掺杂浓度为其中W为平行区的宽度,ts为平行区厚度。
4.根据权利要求1所述的横向变掺杂终端结构,其特征在于:所述平行区的掺杂浓度为其中W为平行区的宽度,ts为平行区厚度。
5.根据权利要求1所述的横向变掺杂终端结构,其特征在于:所述耐压层由硅、锗、锗硅、碳化硅、砷化镓、磷化铟或氮化镓材料制作。
6.根据权利要求1所述的横向变掺杂终端结构,其特征在于:所述耐压层用于二极管、BJT、MOSFET、JFET、SIT、IGBT、晶闸管、GTO或MCT。
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