CN110112106A - 芯片封装模块及包含该芯片封装模块的电路板结构 - Google Patents
芯片封装模块及包含该芯片封装模块的电路板结构 Download PDFInfo
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- CN110112106A CN110112106A CN201810228369.6A CN201810228369A CN110112106A CN 110112106 A CN110112106 A CN 110112106A CN 201810228369 A CN201810228369 A CN 201810228369A CN 110112106 A CN110112106 A CN 110112106A
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- encapsulation module
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- circuit
- metal
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- 238000005538 encapsulation Methods 0.000 title claims abstract description 96
- 229910052751 metal Inorganic materials 0.000 claims abstract description 148
- 239000002184 metal Substances 0.000 claims abstract description 148
- 239000000758 substrate Substances 0.000 claims abstract description 65
- 230000008878 coupling Effects 0.000 claims abstract description 49
- 238000010168 coupling process Methods 0.000 claims abstract description 49
- 238000005859 coupling reaction Methods 0.000 claims abstract description 49
- 238000000465 moulding Methods 0.000 claims abstract description 40
- 239000000463 material Substances 0.000 claims description 27
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 26
- 229910052802 copper Inorganic materials 0.000 claims description 26
- 239000010949 copper Substances 0.000 claims description 26
- 150000002739 metals Chemical class 0.000 claims description 14
- KDLHZDBZIXYQEI-UHFFFAOYSA-N Palladium Chemical compound [Pd] KDLHZDBZIXYQEI-UHFFFAOYSA-N 0.000 claims description 12
- 229910045601 alloy Inorganic materials 0.000 claims description 12
- 239000000956 alloy Substances 0.000 claims description 12
- 238000005476 soldering Methods 0.000 claims description 11
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 8
- 229910052737 gold Inorganic materials 0.000 claims description 8
- 239000010931 gold Substances 0.000 claims description 8
- 239000000203 mixture Substances 0.000 claims description 8
- 229910000679 solder Inorganic materials 0.000 claims description 8
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 6
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 claims description 6
- 229910017052 cobalt Inorganic materials 0.000 claims description 6
- 239000010941 cobalt Substances 0.000 claims description 6
- GUTLYIVDDKVIGB-UHFFFAOYSA-N cobalt atom Chemical compound [Co] GUTLYIVDDKVIGB-UHFFFAOYSA-N 0.000 claims description 6
- 229910052738 indium Inorganic materials 0.000 claims description 6
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 claims description 6
- WPBNNNQJVZRUHP-UHFFFAOYSA-L manganese(2+);methyl n-[[2-(methoxycarbonylcarbamothioylamino)phenyl]carbamothioyl]carbamate;n-[2-(sulfidocarbothioylamino)ethyl]carbamodithioate Chemical compound [Mn+2].[S-]C(=S)NCCNC([S-])=S.COC(=O)NC(=S)NC1=CC=CC=C1NC(=S)NC(=O)OC WPBNNNQJVZRUHP-UHFFFAOYSA-L 0.000 claims description 6
- 229910052763 palladium Inorganic materials 0.000 claims description 6
- 229910052709 silver Inorganic materials 0.000 claims description 6
- 239000004332 silver Substances 0.000 claims description 6
- 239000010936 titanium Substances 0.000 claims description 6
- 229910052719 titanium Inorganic materials 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 3
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 3
- 239000004411 aluminium Substances 0.000 claims description 2
- 239000011148 porous material Substances 0.000 claims description 2
- 230000000149 penetrating effect Effects 0.000 claims 1
- 238000010438 heat treatment Methods 0.000 description 14
- 239000011810 insulating material Substances 0.000 description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000001816 cooling Methods 0.000 description 4
- 230000005611 electricity Effects 0.000 description 4
- 230000010354 integration Effects 0.000 description 4
- 230000007547 defect Effects 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- 239000012774 insulation material Substances 0.000 description 3
- 239000000919 ceramic Substances 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 230000005855 radiation Effects 0.000 description 2
- 238000007789 sealing Methods 0.000 description 2
- 230000006641 stabilisation Effects 0.000 description 2
- 238000011105 stabilization Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910002601 GaN Inorganic materials 0.000 description 1
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 230000002457 bidirectional effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 229910010293 ceramic material Inorganic materials 0.000 description 1
- ALKZAGKDWUSJED-UHFFFAOYSA-N dinuclear copper ion Chemical compound [Cu].[Cu] ALKZAGKDWUSJED-UHFFFAOYSA-N 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000004615 ingredient Substances 0.000 description 1
- 239000010954 inorganic particle Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Classifications
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- H—ELECTRICITY
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- H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
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- H01L23/13—Mountings, e.g. non-detachable insulating substrates characterised by the shape
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- H01L23/367—Cooling facilitated by shape of device
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
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- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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Abstract
本发明公开一种芯片封装模块及包含该芯片封装模块的电路板结构,该芯片封装模块包括模封层、芯片、基板以及多个盲孔电极。模封层具有第一表面及相对于第一表面的第二表面。芯片具有一第三表面及相对于第三表面的第四表面。芯片的第三表面设有金属凸块,其中芯片自模封层的第一表面埋入模封层并暴露金属凸块于第一表面。基板包括金属层,其中基板的金属层通过金属凸块与芯片接合。多个盲孔电极穿入模封层的第二表面与基板的金属层电连接。
Description
技术领域
本发明涉及一种芯片封装模块及包含该芯片封装模块的电路板结构。
背景技术
在一般功率半导体的封装结构中,先将功率芯片通过焊锡材料组装至导线架上,再进行打线接合。然而,此打线接合方式并无助于元件散热,且可靠度不佳。目前,有业者将功率芯片以倒装方式通过焊锡材料组装至基板上。虽此方式可改善封装结构的电导性与热导性,然而,当有较大电流通过焊锡材料时,此不耐高电流作用的焊锡材料会于材料结构中产生孔洞状缺陷,而造成产品长期使用后或是可靠度测试过程中,焊锡材料所连接上、下元件间的断路。
因此,开发一种具有良好散热效能及耐高电流的封装结构是众所期待的。
发明内容
为解决现有技术的上述问题,本发明提供一种芯片封装模块,包括模封层、芯片、基板以及多个盲孔电极。模封层具有第一表面及相对于第一表面的第二表面。芯片具有一第三表面及相对于第三表面的第四表面。芯片的第三表面设有金属凸块,其中芯片自模封层的第一表面埋入模封层并暴露金属凸块于第一表面。基板包括金属层,其中基板的金属层通过金属凸块与芯片接合。多个盲孔电极穿入模封层的第二表面与基板的金属层电连接。
本发明还提供一种电路板结构,包括电路板以及如上所述的芯片封装模块。电路板具有一电路分布层,其中电路分布层至少设置在电路板的表面。如上所述的芯片封装模块,嵌于电路板中,其中芯片封装模块的多个盲孔电极的至少之一与电路板的电路分布层电连接。
本发明又提供一种芯片封装模块,包括模封层、芯片、基板以及多个穿孔电极。模封层具有第一表面及相对于第一表面的第二表面。芯片具有第三表面及相对于第三表面的第四表面。芯片的第三表面设有金属凸块,其中芯片自模封层的第一表面埋入模封层并暴露金属凸块于第一表面。基板包括金属层,其中基板的金属层通过金属凸块与芯片接合。多个穿孔电极穿过模封层与基板,并与基板的金属层电连接。
本发明再提供一种电路板结构,包括电路板以及如前段所述的芯片封装模块。电路板具有电路分布层,其中电路分布层至少设置在电路板的表面。如上所述的芯片封装模块,嵌于电路板中,其中芯片封装模块的多个穿孔电极的至少之一与电路板的电路分布层电连接。
基于上述,本发明以倒装(flip-chip)方式通过金属-金属接合将功率芯片组装至基板上,省去需要高精度对位的制作工艺步骤,且使整体电路设计更具弹性。本发明芯片封装结构中的基板是由高散热绝缘材料层与位于其上、下两侧的导热及/或导电金属层相互堆叠而成,且在芯片晶背处设置有专司(专门司职)散热功能的金属电极,将芯片产生的热随即传至外部。因此,本发明封装结构具有双面散热效能(分别自晶背与基板路径散热)。本发明一实施例的芯片与基板间的金属-金属接合材料可不含有焊锡成分,当有较大电流通过接合处时,由于接合结构中并不易产生如导致元件断路的孔洞状缺陷,相当有助于元件电性的稳定,具有耐高电流、高导电率、以及低阻抗的特性。本发明一实施例的电路板封装结构适用于大面积的异质整合量产。再者,本发明一实施例是将体积较小的芯片封装模块通过电路分布层的整合嵌入例如印刷电路板(PCB)的系统板中,遂使得整体封装结构的体积更加微缩,达到体积减薄的效果。
为让本发明更明显易懂,下文特举实施例,并配合所附的附图作详细说明如下。
附图说明
图1至图4为本发明的第一实施例的一种芯片封装模块的剖面示意图;
图5至图6为本发明的第一实施例的一种电路板结构的剖面示意图;
图7至图10为本发明的第二实施例的一种芯片封装模块的剖面示意图;
图11至图12为本发明的第二实施例的一种电路板结构的剖面示意图;
图13至图16为本发明的第三实施例的一种芯片封装模块的剖面示意图;
图17至图18为本发明的第三实施例的一种电路板结构的剖面示意图。
符号说明
10:芯片封装模块;
12:基板;
14:芯片;
15:底胶;
16:模封层;
18、122:盲孔电极;
20、24、28’、44、118:金属层;
22、30、34:金属凸块;
26:绝缘层;
28、104:电路分布层;
36、46:穿孔电极;
38:凹槽;
42、120、121:导热柱;
48:导热块;
100:电路板结构;
102:电路板;
106、116:散热装置;
108:耐压绝缘材;
110:散热片;
112:功能性芯片;
S1:第一表面;
S2:第二表面;
S3:第三表面;
S4:第四表面;
S5、S6:表面。
具体实施方式
有关本发明实施例的前述及其他技术内容,在以下配合参考附图的各实施例的详细说明中,将可清楚的呈现。以下实施例中所提到的方向用语,例如:「上」、「下」、「前」、「后」、「左」、「右」等,仅是参考附加附图的方向。因此,使用的方向用语是用来说明,而并非用来限制本发明。并且,在下列各实施例中,相同或相似的元件将采用相同或相似的标号。
图1至图4是本发明的第一实施例的一种芯片封装模块的剖面示意图。
请参照图1,在本实施例中,芯片封装模块10包括模封层16、芯片14以及基板12。模封层16具有第一表面S1以及相对于第一表面S1的第二表面S2。芯片14具有第三表面S3以及相对于第三表面S3的第四表面S4,且芯片14的第三表面S3设置至少一个金属凸块22,其中芯片14自模封层16的第一表面S1埋入模封层16并暴露金属凸块22于第一表面S1。基板12还包括金属层20,其中基板12的金属层20通过金属凸块22与芯片14接合。在部分实施例中,金属层20可为图案化金属层。芯片封装模块10还包括多个盲孔电极18位于该芯片14的周围的至少一侧,并穿入模封层16的第二表面S2与基板12的金属层20电连接。
在部分实施例中,芯片封装模块10的基板12可为覆铜陶瓷基板、电镀铜陶瓷基板、印刷电路板或铝基板,但本发明不以此为限。在本实施例中,基板12还包括金属层24与绝缘层26。金属层24相对于金属层20设置,绝缘层26设置于金属层20与金属层24之间。在部分实施例中,金属层20与金属层24可包括铜或铝或其他金属。在部分实施例中,绝缘层26可包括高散热绝缘材料,例如陶瓷材料的无机绝缘材料,或高分子材料混入高散热无机颗粒的有机绝缘材料。
在部分实施例中,芯片封装模块10的芯片14的金属凸块22的成分包括焊锡合金、铜、银、铟、金、钯、钛、锰、钴或其合金。但在部分实施例中,金属凸块22不含焊锡成分。在本实施例中,芯片14可通过金属凸块22(例如:铜凸块)与基板12的金属层20(例如:铜金属层)接合,形成金属-金属(例如:铜-铜)结合,但本发明不限于此。
在部分实施例中,芯片封装模块10的芯片14为功率芯片,例如为应用于650伏特以上的功率芯片,但本发明不以此为限。在一些实施例中,芯片封装模块10的芯片14上设置的功率元件可为绝缘栅双极晶体管、氮化镓晶体管或金属氧化物半导体场效晶体管。
在部分实施例中,模封层16可包括绝缘材料。在本实施例中,在芯片14与基板12之间填入底胶15。在部分实施例中,底胶15可包括绝缘材料。底胶15与模封层16可为相同或不同材料。
在本实施例中,芯片封装模块10还包括电路分布层28,形成于模封层16与盲孔电极18上。在部分实施例中,盲孔电极18可包括例如铜或其他导电金属。芯片14通过基板12的金属层20经由盲孔电极18与电路分布层28电连接。
图2是本发明的第一实施例的一种芯片封装模块的剖面示意图。请参考图1与图2,本实施例的芯片封装模块10与图1的芯片封装模块10的差异在于:本实施例的芯片封装模块10以穿孔电极36置换图1的盲孔电极18。穿孔电极36贯穿模封层16与基板12。其中芯片14与基板12的金属层20的连接方式可包括如后述图3或图4的连接方式。在部分实施例中,穿孔电极36可包括例如铜或其他导电金属。芯片14通过基板12的金属层20经由穿孔电极36与芯片封装模块10的电路分布层28电连接。
图3是本发明的第一实施例的一种芯片封装模块的剖面示意图。请参照图1与图3,本实施例的芯片封装模块10与图1的芯片封装模块10的差异在于:本实施例的芯片封装模块10的芯片14与基板12的金属层20之间,还包括一金属凸块30,设置在基板12的金属层20与金属凸块22之间。芯片14可通过金属凸块22、金属凸块30与基板12的金属层20接合,其中金属凸块30的材料可包括焊锡合金、铜、银、铟、金、钯、钛、锰、钴或其合金,但本发明不限于此。在部分实施例中,金属凸块30不含焊锡成分。
图4是本发明的第一实施例的一种芯片封装模块的剖面示意图。请参考图3与图4,本实施例的芯片封装模块10与图3的芯片封装模块10的差异在于:本实施例的芯片封装模块10的芯片14与基板12的金属层20之间,还包括一金属凸块34,设置在金属凸块30与金属凸块22之间。芯片14可通过金属凸块22、金属凸块34、金属凸块30与基板12的金属层20接合,其中金属凸块22与金属凸块30可为同质金属(例如:铜)。其中金属凸块34的材料可包括焊锡合金、铜、银、铟、金、钯、钛、锰、钴或其合金,但本发明不限于此。在部分实施例中,金属凸块34不含焊锡成分。
本发明一实施例以倒装(flip-chip)方式通过金属-金属接合将功率芯片组装至基板上,省去需要高精度对位的制作工艺步骤,且使整体电路设计更具弹性。此外,本发明一实施例的芯片封装结构中位于芯片周围的盲孔(blind-hole)电极(或穿孔电极)也可用来制作成测试电路,以测试制作工艺中栅极与源极/漏极是否持续保持电性效能。
图5至图6是本发明的第一实施例的一种电路板结构的剖面示意图。
请参照图5,在本实施例中,电路板结构100可包括电路板102以及如图1、图2、图3或图4的芯片封装模块10,嵌于电路板102中,本实施例是以图1的芯片封装模块10为例。基板12的金属层24露出于电路板102。电路板102具有电路分布层104,设置在电路板102的表面S5上。芯片封装模块10的电路分布层28通过盲孔电极122与电路板102的电路分布层104电连接。在部分实施例中,盲孔电极122可包括例如铜或其他导电金属。在本实施例中,电路板结构100的电路分布层104设置在电路板102的表面S5,但本发明不以此为限。在其他实施例中,若以图2的芯片封装模块10为例,通过穿孔电极36的双向导电特性,电路分布层104可以设置在电路板102的表面S5与表面S6。
电路板结构100,还包括散热装置106,设置于基板12露出的金属层24上。散热装置106通过基板12露出的金属层24与芯片封装模块10热导通。在本实施例中,散热装置106由耐压绝缘材108与散热片110所构成。
在本实施例中,在电路板结构100的内部或外部可以进一步利用例如打线或其他电连接方式组装其他功能性芯片112,如图5所示。
图6是本发明的第一实施例的一种电路板结构的剖面示意图。请参照图5与图6,本实施例的电路板结构100与图5的电路板结构100的差异在于:本实施例的基板12的金属层24未露出于电路板102。亦即本实施例电路板结构100中的芯片封装模块10内埋于电路板102。金属层118设置于散热装置106与电路板102之间,金属层118利用导热柱120连接芯片封装模块10中的基板12的金属层24与散热装置106。在部分实施例中,导热柱120可包括例如铜、其他导热金属或其他导热材料。
图7至图10是本发明的第二实施例的一种芯片封装模块的剖面示意图。
请同时参照图1与图7,本实施例的芯片封装模块10与图1的芯片封装模块10的差异在于:本实施例的芯片封装模块10的芯片14的第四表面S4包括金属层44,芯片封装模块10还包括至少一凹槽38,凹槽38自模封层16的第二表面S2穿入。其中,至少一凹槽38中填充导热材料例如金属,以形成导热柱42。导热柱42连接芯片14的第四表面S4的金属层44与金属层28’。在本实施例中,芯片14产生的热可经由导热柱42上传至模封层16的第二表面S2并通过第二表面S2的金属层28’侧向传导。在部分实施例中,导热柱42可包括例如铜、其他导热金属或其他导热材料。在本实施例中,导热柱42由多个凹槽38所构成。在一实施例中,导热柱42也可为电性导通柱,金属层28’可为电路分布层。
在另一实施例中(图未绘示),芯片封装模块10可为如图7、图8、图9或图10的芯片封装模块10。其中,芯片封装模块10的芯片14的第四表面S4还包括一导电衬垫,芯片封装模块10包括至少一凹槽38。凹槽38中填充导电材料,自模封层16的第二表面S2穿入并电连接芯片14的导电衬垫与金属层28’。
图8是本发明的第二实施例的一种芯片封装模块的剖面示意图。请同时参照图7与图8,本实施例的芯片封装模块10与图7的芯片封装模块10的差异在于:本实施例的芯片封装模块10以穿孔电极36置换图7的盲孔电极18。穿孔电极36贯穿模封层16与基板12。其中芯片14与基板12的金属层20的连接方式可包括如后述图9或图10的连接方式。在部分实施例中,穿孔电极36可包括例如铜或其他导电金属。芯片14通过基板12的金属层20经由穿孔电极36与芯片封装模块10的金属层28’电连接。
图9是本发明的第二实施例的一种芯片封装模块的剖面示意图。请同时参照图7与图9,本实施例的芯片封装模块10与图7的芯片封装模块10的差异在于:本实施例的芯片封装模块10的芯片14与基板12的金属层20之间,还包括一金属凸块30,设置在基板12的金属层20与金属凸块22之间。芯片14可通过金属凸块22、金属凸块30与基板12的金属层20接合,其中金属凸块30的材料可包括焊锡合金、铜、银、铟、金、钯、钛、锰、钴或其合金,但本发明不限于此。在部分实施例中,金属凸块30不含焊锡成分。
图10是本发明的第二实施例的一种芯片封装模块的剖面示意图。请同时参照图9与图10,本实施例的芯片封装模块10与图9的芯片封装模块10的差异在于:本实施例的芯片封装模块10的芯片14与基板12的金属层20之间,还包括一金属凸块34,设置在金属凸块30与金属凸块22之间。芯片14可通过金属凸块22、金属凸块34、金属凸块30与基板12的金属层20接合,其中金属凸块22与金属凸块30可为同质金属(例如:铜)。其中金属凸块34的材料可包括焊锡合金、铜、银、铟、金、钯、钛、锰、钴或其合金,但本发明不限于此。在部分实施例中,金属凸块34不含焊锡成分。
图11至图12是本发明的第二实施例的一种电路板结构的剖面示意图。
请参照图11,在本实施例中,电路板结构100可包括电路板102以及如图7、图8、图9或图10所示的芯片封装模块10,嵌于电路板102中,本实施例是以图7的芯片封装模块10为例,并请同时参照图5与图11,本实施例的电路板结构100与图5的电路板结构100的差异在于:本实施例的电路板结构100还包括散热装置116相对于散热装置106,设置于电路板102的表面S5。芯片封装模块10还包括至少一凹槽38自芯片封装模块10的模封层16的第二表面S2穿入,其中凹槽38中填充导热材料以形成导热柱42。导热柱42连接芯片14的第四表面S4的金属层44与金属层28’。电路板结构100的电路分布层104,设置电路板102的表面S5,其中局部电路分布层104位于散热装置116与电路板102之间。散热装置116依序通过电路分布层104、导热柱121、金属层28’、导热柱42与芯片14的第四表面S4连接,可以将芯片14的热从晶背导出。在部分实施例中,导热柱121可包括例如铜、其他导热金属或其他导热材料。散热装置106与散热装置116由耐压绝缘材108与散热片110所构成。
图12是本发明的第二实施例的一种电路板结构的剖面示意图。请参照图11与图12,本实施例的电路板结构100与图11的电路板结构100的差异在于:本实施例的基板12的金属层24未露出于电路板102。亦即本实施例电路板结构100中的芯片封装模块10内埋于电路板102。金属层118设置于散热装置106与电路板102之间,金属层118利用导热柱120连接芯片封装模块10中的基板12的金属层24与散热装置106。
本发明第二实施例的电路板结构中的基板是由高散热绝缘材料层与位于其上、下两侧的导热及/或导电金属层相互堆叠而成,且于芯片的晶背处设置有专司散热功能的金属层,将芯片产生的热随即传至外部。因此,本发明一实施例的芯片封装结构具有双面散热效能(分别自晶背与基板双向散热)。
图13至图16是本发明的第三实施例的一种芯片封装模块的剖面示意图。
请同时参照图7与图13,本实施例的芯片封装模块10与图7的芯片封装模块10的差异在于:本实施例的芯片封装模块10的凹槽38数量为一个。单一凹槽38内可填充包括例如铜、其他导热金属或其他导热材料以形成导热块48。
图14是本发明的第三实施例的一种芯片封装模块的剖面示意图。请同时参照图8与图14,本实施例的芯片封装模块10与图8的芯片封装模块10的差异在于:本实施例的芯片封装模块10的凹槽38数量为一个。单一凹槽38内可填充包括例如铜、其他导热金属或其他导热材料以形成导热块48。
图15是本发明的第三实施例的一种芯片封装模块的剖面示意图。请同时参照图9与图15,本实施例的芯片封装模块10与图9的芯片封装模块10的差异在于:本实施例的芯片封装模块10的凹槽38数量为一个。单一凹槽38内可填充包括例如铜、其他导热金属或其他导热材料以形成导热块48。
图16是本发明的第三实施例的一种芯片封装模块的剖面示意图。请同时参照图10与图16,本实施例的芯片封装模块10与图10的芯片封装模块10的差异在于:本实施例的芯片封装模块10的凹槽38数量为一个。单一凹槽38内可填充包括例如铜、其他导热金属或其他导热材料以形成导热块48。
图17至图18是本发明的第三实施例的一种电路板结构的剖面示意图。
请参照图17,在本实施例中,电路板结构100可包括电路板102以及可为如图13、图14、图15或图16所示的芯片封装模块10,嵌于电路板102中,本实施例是以图13的芯片封装模块10为例,并请同时参照图11与图17,本实施例的电路板结构100与图11的电路板结构100的差异在于:本实施例的电路板结构100的凹槽38数量为一个。单一凹槽38内可填充包括例如铜、其他导热金属或其他导热材料以形成导热块48。
图18是本发明的第三实施例的一种电路板结构的剖面示意图。请同时参照图12与图18,本实施例的电路板结构100与图12的电路板结构100的差异在于:本实施例的电路板结构100的凹槽38数量为一个。单一凹槽38内可填充包括例如铜、其他导热金属或其他导热材料以形成导热块48。
由于本发明一实施例的芯片与基板间的金属-金属接合材料可不含有焊锡成分,因此,即便有较大电流通过接合处时,在此材料结构中并不易产生导致元件断路的孔洞状缺陷,相当有助于元件电性的稳定,具有耐高电流、高导电率、以及低阻抗的特性。本发明一实施例的电路板封装结构适用于大面积的异质整合量产。再者,由于本发明是将体积较小的芯片封装模块通过电路分布层的整合嵌入例如印刷电路板(PCB)的系统板中,遂使得整体封装结构的体积更加微缩,达到体积减薄的效果。
虽然结合以上实施例公开了本发明,然而其并非用以限定本发明,任何所属技术领域中具有通常知识者,在不脱离本发明的精神和范围内,可作些许的更动与润饰,故本发明的保护范围应当以附上的权利要求所界定的为准。
Claims (13)
1.一种芯片封装模块,其特征在于,包括:
模封层,具有第一表面及相对于该第一表面的第二表面;
芯片,具有第三表面及相对于该第三表面的第四表面,该芯片的该第三表面设有金属凸块,其中该芯片自该模封层的该第一表面埋入该模封层并暴露该金属凸块于该第一表面;
基板,包括金属层,其中该基板的该金属层通过该金属凸块与该芯片接合;以及
多个盲孔电极,穿入该模封层的该第二表面与该基板的该金属层电连接。
2.如权利要求1所述的芯片封装模块,其中该基板的该金属层包括铜、铝或其他金属。
3.如权利要求1所述的芯片封装模块,其中该芯片的该金属凸块包括焊锡合金、铜、银、铟、金、钯、钛、锰、钴或其合金。
4.如权利要求1所述的芯片封装模块,其中该芯片为功率芯片。
5.如权利要求4所述的芯片封装模块,其中该金属凸块不含焊锡成分。
6.如权利要求1所述的芯片封装模块,其中该芯片的第四表面包括金属层,该芯片封装模块还包括至少一凹槽,该凹槽自该模封层的该第二表面穿入,其中该至少一凹槽中填充导热材料并接触该芯片的该金属层。
7.如权利要求1所述的芯片封装模块,其中该芯片的第四表面还包括导电衬垫,该芯片封装模块还包括至少一凹槽,自该模封层的该第二表面穿入并电连接该芯片的该导电衬垫。
8.如权利要求1所述的芯片封装模块,其中该多个盲孔电极位于该芯片的周围的至少一侧。
9.一种电路板结构,其特征在于,包括:
电路板,具有电路分布层,其中该电路分布层至少设置在该电路板的一表面;以及
如权利要求1所述的芯片封装模块,嵌于该电路板中,其中该芯片封装模块的该多个盲孔电极的至少之一与该电路板的该电路分布层电连接。
10.如权利要求9所述的电路板结构,还包括:
散热装置,设置于该电路板的一表面,
其中,该芯片封装模块还包括至少一凹槽,自该芯片封装模块的该模封层的该第二表面穿入,该至少一凹槽中填充导热材料并接触该芯片的该第四表面,
其中,该散热装置热导通于该至少一凹槽。
11.如权利要求9所述的电路板结构,还包括:
散热装置,设置于该电路板的一表面,
其中,该散热装置位于该芯片封装模块的该模封层的该第一表面侧并与该芯片封装模块热导通。
12.一种芯片封装模块,其特征在于,包括:
模封层,具有第一表面及相对于该第一表面的第二表面;
芯片,具有第三表面及相对于该第三表面的第四表面,该芯片的该第三表面设有金属凸块,其中该芯片自该模封层的该第一表面埋入该模封层并暴露该金属凸块于该第一表面;
基板,包括金属层,其中该基板的该金属层通过该金属凸块与该芯片接合;以及
多个穿孔电极,穿过该模封层与该基板,并与该基板的该金属层电连接。
13.一种电路板结构,其特征在于,包括:
电路板,具有电路分布层,其中该电路分布层至少设置在该电路板的一表面;
如权利要求12所述的芯片封装模块,嵌于该电路板中,其中该芯片封装模块的该多个穿孔电极的至少之一与该电路板的该电路分布层电连接。
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US10490473B2 (en) | 2019-11-26 |
US20190237373A1 (en) | 2019-08-01 |
TW201935632A (zh) | 2019-09-01 |
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