CN1101097C - 具有印刷电路母板和多个与之连接的印刷电路子板的系统 - Google Patents

具有印刷电路母板和多个与之连接的印刷电路子板的系统 Download PDF

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Publication number
CN1101097C
CN1101097C CN96106839A CN96106839A CN1101097C CN 1101097 C CN1101097 C CN 1101097C CN 96106839 A CN96106839 A CN 96106839A CN 96106839 A CN96106839 A CN 96106839A CN 1101097 C CN1101097 C CN 1101097C
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CN
China
Prior art keywords
clock
motherboard
driver
data
inches
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
CN96106839A
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English (en)
Chinese (zh)
Other versions
CN1149238A (zh
Inventor
B·D·阿利恩
J·W·李
J·G·李
S·M·宋
G·S·李
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Publication of CN1149238A publication Critical patent/CN1149238A/zh
Application granted granted Critical
Publication of CN1101097C publication Critical patent/CN1101097C/zh
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04J—MULTIPLEX COMMUNICATION
    • H04J3/00—Time-division multiplex systems
    • H04J3/02—Details
    • H04J3/06—Synchronising arrangements
    • H04J3/0635—Clock or time synchronisation in a network
    • H04J3/0685—Clock or time synchronisation in a node; Intranode synchronisation
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/10—Distribution of clock signals, e.g. skew
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dc Digital Transmission (AREA)
CN96106839A 1995-06-07 1996-06-04 具有印刷电路母板和多个与之连接的印刷电路子板的系统 Expired - Fee Related CN1101097C (zh)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US482394 1983-04-06
US48239495A 1995-06-07 1995-06-07
US482,394 1995-06-07

Publications (2)

Publication Number Publication Date
CN1149238A CN1149238A (zh) 1997-05-07
CN1101097C true CN1101097C (zh) 2003-02-05

Family

ID=23915894

Family Applications (1)

Application Number Title Priority Date Filing Date
CN96106839A Expired - Fee Related CN1101097C (zh) 1995-06-07 1996-06-04 具有印刷电路母板和多个与之连接的印刷电路子板的系统

Country Status (4)

Country Link
JP (1) JPH09167038A (ko)
KR (1) KR970002691A (ko)
CN (1) CN1101097C (ko)
GB (1) GB2301994B (ko)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6539509B1 (en) * 1996-05-22 2003-03-25 Lsi Logic Corporation Clock skew insensitive scan chain reordering

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4084250A (en) * 1976-09-27 1978-04-11 Honeywell Information Systems Inc. Modular assembly for an electronic computer
JPS6228823A (ja) * 1985-07-31 1987-02-06 Toshiba Corp 信号切換回路
US4744076A (en) * 1986-08-06 1988-05-10 E. I. Du Pont De Nemours And Company Bus structure having constant electrical characteristics
JPH0371798A (ja) * 1989-08-11 1991-03-27 Hitachi Ltd 車載用再生装置
US5109168A (en) * 1991-02-27 1992-04-28 Sun Microsystems, Inc. Method and apparatus for the design and optimization of a balanced tree for clock distribution in computer integrated circuits
JPH04344511A (ja) * 1991-05-22 1992-12-01 Nec Commun Syst Ltd 活線挿抜方式
DE4345604B3 (de) * 1992-03-06 2012-07-12 Rambus Inc. Vorrichtung zur Kommunikation mit einem DRAM
US5446410A (en) * 1992-04-20 1995-08-29 Matsushita Electric Industrial Co.,Ltd. Semiconductor integrated circuit
JPH06274253A (ja) * 1993-03-24 1994-09-30 Matsushita Electric Ind Co Ltd ラック装置

Also Published As

Publication number Publication date
JPH09167038A (ja) 1997-06-24
GB2301994B (en) 1997-08-06
GB2301994A (en) 1996-12-18
KR970002691A (ko) 1997-01-28
CN1149238A (zh) 1997-05-07
GB9610706D0 (en) 1996-07-31

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PB01 Publication
C14 Grant of patent or utility model
GR01 Patent grant
C19 Lapse of patent right due to non-payment of the annual fee
CF01 Termination of patent right due to non-payment of annual fee