CN110098562B - 一种高速掩埋dfb半导体激光器及其制备方法 - Google Patents
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Abstract
本发明公开了一种高速掩埋DFB半导体激光器及其制备方法,该方法包括:步骤S1:材料基片生长;步骤S2:在光栅层上制备均匀光栅,并进行光栅掩埋;步骤S3:制备脊型结构,进行脊型结构的横向掩埋;步骤S4:去除脊型结构表面的二氧化硅介质层、P‑InGaAs和P‑InP,进行材料生长。该半导体激光器包括N‑InP衬底层、在N‑InP衬底层上依次生长的N‑InP缓冲层、InGaAsP下分别限制层、InGaAsP应变多量子阱层、InGaAsP‑InP多层电子阻挡层、P‑InP间隔层、P‑InGaAsP光栅层、P‑InP保护层以及在脊型结构由内到外依次生长的P‑InP层、InGaAsP‑InP多层电子阻挡层、N‑InP层和P‑InP层。该半导体及其制备方法在激光器制备时在材料外延结构和脊型掩埋上采用多层InGaAsP‑InP电子阻挡层,从而有效提高了电子的限制,改善了芯片高温工作的性能。
Description
技术领域
本发明涉及半导体激光器技术领域,具体涉及一种高速掩埋DFB半导体激光器及其制备方法。
背景技术
DFB(Distributed Feedback Laser)激光器,即分布式反馈激光器,其不同之处是内置了布拉格光栅(Bragg Grating),属于侧面发射的半导体激光器。DFB激光器最大特点是具有非常好的单色性(即光谱纯度),它的线宽普遍可以做到1MHz以内,以及具有非常高的边模抑制比(SMSR),目前可高达40-50dB以上。
DFB激光器制备中通常采用InP/InGaAsP和InP/AlGaInAs两种材料系,与InP/AlGaInAs材料系相比,InP/InGaAsP材料系激光器制备可以采用掩埋异质结结构从而有效降低室温工作下激光器的阈值并提高器件功率;然而InP/InGaAsP材料系由于其量子阱的导带差偏小、价带差偏大,使得这种结构对电子限制效率低,特别是在高温下InP/InGaAsP材料系激光器,由于电子限制性效率差,导致芯片发热严重,使得高温下的性能迅速退化。
发明内容
(一)解决的技术问题
本发明提供一种高速掩埋DFB半导体激光器及其制备方法,有效提高了电子的限制,改善了芯片高温工作的性能。
(二)技术方案
为解决上述技术问题,本发明提供如下技术方案:一种高速掩埋DFB半导体激光器的制备方法,包括以下步骤:
步骤S1:在N-InP衬底层上通过MOCVD外延依次生长N-InP缓冲层,波导结构、有源层和光栅层,完成材料基片生长;
步骤S2:在光栅层上制备均匀光栅,并进行光栅掩埋;
步骤S3:制备脊型结构,进行脊型结构的横向掩埋;
步骤S4:去除脊型结构表面的二氧化硅介质层、P-InGaAs和P-InP,进行材料生长;
步骤S5:制备芯片的双沟结构、脊型表面开孔、蒸发P面金属、减薄、蒸发N面金属、合金、解离成bar条,腔面镀膜,完成芯片的制备。
优选的,在步骤S1中,在N-InP衬底层上,通过MOCVD依次生长N-InP缓冲层、InGaAsP下分别限制层、InGaAsP应变多量子阱层、InGaAsP-InP多层电子阻挡层、P-InP间隔层、P-InGaAsP光栅层和P-InP保护层,完成基片生长。
优选的,在步骤S1中,在N-InP衬底层上,通过MOCVD外延生长1200nm N-InP缓冲层,生长50nm短波长的InGaAsP波导限制层,生长10层应变多量子阱InGaAsP层,生长3层低掺杂P-InGaAsP/P-InP(5nm/5nm)电子阻挡层,生长80nm P-InP间隔层,生长波长为35nm的P-InGaAsP光栅层,生长10nm P-InP保护层,完成基片生长。
优选的,在步骤S2中,采用全息方法制备均匀光栅层,接着在外延炉中生长P-InP层、P-InGaAs层、P-InP层完成光栅掩埋。
优选的,在步骤S2中,外延炉中生长生长50nm P-InP,50nm P-InGaAs,50nm P-InP完成光栅掩埋。
优选的,在步骤S3中,在光栅表面生长SiO2介质层,光刻制备脊型波导结构,腐蚀形成脊型结构;接着在外延炉中依次生长:P-InP层,P-InGaAsP/P-InP(5nm/5nm)电子阻挡层,N-InP层,P-InP层完成脊型掩埋生长。
优选的,在步骤S3中,在光栅覆盖层表面生长400nm SiO2介质层,光刻并采用溴素系腐蚀液腐蚀形成脊型结构,接着在MOCVD中低温低速生长500nm低掺杂P-InP层,3层低掺杂P-InGaAsP/P-InP(5nm/5nm)电子阻挡层,500nm低掺杂N-InP层,200nm低掺杂P-InP层完成脊型结构的掩埋生长。
优选的,在步骤S4中,去除脊型结构表面的SiO2介质层、P-InGaAs层和P-InP层,在MOCVD中依次生长:掺杂浓度依次增高的P-InP层、P-InGaAsP过渡层和重掺杂P-InGaAs欧姆接触层,完成材料生长。
优选的,在步骤S4中,去除脊型结构表面的SiO2介质层、P-InGaAs层和P-InP层,在MOCVD中依次生长:掺杂浓度由小到大呈梯度分布的1.8微米P-InP层,50nm P-InGaAsP过渡层和250nm的重掺杂P-InGaAs欧姆接触层,完成材料生长。
优选的,在步骤S5中,以SiO2作为介质层,光刻腐蚀形成掩埋结构激光器的双沟,双沟间的台面宽度在20至25微米之间;去除介质层,生长SiO2钝化层,进行脊型表面开孔,蒸发Ti/Pt/Au P面金属,减薄N面至厚度为110微米,N面蒸发Ti/Pt/Au金属,在N2氛围420℃温度下,合金35s;将激光器解离成bar条,腔长为200微米,出光和背光端面分别蒸镀反射率低于1%和高于93%的高透和高反膜,完成激光器芯片的制备。
为解决上述技术问题,本发明还提供了一种高速掩埋DFB半导体激光器,包括N-InP衬底层、在N-InP衬底层上依次生长的N-InP缓冲层、InGaAsP下分别限制层、InGaAsP应变多量子阱层、InGaAsP-InP多层电子阻挡层、P-InP间隔层、P-InGaAsP光栅层、P-InP保护层;还包括在脊型结构由内到外依次生长的P-InP层、InGaAsP-InP多层电子阻挡层、N-InP层和P-InP层。
(三)有益效果
本发明专利的高速掩埋DFB半导体激光器在材料外延结构和脊型掩埋上采用多层InGaAsP-InP电子阻挡层来实现载流子水平和垂直方向的限制,从而提高芯片的高温性能,提高高温调制带宽;其制备方法有效提高了电子的限制,改善了芯片高温工作的性能。
附图说明
图1为本发明高速掩埋DFB半导体激光器的结构示意图。
具体实施方式
下面将结合附图和本发明实施例,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
参阅图1所示,图1为本发明高速掩埋DFB半导体激光器的结构示意图。
本发明提供的一种高速掩埋DFB半导体激光器的制备方法,步骤如下:
步骤S1,在N-InP衬底层1上通过MOCVD外延依次生长N-InP缓冲层2,波导结构、有源层和光栅层,具体的,在N-InP衬底层1上,通过MOCVD技术(金属有机化学汽相沉积法)外延生长1200nm N-InP缓冲层2,生长50nm短波长下分别限制InGaAsP层3,生长10层应变多量子阱InGaAsP层4,生长InGaAsP-InP多层电子阻挡层5,生长80nm P-InP间隔层6,生长35nmP-InGaAsP光栅层7,生长10nm P-InP保护层8,形成外延结构,完成基片生长;其中,InGaAsP-InP多层电子阻挡层为3层低掺杂P-InGaAsP/P-InP(5nm/5nm)电子阻挡层。
步骤S2,在P-InGaAsP光栅层7上制备均匀光栅,并进行光栅掩埋,具体的,在片子表面光栅层上制备均匀光栅,接着依次生长50nm P-InP层,50nm P-InGaAs层,50nm P-InP层完成光栅覆盖层生长。
步骤S3,制备脊型结构,进行脊型结构的横向掩埋,具体的,在光栅覆盖层上生长400nm SiO2介质层,常规光刻并采用溴素系腐蚀液腐蚀半导体材料形成脊型结构,接着在MOCVD中低温低速生长500nm低掺杂P-InP层9,3层低掺杂P-InGaAsP/P-InP(5nm/5nm)电子阻挡层10,500nm低掺杂N-InP层11,200nm低掺杂P-InP层12完成脊型结构掩埋生长。
步骤S4,去除脊型结构表面的二氧化硅介质层、P-InGaAs和P-InP,进行材料生长。具体的,去除片子表面SiO2介质层、P-InGaAs和P-InP,在MOCVD中依次生长:掺杂浓度依次增高的P-InP层,50nm P-InGaAsP过渡层,250nm的重掺杂P-InGaAs欧姆接触层在,完成材料生长,其中P-InP层的掺杂浓度由小到大呈梯度分布且为1.8微米,如:由600nm低掺杂P-InP,1200nm掺杂浓度依次增高的P-InP组成。
步骤S5,接着制备芯片的双沟结构、脊型表面开孔、蒸发P面金属、减薄、蒸发N面金属、合金;解离成bar条,腔面镀膜,完成芯片的制备;具体的,以SiO2作为介质层,光刻腐蚀形成掩埋结构激光器的双沟,双沟间的台面宽度在20至25微米之间;去除介质层,生长SiO2钝化层,进行脊型表面开孔,蒸发Ti/Pt/Au P面金属,减薄N面至厚度为110微米,N面蒸发Ti/Pt/Au金属,在N2氛围420℃温度下,合金35s;将激光器解离成bar条,腔长为200微米,出光和背光端面分别蒸镀反射率低于1%和高于93%的高透和高反膜,完成激光器芯片的制备。
该高速掩埋DFB半导体激光器的制备方法有效提高了电子的限制,改善了芯片高温工作的性能。
为解决上述技术问题,本发明还提供了一种高速掩埋DFB半导体激光器,包括N-InP衬底层1、在N-InP衬底层1上依次生长的N-InP缓冲层2、InGaAsP下分别限制层3、InGaAsP应变多量子阱层4、InGaAsP-InP多层电子阻挡层5、P-InP间隔层6、P-InGaAsP光栅层7、P-InP保护层8以及在脊型结构由内到外依次生长的P-InP层9、InGaAsP-InP多层电子阻挡层10、N-InP层11和P-InP层12。
其中,N-InP缓冲层2的厚度为1200nm,下分别限制InGaAsP层3的厚度为50nm,应变多量子阱InGaAsP层的层数为10层,InGaAsP-InP多层电子阻挡层5为3层低掺杂P-InGaAsP/P-InP(5nm/5nm)电子阻挡层,生长80nm P-InP间隔层6,P-InGaAsP光栅层7的厚度为35nm,InGaAsP-InP多层电子阻挡层10为层数为3层的低掺杂P-InGaAsP/P-InP(5nm/5nm)电子阻挡层,P-InP保护层8的厚度为10nm,低掺杂P-InP层9的厚度为500nm,低掺杂N-InP层11的厚度为500nm,低掺杂P-InP层12的厚度为200nm。
本发明的高速掩埋DFB半导体激光器采用在外延结构和脊型掩埋时增加多层InGaAsP-InP电子阻挡层来实现载流子的水平方向和垂直方向的限制效率,从而有效改善激光器的高温性能,提升高温调制带宽。
尽管已经示出和描述了本发明的实施例,对于本领域的普通技术人员而言,可以理解在不脱离本发明的原理和精神的情况下可以对这些实施例进行多种变化、修改、替换和变型,本发明的范围由所附权利要求及其等同物限定。
Claims (10)
1.一种高速掩埋DFB半导体激光器的制备方法,其特征在于,包括以下步骤:
步骤S1:在N-InP衬底层上通过MOCVD外延依次生长N-InP缓冲层,波导结构、有源层和光栅层,完成材料基片生长;
步骤S2:在光栅层上制备均匀光栅,并进行光栅掩埋;
步骤S3:制备脊型结构,进行脊型结构的横向掩埋;
步骤S4:去除脊型结构表面的二氧化硅介质层、P-InGaAs和P-InP,进行材料生长;
步骤S5:制备芯片的双沟结构、脊型表面开孔、蒸发P面金属、减薄、蒸发N面金属、合金、解离成bar条,腔面镀膜,完成芯片的制备;
其中,在步骤S1中,在N-InP衬底层上,通过MOCVD生长InGaAsP-InP多层电子阻挡层。
2.根据权利要求1所述的高速掩埋DFB半导体激光器的制备方法,其特征在于:在步骤S1中,在N-InP衬底层上,通过MOCVD依次生长N-InP缓冲层、InGaAsP下分别限制层、InGaAsP应变多量子阱层、InGaAsP-InP多层电子阻挡层、P-InP间隔层、P-InGaAsP光栅层和P-InP保护层,完成基片生长。
3.根据权利要求2所述的高速掩埋DFB半导体激光器的制备方法,其特征在于:在步骤S1中,在N-InP衬底层上,通过MOCVD外延生长1200nm N-InP缓冲层,生长50nm短波长的InGaAsP波导限制层,生长10层应变多量子阱InGaAsP层,生长3层低掺杂P-InGaAsP/P-InP(5nm/5nm)电子阻挡层,生长80nm P-InP间隔层,生长波长为35nm的P-InGaAsP光栅层,生长10nm P-InP保护层,完成基片生长。
4.根据权利要求1所述的高速掩埋DFB半导体激光器的制备方法,其特征在于:在步骤S2中,采用全息方法制备均匀光栅,接着在外延炉中生长50nm P-InP,50nm P-InGaAs,50nmP-InP完成光栅掩埋。
5.根据权利要求1所述的高速掩埋DFB半导体激光器的制备方法,其特征在于:在步骤S3中,在光栅表面生长SiO2介质层,光刻制备脊型波导结构,腐蚀形成脊型结构;接着在外延炉中依次生长:P-InP层,P-InGaAsP/P-InP(5nm/5nm)电子阻挡层,N-InP层,P-InP层完成脊型掩埋生长。
6.根据权利要求5所述的高速掩埋DFB半导体激光器的制备方法,其特征在于:在步骤S3中,在光栅覆盖层表面生长400nm SiO2介质层,光刻并采用溴素系腐蚀液腐蚀形成脊型结构,接着在MOCVD中低温低速生长500nm低掺杂P-InP层,3层低掺杂P-InGaAsP/P-InP(5nm/5nm)电子阻挡层,500nm低掺杂N-InP层,200nm低掺杂P-InP层完成脊型结构的掩埋生长。
7.根据权利要求1所述的高速掩埋DFB半导体激光器的制备方法,其特征在于:在步骤S4中,去除脊型结构表面的SiO2介质层、P-InGaAs层和P-InP层,在MOCVD中依次生长:掺杂浓度依次增高的P-InP层、P-InGaAsP过渡层和重掺杂P-InGaAs欧姆接触层,完成材料生长。
8.根据权利要求1所述的高速掩埋DFB半导体激光器的制备方法,其特征在于:在步骤S4中,去除脊型结构表面的SiO2介质层、P-InGaAs层和P-InP层,在MOCVD中依次生长:掺杂浓度由小到大呈梯度分布的1.8微米P-InP层,50nm P-InGaAsP过渡层和250nm的重掺杂P-InGaAs欧姆接触层,完成材料生长。
9.根据权利要求1所述的高速掩埋DFB半导体激光器的制备方法,其特征在于:在步骤S5中,以SiO2作为介质层,光刻腐蚀形成掩埋结构激光器的双沟,双沟间的台面宽度在20至25微米之间;去除介质层,生长SiO2钝化层,进行脊型表面开孔,蒸发Ti/Pt/Au P面金属,减薄N面至厚度为110微米,N面蒸发Ti/Pt/Au金属,在N2氛围420℃温度下,合金35s;将激光器解离成bar条,腔长为200微米,出光和背光端面分别蒸镀反射率低于1%和高于93%的高透和高反膜,完成激光器芯片的制备。
10.一种根据如权利要求1至9中任一项所述的高速掩埋DFB半导体激光器的制备方法制得的DFB半导体激光器,其特征在于,包括N-InP衬底层、在N-InP衬底层上依次生长的N-InP缓冲层、InGaAsP下分别限制层、InGaAsP应变多量子阱层、InGaAsP-InP多层电子阻挡层、P-InP间隔层、P-InGaAsP光栅层、P-InP保护层;还包括在脊型结构由内到外依次生长的P-InP层、InGaAsP-InP多层电子阻挡层、N-InP层和P-InP层。
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