CN110098130A - A kind of system-in-a-package method and packaging - Google Patents
A kind of system-in-a-package method and packaging Download PDFInfo
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- CN110098130A CN110098130A CN201910189755.3A CN201910189755A CN110098130A CN 110098130 A CN110098130 A CN 110098130A CN 201910189755 A CN201910189755 A CN 201910189755A CN 110098130 A CN110098130 A CN 110098130A
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- magnetic screen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
- H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/552—Protection against radiation, e.g. light or electromagnetic waves
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
Abstract
This application discloses a kind of system-in-a-package method and packagings, the packaging method includes: to form the first electro-magnetic screen layer in the non-functional surface of chip and the side adjacent with the non-functional surface, and first electro-magnetic screen layer is electrically connected with the first ground pad on the functional surfaces of the chip；By at least one described flip-chip in the first surface of substrate, the functional surfaces are towards the first surface, wherein the first surface is provided with the second exposed ground pad, the substrate is internally provided with ground plane, and second ground pad is electrically connected with the ground plane；Conducting connecting part is formed in the first surface, one end of the conducting connecting part is electrically connected with first electro-magnetic screen layer, and the other end of the conducting connecting part is electrically connected with second ground pad.By the above-mentioned means, the application can simplify the manufacture craft for realizing chip chamber electromagnetic shielding.
Description
Technical field
This application involves technical field of semiconductors, more particularly to a kind of system-in-a-package method and packaging.
Background technique
System in package (system in package, SiP) is by a variety of different types of chips (for example, high-speed figure
Circuit, analog circuit, radio circuit etc.) it is encapsulated in a packaging to realize high integration requirement.Due between chip
Distance it is more and more closer, the electromagnetic interference problem of chip chamber is more prominent.
For the electromagnetic interference problem for solving chip chamber, Albert Lin et al. is in article " electrical
performance characterization for novel multiple compartments shielding and
Propose a kind of solution in verification on LTE modem SiP ": first to whole system grade packaging into
Then row plastic packaging goes out groove using laser-induced thermal etching, finally fill groove with electromagnetic shielding materials such as conducting resinls, to realize and be
Electromagnetic shielding in irrespective of size packaging between multiple chips.
Present inventor has found in chronic study procedure, needs to go out groove using laser-induced thermal etching in the above method,
The process is more complicated for it.
Summary of the invention
The application can simplify and realize chip chamber electricity mainly solving the technical problems that provide a kind of system-in-a-package method
The manufacture craft of magnetic screen.
In order to solve the above technical problems, the technical solution that the application uses is: a kind of system-in-a-package method is provided,
The packaging method includes: to form the first electromagnetic shielding in the non-functional surface of chip and the side adjacent with the non-functional surface
Layer, first electro-magnetic screen layer are electrically connected with the first ground pad on the functional surfaces of the chip；Described at least one
Flip-chip is in the first surface of substrate, and the functional surfaces are towards the first surface, wherein the first surface is provided with outer
Second ground pad of dew, the substrate are internally provided with ground plane, and second ground pad is electrically connected with the ground plane；
Conducting connecting part is formed in the first surface, one end of the conducting connecting part is electrically connected with first electro-magnetic screen layer,
The other end of the conducting connecting part is electrically connected with second ground pad.
Wherein, described to form the first electromagnetic shielding in the non-functional surface of chip and the side adjacent with the non-functional surface
Before layer, the packaging method further include: provide disk, the disk is equipped with the chip of several matrix arrangements, the circle
Position of the piece between the chip is equipped with scribe line；Grounded circuit is formed on the functional surfaces of the chip, it is described to connect
One end of ground access is electrically connected with first ground pad, and the other end of the grounded circuit extends to and first ground connection
The adjacent scribe line of pad；Cut along the scribe line of the disk, the other end of the grounded circuit with
The side of the chip flushes.
Wherein, before the scribe line to the disk is cut, the packaging method further include: described
First protective film is set on grounded circuit；Metal salient point is formed on all pads for being located at the functional surfaces；Remove described
One protective film.
Wherein, described to form the first electromagnetism in the non-functional surface of chip and the side adjacent with the non-functional surface
Shielded layer, comprising: provide fixed fixture, the fixed fixture includes through-hole, and the edge of the through-hole is provided with the second protective film；
The chip is placed in the fixed fixture, and the metal salient point of the chip is corresponding with the through-hole, it is described to connect
Ground access is contacted with second protective film；It is sputtered in the non-functional surface of the chip and the side of the chip
Form first electro-magnetic screen layer.
Wherein, before the scribe line along the disk is cut, the packaging method further include: in institute
State and form insulating layer on the functional surfaces of chip, the insulating layer is flushed with the metal salient point, and the metal salient point from
Expose in the insulating layer；Alternatively, described form conducting connecting part in the first surface, before, the packaging method is also wrapped
It includes: forming insulating layer between the functional surfaces and the first surface of the chip, the side of the insulating layer is inclination
Face.
Wherein, the packaging method further include: form plastic packaging layer, the plastic packaging layer in the first surface of the substrate
Cover at least one described chip；The second electro-magnetic screen layer is formed on the surface of the plastic packaging layer and the side of the substrate,
Wherein, the both ends of the ground plane are exposed from the side of the substrate, second electro-magnetic screen layer and the ground plane
Electrical connection.
In order to solve the above technical problems, another technical solution that the application uses is: providing a kind of system in package device
Part, the packaging includes: at least one chip, including the functional surfaces being disposed opposite to each other and non-functional surface, on the functional surfaces
It is provided with the first ground pad；Substrate, for carrying the chip, the substrate includes the first surface being disposed opposite to each other and second
Surface, the first surface are provided with the second exposed ground pad, and the substrate is internally provided with ground plane, and described second connects
Ground pad is electrically connected with the ground plane；Wherein, the functional surfaces are towards the first surface；First electro-magnetic screen layer, covering
The non-functional surface of the chip and the side adjacent with the non-functional surface, and first electro-magnetic screen layer and described first
Ground pad electrical connection；Conducting connecting part, positioned at the first surface of the substrate, one end of the conducting connecting part and institute
The electrical connection of the first electro-magnetic screen layer is stated, the other end of the conducting connecting part is electrically connected with second ground pad.
Wherein, the functional surfaces of the chip are additionally provided with grounded circuit, one end of the grounded circuit and described the
The electrical connection of one ground pad, another end surfaces of the grounded circuit are flushed with the side of the chip, first electricity
Magnetic masking layer covers another end surfaces of the grounded circuit.
Wherein, the packaging further include: insulating layer fills the functional surfaces of the chip and the institute of the substrate
The region between first surface is stated, the side of the insulating layer is inclined surface, and the conducting connecting part extends along the inclined surface.
Wherein, the functional surfaces of the chip are additionally provided with metal salient point, and the metal salient point is grounded from described first
Bond pad surface extends；And/or the packaging further include: plastic packaging layer, the plastic packaging layer cover first electro-magnetic screen layer
Outer surface and the substrate the first surface；Second electro-magnetic screen layer, second electro-magnetic screen layer cover the modeling
The outer surface of sealing and the side of the substrate；Wherein, the both ends of the ground plane are exposed from the side of the substrate,
Second electro-magnetic screen layer is electrically connected with the ground plane；And/or second ground pad of the substrate connects with described
It is provided with via hole between stratum, is filled with conductive material in the via hole.
The beneficial effect of the application is: being in contrast to the prior art, system-in-a-package method provided herein
In include: that first screen layer is formed on the adjacent side of the non-functional surface of chip and nand function face, first screen layer with
The first ground pad electrical connection on chip；On the first surface of the substrate by least one flip-chip；In first surface shape
At conducting connecting part, one end of conducting connecting part is electrically connected with the first electro-magnetic screen layer, the other end and substrate of conducting connecting part
Upper exposed the second ground pad electrical connection.Since the second ground pad is electrically connected with the ground plane inside substrate, pass through
Conducting connecting part can make the first electro-magnetic screen layer, conducting connecting part, ground plane form a closed circuit, to realize and be
Electromagnetic shielding in irrespective of size packaging between multiple chips.Compared with prior art, the application is not necessarily to laser slotting and conduction
Glue filling, simple process is easily achieved, and shield effectiveness is preferable.
Detailed description of the invention
In order to more clearly explain the technical solutions in the embodiments of the present application, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, the drawings in the following description are only some examples of the present application, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.Wherein:
Fig. 1 is the flow diagram of one embodiment of the application system-in-a-package method；
Fig. 2 is the structural schematic diagram of the corresponding embodiment of step S101- step S105 in Fig. 1；
Fig. 3 is the flow diagram of one embodiment of the application system-in-a-package method before step S101 in Fig. 1；
Fig. 4 is the structural schematic diagram of mono- embodiment of step S201- step S203 in Fig. 3；
Fig. 5 is the structural schematic diagram of the corresponding another embodiment of step S102 in Fig. 1；
Fig. 6 is the structural schematic diagram of one embodiment of the application system in package device；
Fig. 7 is the structural schematic diagram of another embodiment of the application system in package device.
Specific embodiment
Below in conjunction with the attached drawing in the embodiment of the present application, technical solutions in the embodiments of the present application carries out clear, complete
Site preparation description, it is clear that described embodiments are only a part of embodiments of the present application, rather than whole embodiments.Based on this
Embodiment in application, those of ordinary skill in the art are obtained every other under the premise of not making creative labor
Embodiment shall fall in the protection scope of this application.
Fig. 1-Fig. 2 is please referred to, Fig. 1 is the flow diagram of one embodiment of the application system-in-a-package method, and Fig. 2 is figure
The structural schematic diagram of the corresponding embodiment of step S101- step S105, the packaging method include: in 1
S101: the first electromagnetism is formed in the adjacent side 128 of the non-functional surface 120 of chip 12 and nand function face 120
Shielded layer 16, the first electro-magnetic screen layer 16 are electrically connected with the first ground pad 124 on the functional surfaces 120 of chip 12.
Specifically, Fig. 2 a is please referred to, the number of the first ground pad 124 being arranged on the functional surfaces 120 of chip 12 can be with
For one or more, can be configured according to actual needs.For example, working as some on chip 12 or multiple functional areas moulds
When block is electromagnetically shielded, then the first ground pad 124 can be set in the functional areas module.In addition, the function of chip 12
Other pads are additionally provided on face 120.
In the present embodiment, chip 12 can be cut by disk 20 and be formed, and as shown in Figure 3 and Figure 4, Fig. 3 is step in Fig. 1
The flow diagram of one embodiment of the application system-in-a-package method before S101, Fig. 4 are step S201- step in Fig. 3
The structural schematic diagram of mono- embodiment of S203.
S201: providing disk 20, and disk 20 is equipped with the chip 12 of several matrix arrangements, position of the disk 20 between chip 12
Scribe line 14 is installed.
Specifically, as shown in fig. 4 a, in the present embodiment, first there are four can be set on the functional surfaces 120 of chip 12
Ground pad 124, four the first ground pads 124 can be symmetrical arranged, asymmetric can also be arranged, the application does not limit this
It is fixed.
S202: on the functional surfaces 120 of chip 12 formed grounded circuit 126, one end (not indicating) of grounded circuit 126 with
The electrical connection of first ground pad 124, the other end (not indicating) of grounded circuit 126 extends to adjacent with the first ground pad 124
Scribe line 14.
Specifically, as shown in Figure 4 b, the method for forming grounded circuit 126 can be the mode being routed again similar to metal,
For example, can need to pay attention to when forming grounded circuit 126 and be carried out with the functional surfaces 120 of chip 12 using the method etc. of sputtering
It is dielectrically separated from.
In addition, in the present embodiment, two neighboring chip 12a, 12b are respectively provided with the first grounded circuit 126a and second and connect
Ground access 126b, the first grounded circuit 126a and the second grounded circuit 126b are oppositely arranged, and can be with stacked on top or end
Contact.
In addition, packaging method provided herein can also include: to connect after above-mentioned formation grounded circuit 126
First protective film (for example, polyimides PI film etc.) is set on ground access 126；The shape on all pads for being located at functional surfaces 120
At metal salient point 121；Remove the first protective film.Wherein, above-mentioned all pads include the first ground pad 124 and functional surfaces
Other pads on 120.
S203: being cut along the scribe line 14 of disk 20, the other end of grounded circuit 126 and the side of chip 12
128 flush.
Specifically, as illustrated in fig. 4 c and shown in 2a, in the present embodiment, can use cutter or laser etc. to be cut
It cuts.
In addition, in the present embodiment, the material of above-mentioned first electro-magnetic screen layer 16 is metal, for example, aluminium, copper, chromium, gold,
At least one of silver, nickel, solder.The surface that first electro-magnetic screen layer 16 exposes with grounded circuit 126 from the side of chip 12 128
Electrical connection, so that the first electro-magnetic screen layer 16 is electrically connected with the first ground pad 124.Certainly, in other embodiments,
The first electro-magnetic screen layer 16 can be made to extend to the functional surfaces 120 of chip 12, and then realize and be electrically connected with the first ground pad 124.
In an application scenarios, above-mentioned steps S101 is specifically included: providing fixed fixture 30, fixed fixture 30 includes logical
Hole 300, the edge of through-hole 300 are provided with the second protective film 32 (for example, polyimides PI film etc.)；Chip 12 is placed in fixation
On jig 30, and the metal salient point 121 of chip 12 is corresponding with through-hole 300, and grounded circuit 126 is contacted with the second protective film 32；?
The non-functional surface 122 of chip 12 and the sputtering of side 128 of chip 12 form the first electro-magnetic screen layer 16.The gold of said chip 12
Category salient point 121 is corresponding with through-hole 300, i.e. orthographic projection of the metal salient point 121 on the surface of fixed fixture 30 is located at through-hole 300
Interior, which can protect metal salient point 121, reduce the probability of its damage.
Certainly, in other application scenarios, the implementation of above-mentioned steps S101 can also be other, for example, can first exist
Second protective film 32 is set on the functional surfaces 120 of chip 12, and the second protective film 32 covers the edge of chip 12；Then by chip 12
It is placed in fixed fixture 30；Finally in the side 128 of the non-functional surface 122 of chip 12 and chip 12, sputtering forms the first electricity
Magnetic masking layer 16.
S102: by least one 12 upside-down mounting of chip in the first surface 100 of substrate 10, functional surfaces 120 are towards first surface
100, wherein first surface 100 is provided with the second exposed ground pad 104, and substrate 10 is internally provided with ground plane 106, the
Two ground pads 104 are electrically connected with ground plane 106.
Specifically, as shown in Figure 2 b, which can directly be provided by upstream producer, and substrate 10 includes the be disposed opposite to each other
One surface 100 and second surface 102；The material of ground plane 106 can be metal, quantity can be one layer or multilayer, and
The both ends of ground plane 106 can be flushed with the side 108 of substrate 10, i.e. the both ends of ground plane 106 expose to substrate 10.In this reality
It applies in example, it, can be in the second ground pad 104 and ground plane 106 to be electrically connected the second ground pad 104 with ground plane 106
Between via hole 101 is set, conductive material, conductive material, the second ground pad 104, ground plane can be filled inside via hole 101
106 electrical connections.
S103: conducting connecting part 18, one end of conducting connecting part 18 and the first electro-magnetic screen layer are formed in first surface 100
16 electrical connections, the other end of conducting connecting part 18 are electrically connected with the second ground pad 104.
Specifically, as shown in Figure 2 c, the metal salient point will to be formed on all pads or all pads on chip 12
121 are electrically insulated with conducting connecting part 18, to reduce the probability that short circuit occurs for chip 12, before above-mentioned steps S103, the application institute
The packaging method of offer further include: insulating layer 11, insulating layer are formed between the functional surfaces 120 and first surface 100 of chip 12
11 side 110 is inclined surface.Wherein, insulating layer 11 can be insulating cement (for example, epoxy resin etc.), and insulating cement was being filled
The periphery of chip 12 is spilt into journey, and forms the inclined surface with certain slope.When conducting connecting part 18 is conducting resinl, on
Stating step S103 includes: to form conducting resinl using modes such as dispensings on inclined surface.This application claims conducting resinls to have centainly
Stickiness, i.e. conducting resinl can be attached to the surface of insulating layer 11, reduce conducting resinl and 16 poor contact of the first electro-magnetic screen layer or
The probability of the first surface 100 of person's conduction glue stain substrate 10.
In the above-described embodiments, insulating layer 11 is formed after chip 12 is inverted on first surface 100, in other realities
It applies in example, insulating layer 11 can also be pre-formed, i.e., formed before chip 12 is inverted in first surface 100；For example, such as Fig. 5 institute
Show, in above-mentioned steps S203 before the scribe line 14 to disk 20 is cut, packaging method provided herein is also wrapped
It includes: forming insulating layer 11a on the functional surfaces 120 of chip 12, insulating layer 11a is flushed with metal salient point 121, and metal salient point
Expose from insulating layer 11a on 121 surfaces flushed with insulating layer 11a；The mode for forming insulating layer 11a at this time can be for wafer
Insulating cement by the way of insulating cement pressing, i.e., is depressed into and is in same horizontal line with metal salient point 121, for metal salient point by 20
The insulating cement adhered on 121 can be removed using modes such as grinding, scrapers.And it is cut in the subsequent scribe line 14 to disk 20
After cutting, the side 110a of insulating layer 11a is vertical with functional surfaces 120, and the side 1260 of grounded circuit 126 is from insulating layer 11a
Middle exposing.
In order to enhance the protection to whole system grade packaging, packaging method provided herein further include: S104:
Plastic packaging layer 13 is formed in the first surface 100 of substrate 10, plastic packaging layer 13 covers at least one chip 12.Specifically, such as Fig. 2 d institute
Show, the material of plastic packaging layer 13 can be epoxy resin etc.；Plastic packaging layer 13 can not only play the role of protection, can also increase and be
The heat dissipation of irrespective of size packaging.Plastic packaging layer 13 fills the gap between adjacent chips 12, and covers the first electro-magnetic screen layer 16
Outer surface 160.
In order to be electromagnetically shielded whole realize with external environment of system in package device, method provided herein may be used also
To include: S105: forming the second electro-magnetic screen layer 15 in the outer surface of plastic packaging layer 13 130 and the side of substrate 10 108.Specifically
Ground, as shown in Figure 2 e, the outer surface 130 of plastic packaging layer 13 refer to the surface not covered by substrate 10.Second electro-magnetic screen layer 15
Material can be metal, for example, at least one of aluminium, copper, chromium, gold, silver, nickel, solder.Form the side of the second electro-magnetic screen layer 15
Method can be spray coating method, galvanoplastic, sputtering method etc..In the present embodiment, the both ends of the ground plane 106 inside substrate 10 from
The side 108 of substrate 10 is exposed, so that the second electro-magnetic screen layer 15 is electrically connected with ground plane 106, to realize system-level envelope
Fill the whole electromagnetic shielding with external environment of device.
Below from structural point, system in package device provided herein is further described.Referring to Fig. 6,
Fig. 6 is the structural schematic diagram of one embodiment of the application system in package device, system in package device provided herein
Include:
At least one chip 12 is provided on functional surfaces 120 including the functional surfaces 120 being disposed opposite to each other and non-functional surface 122
First ground pad 124.In the present embodiment, it is also set up other than being provided with the first ground pad 124 on functional surfaces 120
There are other pads and metal salient point 121, the corresponding metal salient point 121 of a pad, 121 self-brazing panel surface of metal salient point is prolonged
It stretches, chip 12 is electrically connected by metal salient point 121 with substrate 10.In addition, the functional surfaces 120 of chip 12 are additionally provided with grounded circuit
126, one end of grounded circuit 126 is electrically connected with the first ground pad 124, another end surfaces and chip 12 of grounded circuit 126
Side 128 flush, the material of grounded circuit 126 can be metal.
Substrate 10, for carrying at least one component, for example, at least one chip 12, chip 12 uses the side of upside-down mounting
Formula and substrate 10 are fixed.Substrate 10 includes the first surface 100 and second surface 102 being disposed opposite to each other, the functional surfaces 12 of chip 12
Towards first surface 100, first surface 100 is provided with the second exposed ground pad 104, and substrate 10 is internally provided with ground plane
106, the second ground pad 104 is electrically connected with ground plane 106.In the present embodiment, the second ground pad 104 of substrate 10 with connect
It is provided with via hole 101 between stratum 106, is filled with conductive material in via hole 101, by conductive material so that the second ground connection weldering
Disk 104 is electrically connected with ground plane 106.
First electro-magnetic screen layer 16 covers the non-functional surface 122 of chip 12 and the side that nand function face 122 is adjacent
128, and the first electro-magnetic screen layer 16 is electrically connected with the first ground pad 124；In the present embodiment, first electro-magnetic screen layer 16
Material can be metal, for example, such as at least one of aluminium, copper, chromium, gold, silver, nickel, solder.The covering of first electro-magnetic screen layer 16
Another end surfaces of grounded circuit 126, so that the first electro-magnetic screen layer 16 passes through grounded circuit 126 and the first ground pad
124 electrical connections.
Conducting connecting part 18, positioned at the first surface 100 of substrate 10, one end of conducting connecting part 18 and the first electromagnetic shielding
Layer 16 is electrically connected, and the other end of conducting connecting part 18 is electrically connected with the second ground pad 104.Due to the second ground pad 104 with
Ground plane 106 inside substrate 10 is electrically connected, and therefore, can make the first electro-magnetic screen layer 16, conduction by conducting connecting part 18
Connector 18, ground plane 106 form a closed circuit, to realize in system in package device between multiple chips 12
Electromagnetic shielding.Compared with prior art, the application is not necessarily to laser slotting and conductive paste, and simple process is easily achieved, and shields
It is preferable to cover effect.
In an application scenarios, extend to reduce all pads or the self-brazing panel surface of conducting connecting part 18 and chip 12
Metal salient point 121 occur short circuit probability, system in package device provided herein further include: insulating layer 11, filling
The side 110 in the region between the functional surfaces 120 of chip 12 and the first surface 100 of substrate 10, insulating layer 11 is inclined surface, is led
Electrical connector 18 extends along inclined surface.
In another application scenarios, referring to Fig. 7, Fig. 7 is another embodiment of the application system in package device
Structural schematic diagram.The side 110a of insulating layer 11a can also be perpendicular to first surface 100.In Fig. 7 the first electro-magnetic screen layer 16 with absolutely
The side 110a of edge layer 11a is not contacted, and certainly, the first electro-magnetic screen layer 16 can also extend to the side with insulating layer 11a
110a contact.
In another application scenarios, to increase the protection to system in package device, please continue to refer to Fig. 6, the application
Provided system in package device further include: plastic packaging layer 13, plastic packaging layer 13 cover the outer surface (figure of the first electro-magnetic screen layer 16
Do not indicated in 6) and substrate 10 first surface 100, the region between adjacent chips 12 is filled by plastic packaging layer 13；Plastic packaging layer 13
Material can be epoxy resin etc..
In another application scenarios, in order to realize the electromagnetic shielding of system in package device and external environment, the application
Provided system in package device further include: the second electro-magnetic screen layer 15, the second electro-magnetic screen layer 15 cover plastic packaging layer 13
Outer surface 130 and the side of substrate 10 108；Wherein, the both ends of ground plane 106 are exposed from the side of substrate 10 108, the second electricity
Magnetic masking layer 15 is electrically connected with ground plane 106.
Certainly, in other embodiments, the mode that formal dress can also be used in the chip 12c in system in package device is arranged in
On substrate 10；As shown in fig. 6, chip 12c needs first to carry out plastic packaging at this time, the then shape on the first plastic packaging layer 13a of chip 12c
At third electro-magnetic screen layer 16a；Carry out the whole plastic packaging of system in package device again later.If chip 12c is without carrying out electricity
Magnetic screen, then no setting is required third electro-magnetic screen layer 16a, at this time without carrying out plastic packaging to chip 12c in advance, the later period carries out whole
Plastic packaging.
In addition, in the present embodiment, other also settable components on the substrate 10 in system in package device, for example,
Resistance, capacitor etc..
The foregoing is merely presently filed embodiments, are not intended to limit the scope of the patents of the application, all to utilize this
Equivalent structure or equivalent flow shift made by application specification and accompanying drawing content, it is relevant to be applied directly or indirectly in other
Technical field similarly includes in the scope of patent protection of the application.
Claims (10)
1. a kind of system-in-a-package method, which is characterized in that the packaging method includes:
The first electro-magnetic screen layer, first electricity are formed in the non-functional surface of chip and the side adjacent with the non-functional surface
Magnetic masking layer is electrically connected with the first ground pad on the functional surfaces of the chip；
By at least one described flip-chip in the first surface of substrate, the functional surfaces are towards the first surface, wherein institute
It states first surface and is provided with the second exposed ground pad, the substrate is internally provided with ground plane, second ground pad
It is electrically connected with the ground plane；
Conducting connecting part is formed in the first surface, one end of the conducting connecting part is electrically connected with first electro-magnetic screen layer
It connects, the other end of the conducting connecting part is electrically connected with second ground pad.
2. packaging method according to claim 1, which is characterized in that the non-functional surface in chip and with it is described non-
The adjacent side of functional surfaces is formed before the first electro-magnetic screen layer, the packaging method further include:
Disk is provided, the disk is equipped with the chip of several matrix arrangements, position of the disk between the chip
Equipped with scribe line；
Grounded circuit, one end of the grounded circuit and first ground pad are formed on the functional surfaces of the chip
Electrical connection, the other end of the grounded circuit extend to the scribe line adjacent with first ground pad；
It is cut along the scribe line of the disk, the side of the other end of the grounded circuit and the chip
It flushes.
3. packaging method according to claim 2, which is characterized in that the scribe line to the disk is cut
Before cutting, the packaging method further include:
First protective film is set on the grounded circuit；
Metal salient point is formed on all pads for being located at the functional surfaces；
Remove first protective film.
4. packaging method according to claim 3, which is characterized in that the non-functional surface in chip and with institute
It states the adjacent side of non-functional surface and forms the first electro-magnetic screen layer, comprising:
Fixed fixture is provided, the fixed fixture includes through-hole, and the edge of the through-hole is provided with the second protective film；
The chip is placed in the fixed fixture, and the metal salient point of the chip is corresponding with the through-hole, institute
Grounded circuit is stated to contact with second protective film；
It sputters to form first electro-magnetic screen layer in the non-functional surface of the chip and the side of the chip.
5. packaging method according to claim 3, which is characterized in that
Before the scribe line along the disk is cut, the packaging method further include: in the chip
Insulating layer is formed on the functional surfaces, the insulating layer is flushed with the metal salient point, and the metal salient point is from the insulation
Expose in layer；Alternatively,
It is described to form conducting connecting part, before, the packaging method further include: described in the chip in the first surface
Insulating layer is formed between functional surfaces and the first surface, the side of the insulating layer is inclined surface.
6. packaging method according to claim 1, which is characterized in that the packaging method further include:
Plastic packaging layer is formed in the first surface of the substrate, the plastic packaging layer covers at least one described chip；
The second electro-magnetic screen layer is formed on the surface of the plastic packaging layer and the side of the substrate, wherein the ground plane
Both ends are exposed from the side of the substrate, and second electro-magnetic screen layer is electrically connected with the ground plane.
7. a kind of system in package device, which is characterized in that the packaging includes:
At least one chip is provided with the weldering of the first ground connection including the functional surfaces being disposed opposite to each other and non-functional surface on the functional surfaces
Disk；
Substrate, for carrying the chip, the substrate includes the first surface and second surface being disposed opposite to each other, first table
Face is provided with the second exposed ground pad, and the substrate is internally provided with ground plane, and second ground pad connects with described
Stratum electrical connection；Wherein, the functional surfaces are towards the first surface；
First electro-magnetic screen layer, cover the chip non-functional surface and the side adjacent with the non-functional surface, and it is described
First electro-magnetic screen layer is electrically connected with first ground pad；
Conducting connecting part, positioned at the first surface of the substrate, one end of the conducting connecting part and first electromagnetism
Shielded layer electrical connection, the other end of the conducting connecting part are electrically connected with second ground pad.
8. packaging according to claim 7, which is characterized in that
The functional surfaces of the chip are additionally provided with grounded circuit, one end of the grounded circuit and first ground pad
Electrical connection, another end surfaces of the grounded circuit are flushed with the side of the chip, and first electro-magnetic screen layer covers
Cover another end surfaces of the grounded circuit.
9. packaging according to claim 7, which is characterized in that the packaging further include:
Insulating layer fills the region between the functional surfaces of the chip and the first surface of the substrate, described exhausted
The side of edge layer is inclined surface, and the conducting connecting part extends along the inclined surface.
10. packaging according to claim 7, which is characterized in that
The functional surfaces of the chip are additionally provided with metal salient point, and the metal salient point prolongs from first ground pad surface
It stretches；And/or
The packaging further include: plastic packaging layer, the plastic packaging layer cover the outer surface of first electro-magnetic screen layer and described
The first surface of substrate；Second electro-magnetic screen layer, second electro-magnetic screen layer cover the outer surface of the plastic packaging layer with
And the side of the substrate；Wherein, the both ends of the ground plane are exposed from the side of the substrate, second electromagnetic screen
Layer is covered to be electrically connected with the ground plane；And/or
It is provided with via hole between second ground pad of the substrate and the ground plane, is filled with conduction in the via hole
Material.
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Effective date of registration: 20220418 Address after: 226000 building 11, No. 226, Tongjing Avenue, Nantong City, Jiangsu Province Patentee after: Tongfutongke (Nantong) Microelectronics Co.,Ltd. Address before: No.288, Chongchuan Road, Nantong City, Jiangsu Province, 226000 Patentee before: TONGFU MICROELECTRONICS Co.,Ltd. |