CN110071123A - 一种阵列基板及其制备方法 - Google Patents
一种阵列基板及其制备方法 Download PDFInfo
- Publication number
- CN110071123A CN110071123A CN201910320225.8A CN201910320225A CN110071123A CN 110071123 A CN110071123 A CN 110071123A CN 201910320225 A CN201910320225 A CN 201910320225A CN 110071123 A CN110071123 A CN 110071123A
- Authority
- CN
- China
- Prior art keywords
- layer
- drain electrode
- aperture
- array substrate
- grid
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 48
- 238000002360 preparation method Methods 0.000 title claims abstract description 9
- 239000010410 layer Substances 0.000 claims description 173
- 239000011229 interlayer Substances 0.000 claims description 9
- 239000004642 Polyimide Substances 0.000 claims description 6
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 6
- 229920001721 polyimide Polymers 0.000 claims description 6
- 239000000463 material Substances 0.000 claims description 4
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 3
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 3
- 239000011810 insulating material Substances 0.000 claims description 3
- 229910052710 silicon Inorganic materials 0.000 claims description 3
- 239000010703 silicon Substances 0.000 claims description 3
- 239000000377 silicon dioxide Substances 0.000 claims description 3
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 3
- OKTJSMMVPCPJKN-UHFFFAOYSA-N Carbon Chemical compound [C] OKTJSMMVPCPJKN-UHFFFAOYSA-N 0.000 claims 1
- 239000002253 acid Substances 0.000 claims 1
- 229910052799 carbon Inorganic materials 0.000 claims 1
- 150000002148 esters Chemical class 0.000 claims 1
- 229920002120 photoresistant polymer Polymers 0.000 abstract description 8
- 238000010301 surface-oxidation reaction Methods 0.000 abstract description 4
- 238000000034 method Methods 0.000 description 8
- 238000010586 diagram Methods 0.000 description 5
- 239000010408 film Substances 0.000 description 4
- 238000010079 rubber tapping Methods 0.000 description 4
- UHOVQNZJYSORNB-UHFFFAOYSA-N Benzene Chemical compound C1=CC=CC=C1 UHOVQNZJYSORNB-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000001312 dry etching Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- BDAGIHXWWSANSR-UHFFFAOYSA-N methanoic acid Natural products OC=O BDAGIHXWWSANSR-UHFFFAOYSA-N 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 229920003223 poly(pyromellitimide-1,4-diphenyl ether) Polymers 0.000 description 2
- 229920000515 polycarbonate Polymers 0.000 description 2
- 239000004417 polycarbonate Substances 0.000 description 2
- 239000005020 polyethylene terephthalate Substances 0.000 description 2
- 229920000139 polyethylene terephthalate Polymers 0.000 description 2
- OSWFIVFLDKOXQC-UHFFFAOYSA-N 4-(3-methoxyphenyl)aniline Chemical compound COC1=CC=CC(C=2C=CC(N)=CC=2)=C1 OSWFIVFLDKOXQC-UHFFFAOYSA-N 0.000 description 1
- HLBLWEWZXPIGSM-UHFFFAOYSA-N 4-Aminophenyl ether Chemical compound C1=CC(N)=CC=C1OC1=CC=C(N)C=C1 HLBLWEWZXPIGSM-UHFFFAOYSA-N 0.000 description 1
- 229920001621 AMOLED Polymers 0.000 description 1
- GTDPSWPPOUPBNX-UHFFFAOYSA-N ac1mqpva Chemical compound CC12C(=O)OC(=O)C1(C)C1(C)C2(C)C(=O)OC1=O GTDPSWPPOUPBNX-UHFFFAOYSA-N 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000005266 casting Methods 0.000 description 1
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007812 deficiency Effects 0.000 description 1
- 235000019253 formic acid Nutrition 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- HURSIASBWGCKKE-UHFFFAOYSA-N naphthalene naphthalene-1-carboxylic acid Chemical compound C1(=CC=CC2=CC=CC=C12)C(=O)O.C1=CC=CC2=CC=CC=C12 HURSIASBWGCKKE-UHFFFAOYSA-N 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 239000002798 polar solvent Substances 0.000 description 1
- 238000006068 polycondensation reaction Methods 0.000 description 1
- -1 polyethylene terephthalate Polymers 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
- H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
本发明提供一种阵列基板及其制备方法,阵列基板包括:基底层、设置在基底层上具有源极和漏极的源漏极层、设置在所述源漏极层上的平坦层、以及设置在所述平坦层上的像素电极层,其中所述平坦层上设置有第一过孔;其特征在于,所述漏极上设置有一开孔,所述开孔与所述第一过孔上下相通,所述像素电极层通过所述第一过孔以及所述开孔与所述漏极连接。通过在所述漏极中间设置所述开孔,所述像素电极层不止底部与所述漏极连接,所述像素电极层侧部分侧壁亦可通过所述开孔与所述漏极相连,可以有效的增大所述漏极与所述像素电极的接触面积,降低接触电阻,利于导通,亦可以有效降低因所述漏极表面氧化或有机光阻残留引起的接触不良,提高器件特性。
Description
技术领域
本发明涉及显示技术领域,特别涉及一种阵列基板及其制备方法。
背景技术
在柔性AMOLED显示屏生产制程中,首先会在玻璃基板上进行一层薄膜的涂布,目前工艺主要使用材料是聚酰亚胺,作为TFT Array制程的基底,随后在基底上依次进行Array制程,完成阵列基板的制作。
现有的阵列基板,如图1所示,包括:设置在衬底基板1上的缓冲层2、设置于缓冲层2上的有源层3、设置在有源层3上的第一栅极层绝缘层41、设置在第一栅极层绝缘层41上的第一栅极层51、设置在第一栅极层51上的第二栅极层绝缘层42、设置在第二栅极层绝缘层42上的第二栅极层52、设置在第二栅极层52上的层间介质层6、设置在层间介质层6上的源漏极层7、设置在源漏极层7上的平坦层8和设置在平坦层8上的像素电极层9,平坦层8上设置有第一过孔81,源漏极层7包括源极71和漏极72,像素电极层9通过第一过孔81和漏极72连接。
在阵列基板的制作过程中,在源漏极层上的平坦层形成导通漏极与像素电极的第一过孔后,通常需对平坦层进行干刻处理以加强平坦层与其他膜层的粘附性,但在干刻处理的过程中,由于漏极在第一过孔处被暴露,会导致第一过孔暴露出来的漏极会被氧化;还有在形成第一过孔的过程中,有机光阻没有完全曝光掉,则在第一过孔暴露出来的漏极表面存在有机光阻残留;这两种情况都会导致漏极与像素电极之间的电阻异常,进而造成最终显示不良的问题。
因此,确有必要来开发一种新型的阵列基板,以克服现有技术的缺陷。
发明内容
本发明的一个目的是提供一种阵列基板,其能够解决现有技术中漏极表面氧化或者有机光阻残留形成的接触不良的问题。
为实现上述目的,本发明提供一种阵列基板,包括:基底层、设置在基底层上具有源极和漏极的源漏极层、设置在所述源漏极层上的平坦层、以及设置在所述平坦层上的像素电极层,其中所述平坦层上设置有第一过孔;其特征在于,所述漏极上设置有一开孔,所述开孔与所述第一过孔上下相通,所述像素电极层通过所述第一过孔以及所述开孔与所述漏极连接。
通过在所述漏极中间设置所述开孔,所述像素电极层不止底部与所述漏极连接,所述像素电极层侧部分侧壁亦可通过所述开孔与所述漏极相连,可以有效的增大所述漏极与所述像素电极的接触面积,降低接触电阻,利于导通,亦可以有效降低因所述漏极表面氧化或有机光阻残留引起的接触不良,提高器件特性;同时,由于所述像素电极层与所述漏极层抵接区域被限制在所述漏极层开孔处,避免因外力或者其他因素引起的所述像素电极与所述漏极层接触处偏移而导致的所述像素电极层与所述漏极的接触不良的问题。
进一步的,在其他实施方式中,其中所述开孔的剖面形状为倒梯形。
进一步的,在其他实施方式中,其中所述漏极的俯视形状呈“回”字形状。
进一步的,在其他实施方式中,其中所述基底层包括:衬底基板、设置在所述衬底基板上的缓冲层、设置在所述缓冲层上的有源层,设置在所述有源层上的第一栅极层绝缘层、设置在所述第一栅极层绝缘层上的第一栅极层、设置在所述第一栅极层上的第二栅极层绝缘层、设置在所述第二栅极层绝缘层上的第二栅极层。
进一步的,在其他实施方式中,其还包括层间介质层,所述层间介质层设置在所述第二栅极层远离所述第二栅极绝缘层的一侧。
进一步的,在其他实施方式中,其中所述开孔远离所述漏极层的一端与所述层间介质层相接。
进一步的,在其他实施方式中,其中所述衬底基板材料为聚酰亚胺或聚碳酸酯。
进一步的,在其他实施方式中,其中所述第一栅极层绝缘层和所述第二栅极层绝缘层材料为氮化硅或氧化硅或氮氧化硅。
本发明的另一目的是提供本发明涉及的阵列基板的制备方法,包括以下步骤:
步骤S1:制备基底层、源漏极层;
步骤S2:在所述源漏极层上形成一开孔:
步骤S3:制备平坦层;
步骤S4:在所述平坦层上形成第一过孔,所述第一过孔与所述开孔上下相通;步骤S5:制备像素电极层。
本发明的另一目的是提供一种显示面板,其包括本体,所述本体上设置有本发明涉及的所述阵列基板。
相对于现有技术,本发明的有益效果在于提供一种阵列基板及其制备方法,在漏极中间设置开孔,与平坦层中的过孔对接,像素电极层通过平坦层过孔以及漏极开孔与漏极连接,通过在漏极中间设置开孔,像素电极层不止底部与漏极层连接,像素电极层侧部分侧壁亦可通过开孔与漏极层相连,可以有效的增大漏极与像素电极的接触面积,降低接触电阻,利于导通,亦可以有效降低因漏极表面氧化或有机光阻残留引起的接触不良,提高器件特性;同时,由于像素电极层与漏极层抵接区域被限制在漏极层开孔处,避免因外力或者其他因素引起的像素电极与漏极层接触处偏移而导致的像素电极层与漏极层的接触不良的问题。
附图说明
为了更清楚地说明本发明实施例中的技术方案,下面将对实施例描述中所需要使用的附图作简单地介绍,显而易见地,下面描述中的附图仅仅是本发明的一些实施例,对于本领域技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为现有技术中的阵列基板的剖面结构示意图;
图2为本发明提供的阵列基板的剖面结构示意图;
图3为本发明提供的漏极的俯视结构示意图。
具体实施方式
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅仅是本发明一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
这里所公开的具体结构和功能细节仅仅是代表性的,并且是用于描述本发明的示例性实施例的目的。但是本发明可以通过许多替换形式来具体实现,并且不应当被解释成仅仅受限于这里所阐述的实施例。
实施例1
请参阅图2,图2所示为本实施例提供的阵列基板的剖面结构示意图,本发明提供一种阵列基板,包括设置在衬底基板1上的缓冲层2、设置于缓冲层2上的有源层3、设置在有源层3上的第一栅极层绝缘层41、设置在第一栅极层绝缘层41上的第一栅极层51、设置在第一栅极层51上的第二栅极层绝缘层42、设置在第二栅极层绝缘层42上的第二栅极层52、设置在第二栅极层52上的层间介质层6、设置在层间介质层6上的源漏极层7、设置在源漏极层7上的平坦层8和设置在平坦层8上的像素电极层9。
衬底基板1可为聚酰亚胺(PI),聚碳酸酯(PC),聚对苯二甲酸乙二醇酯(PET),聚萘二甲酸乙二醇酯(PEN)等,在本实施例中优选为PI膜层,即聚酰亚胺薄膜,作为阵列基板的基底;聚酰亚胺薄膜是世界上性能最好的薄膜类绝缘材料,具有较强的拉伸强度,由均苯四甲酸二酐和二氨基二苯醚在强极性溶剂中经缩聚并流延成膜再经亚胺化而成。
在本实施例中,第一栅极层绝缘层和第二栅极层绝缘层材料为氮化硅,也可以使用氧化硅和氮氧化硅等,具体可以随需要而定,并无限定。
源漏极层7包括源极71和漏极72,平坦层8上设置有第一过孔81,漏极72上设置有开孔721,开孔721与第一过孔81上下相通,像素电极层9通过第一过孔81和开孔721与漏极72连接。在漏极中间设置开孔,与平坦层中的过孔对接,像素电极层通过平坦层孔以及漏极开孔与漏极连接,因而,通过在漏极中间设置开孔,所述像素电极层不止底部与漏极层连接,所述像素电极层侧部分侧壁亦可通过所述开孔与所述漏极层相连,可以有效的增大漏极与像素电极的接触面积,降低接触电阻,利于导通,亦可以有效降低因漏极表面氧化或有机光阻残留引起的接触不良,提高器件特性;同时,由于所述像素电极层与所述漏极层抵接区域被限制在所述漏极层开孔处,避免因外力或者其他因素引起的像素电极与漏极层接触处偏移而导致的像素电极层与漏极层的接触不良的问题。
其中开孔721的剖面形状为倒梯形,能够避免膜层断裂形成接触不良。
请参阅图3,图3所示为本实施例提供的漏极的俯视结构示意图,漏极72的剖面形状呈“回”字形状,第一过孔81相对于开孔721为大孔,开孔721相对于第一过孔81为小孔,大孔对位小孔,工艺上更容易实现。
实施例2
本发明的另一目的是提供一种实施例1涉及的阵列基板的制备方法,包括以下步骤:
步骤S1:制备基底层、源漏极层;
步骤S2:在源漏极层上形成一开孔:
步骤S3:制备平坦层;
步骤S4:在平坦层上形成第一过孔,第一过孔与开孔上下相通;
在形成第一过孔时,第一过孔对准开孔,第一过孔相对于开孔为大孔,开孔相对于第一过孔为小孔,大孔对位小孔,工艺上更容易实现。
步骤S5:制备像素电极层。
实施例3
本发明的另一目的是提供一种显示面板,包括阵列基板和彩膜基板所述阵列基板采用实施例1中涉及的阵列基板。在漏极中间设置开孔,与平坦层中的过孔对接,像素电极层通过平坦层过孔以及漏极开孔与漏极连接,通过在漏极中间设置开孔,像素电极层不止底部与漏极层连接,像素电极层侧部分侧壁亦可通过开孔与漏极层相连,可以有效的增大漏极与像素电极的接触面积,降低接触电阻,利于导通,亦可以有效降低因漏极表面氧化或有机光阻残留引起的接触不良,提高器件特性;同时,由于像素电极层与漏极层抵接区域被限制在漏极层开孔处,避免因外力或者其他因素引起的像素电极与漏极层接触处偏移而导致的像素电极层与漏极层的接触不良的问题。
以上所述仅是本发明的优选实施方式,应当指出,对于本技术领域的普通技术人员,在不脱离本发明原理的前提下,还可以做出若干改进和润饰,这些改进和润饰也应视为本发明的保护范围。
Claims (10)
1.一种阵列基板,包括:基底层、设置在基底层上具有源极和漏极的源漏极层、设置在所述源漏极层上的平坦层、以及设置在所述平坦层上的像素电极层,其中所述平坦层上设置有第一过孔;其特征在于,所述漏极上设置有一开孔,所述开孔与所述第一过孔上下相通,所述像素电极层通过所述第一过孔以及所述开孔与所述漏极连接。
2.根据权利要求1所述的阵列基板,其特征在于,所述开孔的剖面形状为倒梯形。
3.根据权利要求1所述的阵列基板,其特征在于,所述漏极的俯视形状呈“回”字形状。
4.根据权利要求1所述的阵列基板,其特征在于,所述基底层包括:衬底基板、设置在所述衬底基板上的缓冲层、设置在所述缓冲层上的有源层,设置在所述有源层上的第一栅极层绝缘层、设置在所述第一栅极层绝缘层上的第一栅极层、设置在所述第一栅极层上的第二栅极层绝缘层、设置在所述第二栅极层绝缘层上的第二栅极层。
5.根据权利要求4所述的阵列基板,其特征在于,其还包括层间介质层,所述层间介质层设置在所述第二栅极层远离所述第二栅极绝缘层的一侧。
6.根据权利要求5所述的阵列基板,其特征在于,所述开孔远离所述漏极层的一端与所述层间介质层相接。
7.根据权利要求1所述的阵列基板,其特征在于,所述衬底基板材料为聚酰亚胺或聚碳酸酯。
8.根据权利要求4所述的阵列基板,其特征在于,所述第一栅极层绝缘层和所述第二栅极层绝缘层材料为氮化硅或氧化硅或氮氧化硅。
9.权利要求1-8任一项所述的阵列基板的制备方法,其特征在于,包括以下步骤:
步骤S1:制备基底层、源漏极层;
步骤S2:在所述源漏极层上形成一开孔:
步骤S3:制备平坦层;
步骤S4:在所述平坦层上形成第一过孔,所述第一过孔与所述开孔上下相通;
步骤S5:制备像素电极层。
10.一种显示面板,其特征在于,其包括本体,所述本体上设置有如权利要求1-8任一项所述的阵列基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910320225.8A CN110071123A (zh) | 2019-04-19 | 2019-04-19 | 一种阵列基板及其制备方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201910320225.8A CN110071123A (zh) | 2019-04-19 | 2019-04-19 | 一种阵列基板及其制备方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
CN110071123A true CN110071123A (zh) | 2019-07-30 |
Family
ID=67368207
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201910320225.8A Pending CN110071123A (zh) | 2019-04-19 | 2019-04-19 | 一种阵列基板及其制备方法 |
Country Status (1)
Country | Link |
---|---|
CN (1) | CN110071123A (zh) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106601755A (zh) * | 2017-01-10 | 2017-04-26 | 北京理工大学 | 一种避免像素电极open的结构设计及其制备工艺 |
CN108550612A (zh) * | 2018-05-29 | 2018-09-18 | 武汉华星光电半导体显示技术有限公司 | 显示面板及其制作方法 |
-
2019
- 2019-04-19 CN CN201910320225.8A patent/CN110071123A/zh active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN106601755A (zh) * | 2017-01-10 | 2017-04-26 | 北京理工大学 | 一种避免像素电极open的结构设计及其制备工艺 |
CN108550612A (zh) * | 2018-05-29 | 2018-09-18 | 武汉华星光电半导体显示技术有限公司 | 显示面板及其制作方法 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
CN109192878B (zh) | 柔性oled显示面板 | |
WO2019196410A1 (zh) | 阵列基板及其制作方法、有机发光二极管显示装置 | |
WO2018107531A1 (zh) | 柔性显示屏结构及其制作方法 | |
CN110504291B (zh) | 一种显示基板及其制备方法、显示装置 | |
WO2015090000A1 (zh) | 阵列基板及其制作方法,显示装置 | |
TWI485499B (zh) | 液晶顯示面板陣列基板及其製造方法 | |
US11538883B2 (en) | OLED display panel and OLED device with wire overlying step in via-holes, and manufacturing method thereof | |
CN106953011B (zh) | 垂直沟道有机薄膜晶体管及其制作方法 | |
WO2020186989A1 (zh) | 基板及其制作方法、触控显示装置 | |
WO2013143292A1 (zh) | 触摸传感器、其制作方法以及具有触摸屏的液晶显示器 | |
US20190064560A1 (en) | Display panel and fabrication method thereof and display device | |
WO2015035832A1 (zh) | 阵列基板及其制备方法和显示装置 | |
WO2018188388A1 (zh) | 阵列基板的制备方法、阵列基板、显示面板和显示装置 | |
CN108598091A (zh) | 一种阵列基板及其制作方法 | |
US11453751B2 (en) | Polyimide (PI) substrate and method for fabricating same | |
US10361261B2 (en) | Manufacturing method of TFT substrate, TFT substrate, and OLED display panel | |
WO2017161647A1 (zh) | 一种用于制造显示面板的方法、显示面板以及显示装置 | |
US11094789B2 (en) | Thin film transistor and method for manufacturing the same, array substrate, and display device | |
WO2018205524A1 (zh) | 一种阵列基板及其制作方法、显示装置 | |
CN105977267B (zh) | 阵列基板及其制作方法、显示装置 | |
US10714545B2 (en) | Method for manufacturing touch control display screen | |
CN110112186A (zh) | 一种阵列基板、显示面板以及显示装置 | |
WO2021077494A1 (zh) | 一种柔性薄膜基板及其制备方法、显示面板 | |
WO2014146370A1 (zh) | 阵列基板、显示面板和显示装置 | |
CN110071123A (zh) | 一种阵列基板及其制备方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
RJ01 | Rejection of invention patent application after publication |
Application publication date: 20190730 |
|
RJ01 | Rejection of invention patent application after publication |