CN110021660B - AlGaN/GaN heterojunction vertical field effect transistor and manufacturing method thereof - Google Patents

AlGaN/GaN heterojunction vertical field effect transistor and manufacturing method thereof Download PDF

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CN110021660B
CN110021660B CN201910304396.1A CN201910304396A CN110021660B CN 110021660 B CN110021660 B CN 110021660B CN 201910304396 A CN201910304396 A CN 201910304396A CN 110021660 B CN110021660 B CN 110021660B
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段宝兴
王彦东
杨珞云
杨银堂
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Xidian University
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    • H01L29/10Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1025Channel region of field-effect devices
    • H01L29/1029Channel region of field-effect devices of field-effect transistors
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66446Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
    • H01L29/66462Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
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    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7788Vertical transistors

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Abstract

The invention provides an AlGaN/GaN heterojunction vertical field effect transistor and a manufacturing method thereof, and the device is mainly characterized in that a special drift region is adopted, namely the special drift region consists of an N-type drift region and an N + current channel, a new current channel is constructed by utilizing two-dimensional electron gas and the N + current channel formed by the AlGaN/GaN heterojunction, and a P-type shielding layer is adopted. When conducting in the forward direction, the P-type shielding layer hardly influences an N + current channel, and lower on-resistance can be obtained. When the device is turned off, the depletion region near the P-type shielding layer expands along with the increase of the voltage of the drain electrode, and after an N + current path is pinched off, the drift region bears reverse bias voltage, so that higher breakdown voltage can be obtained, and the contradiction between the breakdown voltage and the concentration of the drift region is weakened. In combination with the above advantages, compared with the conventional vertical field effect transistor, the structure provided by the invention can bear higher withstand voltage and has lower conduction loss.

Description

AlGaN/GaN heterojunction vertical field effect transistor and manufacturing method thereof
Technical Field
The invention relates to the field of power semiconductor devices, in particular to an AlGaN/GaN vertical field effect transistor.
Background
Gallium nitride and silicon carbide are increasingly applied to wide bandgap compound semiconductor materials represented by the characteristics of devices far superior to those of traditional silicon materials, and the gallium nitride material is one of the cores of the third generation semiconductor materials, and compared with a silicon carbide power device, the wide bandgap compound semiconductor material is widely applied to the fields of high speed and high frequency due to the easily realized heterostructure, high-concentration two-dimensional electron gas (2DEG), high channel electron mobility and high breakdown electric field.
In a wide band gap semiconductor, the diffusion rate of impurities is very low even at high temperature, so that a double injection process is generally adopted, an injection junction is shallow, and when a depletion region of a P-type base region reaches a source region, a source-drain punch-through phenomenon occurs, so that the breakdown voltage is limited. In wide bandgap material devices, a high doping concentration of the P-type base region is required to avoid base punch-through effects, which results in extremely high threshold voltages due to the wide bandgap material properties. In addition, when the device is turned off, due to high voltage, a high electric field is generated in the gate dielectric layer, so that the oxide layer is easy to break or even break down, and the service life and the reliability of the device are greatly reduced.
Disclosure of Invention
The invention provides a novel AlGaN/GaN heterojunction vertical field effect transistor, aiming at further improving the breakdown voltage of the vertical field effect transistor, reducing the on-resistance of the vertical field effect transistor and improving the performance of a device.
The technical scheme of the invention is as follows:
the AlGaN/GaN heterojunction vertical field effect transistor comprises:
a substrate of semiconductor material, also serving as a drain region;
epitaxially growing an N-type drift region of a gallium nitride material on the substrate;
two P-type base regions formed in the left end region and the right end region of the upper part of the N-type drift region respectively, and corresponding N + type source regions are contacted with the P + channel substrate; a channel is formed in each P-type base region, wherein the N + type source region is adjacent to the channel, and the P + channel substrate contact is positioned at the far end of the channel relative to the N + type source region;
the source electrode covers the upper surface of a region where the P + channel substrate contact is connected with the corresponding N + type source region; two source electrodes are connected in common;
the drain electrode is positioned on the lower surface of the substrate;
the prior art is different from the prior art: the middle region of the N-type drift region forms an N + current channel through ion implantation, and the N + current channel longitudinally penetrates through the N-type drift region; the doping concentration of the N + current channel is far higher than that of the N-type drift region;
an AlGaN layer is heteroepitaxially grown on the N + current channel and the surfaces of the two sides of the N + current channel and the region adjacent to the N-type drift region, so that a two-dimensional electron gas (2DEG) can be generated by the AlGaN/GaN heterojunction;
the gate dielectric layer integrally covers the channel parts corresponding to the two P-type base regions and the upper surface and the side surfaces of the AlGaN layer; the surface of the gate dielectric layer covers the gate;
and a P-type shielding layer is also formed below the two P-type base regions and the corresponding N + type source region and P + channel substrate through ion implantation.
Further, the substrate is made of gallium nitride.
Furthermore, the doping concentration of the N-type drift region is 1-3 orders of magnitude smaller than that of the N + current channel.
Further, the distance between the P-type shielding layer and the N + current channel is greater than or equal to 0.
Furthermore, the doping concentration of the N-type drift region is 1 multiplied by 1015cm-3~1×1016cm-3(ii) a The doping concentration of the N + current channel is 1 multiplied by 1016cm-3~1×1018cm-3
Furthermore, the doping concentration of the P-type shielding layer is 1 multiplied by 1017cm-3~1×1019cm-3
Furthermore, the thickness of the gate dielectric layer is 0.02-0.1 μm.
Furthermore, the doping concentration of the P-type base region is 1 multiplied by 1016cm-3~1×1017cm-3
A method for manufacturing the vertical field effect transistor of the AlGaN/GaN heterojunction comprises the following steps:
(1) taking a gallium nitride material as a substrate and simultaneously as a drain region;
(2) forming an epitaxial layer on the substrate as a lightly doped drift region;
(3) forming a heavily doped drift region in the middle of the epitaxial layer through ion implantation;
(4) repeating the steps (2) and (3) according to the requirement of the designed breakdown voltage to achieve the required thickness of the drift region;
(5) forming an AlGaN layer on the GaN epitaxial layer through heteroepitaxy;
(6) etching and removing the AlGaN layer in a designated area, and forming a P-type shielding layer, a P-type base region, an N + type source region of the P-type shielding layer and a P + channel substrate contact in the left end area and the right end area of the upper part of the GaN epitaxial layer by adopting ion implantation to form a corresponding channel;
(7) forming gate dielectric layers on the channels at the two sides and the surface of the AlGaN/GaN in the middle, and depositing metal to form a gate;
(8) depositing a passivation layer on the surface of the device, and etching a contact hole at a position corresponding to the source electrode;
(9) and depositing metal in the contact hole and etching (removing the rest passivation layer on the periphery) to form a source electrode, and connecting the two source electrodes together.
The technical scheme of the invention has the following beneficial effects:
the invention constructs a new current channel by a two-dimensional electron gas and an N + current channel formed by an AlGaN/GaN heterojunction; the P-type shielding layer is adopted, so that the problem that the wide band gap semiconductor material is easy to generate source-drain punch-through under high voltage is solved, and the concentration of a channel can be reduced to obtain proper threshold voltage. When the device is turned off, the peak electric field in the gate dielectric layer is effectively reduced by the P-type shielding layer, the reliability of the device is improved, when the device is turned on in the forward direction, a lower on-resistance can be obtained due to a new current channel, when the device is turned off, the whole drift region bears reverse bias, a higher breakdown voltage can be obtained, and the contradiction relation between the breakdown voltage and the concentration of the drift region is weakened.
The AlGaN/GaN heterojunction vertical field effect transistor has higher withstand voltage, lower conduction loss and better performance under the condition of the same drift region length (the longitudinal dimension shown in the figure).
Drawings
Fig. 1 is a schematic structural view of the present invention.
Wherein the 1-P + channel substrate contacts (P + type body regions); a 2-N + type source region; a 3-P type base region; a 4-AlGaN layer; 5-a grid; 6-a gate dielectric layer; a 7-source electrode; an 8-P type shielding layer; a 9-N type drift region; 10-substrate (double as drain region); 11-a drain electrode; 12-N + current path.
Detailed Description
The present invention will be described with reference to the drawings by taking an N-channel AlGaN/GaN heterojunction vertical field effect transistor as an example.
As shown in FIG. 1, the drift region of the device is composed of an N-type drift region and an N + current channel, and a P-type shielding layer is arranged. The thickness and the withstand voltage requirement of the device determine the thickness of the N-type drift region, and the concentration and the depth of an N + current channel are determined by the conduction loss of the device; the concentration, thickness and length of the P-type shielding layer are determined by the voltage withstanding requirement of the device, and the concentration of the P-type base region is determined by the threshold voltage of the device.
The length of the P-type shielding layer is larger than or equal to the whole contact length of the P-type base region, the N + type source region and the P + channel substrate.
The doping concentration of the N-type drift region is determined according to the designed breakdown voltage, and the typical doping concentration range is 1 multiplied by 1015cm-3~1×1016cm-3
The doping concentration of the N + current channel is determined according to the designed breakdown voltage, and the typical doping concentration range is 1 multiplied by 1016cm-3~1×1018cm-3
The doping concentration of the P-type base region is determined according to the designed threshold voltage, and the typical doping concentration range is 1 multiplied by 1016cm-3~1×1017cm-3
The doping concentration of the P-type shielding layer is determined according to the designed breakdown voltage, and the typical doping concentration range is 1 multiplied by 1017cm-3~1×1019cm-3
The thickness of the N-type gallium nitride epitaxial layer is determined according to the designed breakdown voltage, for example: when the withstand voltage is 800V, the thickness of the N-type gallium nitride epitaxial layer is about 5 mu m;
the thickness of the gate dielectric layer is determined according to the threshold voltage and is 0.02-0.1 mu m;
the P-type shielding layer, the P-type base region, the N + type source region of the P-type base region, the P + channel substrate contact and the channel are formed on the upper portion of the N-type epitaxial layer through ion implantation.
P-type doped GaN can be formed by epitaxial growth of Mg or other dopable elements, depending on the doping effect and requirements.
The source electrode, the grid electrode and the drain electrode are all connected with the GaN layer and the AlGaN layer through ohmic contact.
The device can be manufactured by the following steps:
(1) taking a GaN material as an N + substrate and simultaneously as a drain region;
(2) forming an N-type epitaxial layer of a GaN material on the upper surface of an N + type substrate, and forming an N + current channel in a middle region through ion implantation, wherein the number of times of epitaxial implantation is determined by a designed breakdown voltage, for example, when the voltage is 800v, the typical length value of a drift region is 5 μm, and 2-3 times of epitaxial implantation is needed;
(3) forming a metalized drain on the lower surface of the N + type substrate;
(4) forming an AlGaN layer on the drift region through heteroepitaxy;
(5) etching and removing the AlGaN layer in a designated area, and forming a P-type shielding layer, a P-type base region and an N + type source region thereof to be contacted with a P + channel substrate in the left end area and the right end area of the upper part of the GaN epitaxial layer by adopting ion implantation under the protection of a mask so as to form a corresponding channel;
(6) forming gate dielectric layers on the channels on the two sides and the surface of the AlGaN/GaN in the middle, and depositing metal to form a gate;
(7) depositing a passivation layer on the surface of the device, and etching a contact hole at a position corresponding to the source electrode;
(8) and depositing metal in the contact hole and etching (removing the rest passivation layer on the periphery) to form a source electrode, and connecting the two source electrodes together.
The invention adopts a special drift region (consisting of an N-type drift region and an N + current channel), simultaneously constructs a new current channel by utilizing a two-dimensional electron gas and the N + current channel formed by AlGaN/GaN heterojunction, and adopts a P-type shielding layer. Due to the effect of the P-type shielding layer, the problem that the gallium nitride semiconductor material is easy to generate source-drain punch-through under high voltage is solved, the concentration of a channel can be reduced to obtain proper threshold voltage, the peak electric field in the gate dielectric layer is effectively reduced through the P-type shielding layer, and the reliability of the device is improved. When conducting in the forward direction, the P-type shielding layer hardly influences an N + current channel, and lower on-resistance can be obtained. When the device is turned off, the depletion region near the P-type shielding layer expands along with the increase of the voltage of the drain electrode, and after an N + current path is pinched off, the drift region bears reverse bias voltage, so that higher breakdown voltage can be obtained, and the contradiction between the breakdown voltage and the concentration of the drift region is weakened. In combination with the above advantages, compared with the conventional vertical field effect transistor, the structure provided by the invention can bear higher withstand voltage and has lower conduction loss.
ISE TCAD simulation shows that the performance of the invention is obviously improved compared with the traditional wide bandgap vertical field effect transistor, and when two devices have equal breakdown voltage, the on-resistance of the novel device is reduced by more than 30%.
Based on the principles of the present invention, those skilled in the art should recognize that other wide band gap semiconductor materials capable of forming two-dimensional electron gas, such as gallium arsenide, etc., are equivalent to the present invention and should be considered as falling within the scope of the claims of the present patent application.
The vertical field effect transistor of the present invention may also be a P-channel vertical field effect transistor, and its structure is equivalent to that of an N-channel vertical field effect transistor, and should also be considered as belonging to the protection scope of the claims of the present patent application, and will not be described herein again.

Claims (8)

  1. An AlGaN/GaN heterojunction vertical field effect transistor comprising:
    a substrate (10) of semiconductor material, also serving as a drain region;
    epitaxially growing an N-type drift region (9) of gallium nitride material on the substrate;
    two P-type base regions (3) formed in the left end region and the right end region of the upper part of the N-type drift region (9) respectively, and corresponding N + type source regions (2) and P + channel substrate contacts (1); a channel is formed in each P-type base region (3), wherein the N + type source region (2) is adjacent to the channel, and the P + channel substrate contact (1) is positioned at the far end of the channel relative to the N + type source region (2);
    the source electrode (7) covers the upper surface of a region where the P + channel substrate contact (1) is connected with the corresponding N + type source region (2); two source electrodes are connected in common;
    a drain electrode (11) positioned on the lower surface of the substrate;
    the method is characterized in that:
    an N + current channel (12) is formed in the middle region of the N-type drift region (9) through ion implantation, and the N + current channel (12) penetrates through the N-type drift region (9) longitudinally; the doping concentration of the N + current channel (12) is far higher than that of the N-type drift region (9); the doping concentration of the N-type drift region (9) is 1 multiplied by 1015cm-3~1×1016cm-3(ii) a The doping concentration of the N + current channel (12) is 1 multiplied by 1016cm-3~1×1018cm-3
    An AlGaN layer (4) is heteroepitaxially grown on the N + current channel (12) and the surface of the region on the two sides of the N + current channel, which is adjacent to the N-type drift region (9), so that a two-dimensional electron gas (2DEG) can be generated by the AlGaN/GaN heterojunction;
    the gate dielectric layer (6) integrally covers the corresponding channel parts of the two P-type base regions (3) and the upper surface and the side surfaces of the AlGaN layer (4); the surface of the gate dielectric layer (6) covers the gate (5);
    and a P-type shielding layer (8) is further formed below the two P-type base regions (3) and the corresponding N + type source region (2) and the P + channel substrate contact (1) through ion implantation.
  2. 2. The AlGaN/GaN heterojunction vertical field effect transistor according to claim 1, wherein: the substrate is made of gallium nitride.
  3. 3. The AlGaN/GaN heterojunction vertical field effect transistor according to claim 1, wherein: the doping concentration of the N-type drift region (9) is 1-3 orders of magnitude smaller than that of the N + current channel (12).
  4. 4. The AlGaN/GaN heterojunction vertical field effect transistor according to claim 1, wherein: the distance between the P-type shielding layer (8) and the N + current channel (12) is greater than or equal to 0.
  5. 5. The AlGaN/GaN heterojunction vertical field effect transistor according to claim 1, wherein: the doping concentration of the P-type shielding layer (8) is 1 multiplied by 1017cm-3~1×1019cm-3
  6. 6. The AlGaN/GaN heterojunction vertical field effect transistor according to claim 1, wherein: the thickness of the gate dielectric layer is 0.02-0.1 μm.
  7. 7. The AlGaN/GaN heterojunction vertical field effect transistor of claim 1, wherein the AlGaN/GaN heterojunction vertical field effect transistor is characterized in thatThe method comprises the following steps: the doping concentration of the P-type base region (3) is 1 multiplied by 1016cm-3~1×1017cm-3
  8. 8. A method of fabricating the AlGaN/GaN heterojunction vertical field effect transistor of claim 1, comprising the steps of:
    (1) taking a gallium nitride material as a substrate and simultaneously as a drain region;
    (2) forming an epitaxial layer on the substrate as a lightly doped drift region, namely an N-type drift region (9);
    (3) forming a heavily doped drift region, namely an N + current channel (12), in the middle of the epitaxial layer through ion implantation;
    (4) repeating the steps (2) and (3) according to the requirement of the designed breakdown voltage to achieve the required thickness of the drift region;
    (5) forming an AlGaN layer on the epitaxial layer through heteroepitaxy;
    (6) etching and removing the AlGaN layer in a designated area, and forming a P-type shielding layer, a P-type base region, an N + type source region of the P-type shielding layer and a P + channel substrate contact in the left end area and the right end area of the upper part of the GaN epitaxial layer by adopting ion implantation to form a corresponding channel;
    (7) forming gate dielectric layers on the channels at the two sides and the surface of the AlGaN/GaN in the middle, and depositing metal to form a gate;
    (8) depositing a passivation layer on the surface of the device, and etching a contact hole at a position corresponding to the source electrode;
    (9) and depositing metal in the contact hole and etching to form a source electrode, and connecting the two source electrodes together.
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