CN109950354A - A kind of homogeneity-heterojunction solar battery and preparation method thereof - Google Patents
A kind of homogeneity-heterojunction solar battery and preparation method thereof Download PDFInfo
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- CN109950354A CN109950354A CN201910231182.6A CN201910231182A CN109950354A CN 109950354 A CN109950354 A CN 109950354A CN 201910231182 A CN201910231182 A CN 201910231182A CN 109950354 A CN109950354 A CN 109950354A
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Abstract
The present invention provides a kind of homogeneity-heterojunction solar battery, including substrate, the first transparent conductive film, the second transparent conductive film and metal electrode, first transparent conductive film and second transparent conductive film are equipped with the metal electrode, emitter layer and first surface passivation layer are sequentially formed between positive and described first transparent conductive film of the substrate, the emitter layer and the substrate form homojunction；Second surface passivation layer and doped amorphous silicon layer are sequentially formed between the back side of the substrate and second transparent conductive film, the second surface passivation layer, the doped amorphous silicon layer and the substrate form hetero-junctions；Wherein, the emitter layer and the substrate transoid, the doped amorphous silicon layer and the substrate homotype.
Description
Technical field
The present invention relates to area of solar cell more particularly to a kind of homogeneity-heterojunction solar battery and its preparation sides
Method.
Background technique
The weight that hetero-junction solar cell is current high efficiency crystalline silicon solar cell research and development is prepared using the big band gap material such as amorphous silicon
Want direction.In eighties of last century, intrinsic amorphous silicon/doped amorphous silicon forms the mode of hetero-junctions in the front and back of silicon wafer
(HIT) it forms efficient solar battery to be developed, and has carried out industrialization.
Intrinsic amorphous silicon/doped amorphous silicon prepares hetero-junctions, solar energy by the way of film deposition in the front of silicon wafer
The surface of battery is very sensitive to defect, and when there is slightly impurity on surface and scratches when large-scale production, yield will decline rapidly；
In order to improve solar battery front side conductive capability, it will usually increase the thickness of doped amorphous silicon and transparent conductive film, and increase
The doping concentration of amorphous silicon, but will form the parasitic absorption to light, cause the short circuit current of battery lower, if reduced non-
The thickness of crystal silicon and transparent conductive film, then battery conductive ability declines, and fill factor declines rapidly.
Summary of the invention
The technical problem to be solved in the present invention is to provide a kind of homogeneity-heterojunction solar battery and preparation method thereof, with
The conductive capability of solar battery is improved, and reduces the parasitic absorption to light.
In order to solve the above technical problems, an aspect of of the present present invention provides a kind of homogeneity-heterojunction solar battery, including
Substrate, the first transparent conductive film, the second transparent conductive film and metal electrode, first transparent conductive film and described second transparent
Conductive film is equipped with the metal electrode, is sequentially formed with transmitting between positive and described first transparent conductive film of the substrate
Pole layer and first surface passivation layer, the emitter layer and the substrate form homojunction；The back side of the substrate and described
Second surface passivation layer and doped amorphous silicon layer, the second surface passivation layer, institute are sequentially formed between two transparent conductive films
It states doped amorphous silicon layer and the substrate forms hetero-junctions；Wherein, the emitter layer and the substrate transoid, the doping are non-
Crystal silicon layer and the substrate homotype.
In one embodiment of this invention, first transparent conductive film covers whole tables of the first surface passivation layer
Face, second transparent conductive film cover all surfaces of the doped amorphous silicon layer.
In one embodiment of this invention, first transparent conductive film covers the local table of the first surface passivation layer
Face, other surfaces of the first surface passivation layer are covered with passivating film, and the second transparent conductive film covering doping is non-
The all surfaces of crystal silicon layer.
In one embodiment of this invention, the passivating film is silica, aluminium oxide or silicon nitride.
In one embodiment of this invention, using high-temperature diffusion method, chemical vapour deposition technique or ion implantation described
Emitter layer is formed on substrate.
In one embodiment of this invention, the first surface passivation layer and/or the second surface passivation layer are intrinsic
Amorphous silicon.
In one embodiment of this invention, it is additionally provided between first transparent conductive film and the first surface passivation layer
One second doped amorphous silicon layer, second doped amorphous silicon layer and the emitter layer homotype.
In one embodiment of this invention, it is additionally provided between first transparent conductive film and the first surface passivation layer
One second doped amorphous silicon layer, second doped amorphous silicon layer and the emitter layer homotype.
In one embodiment of this invention, the cross-sectional area of second doped amorphous silicon layer and the first surface are passivated
Layer is identical.
Another aspect provides a kind of preparation method of homogeneity-heterojunction solar battery, the preparation sides
Method includes: offer substrate；Emitter layer is formed in the front of the substrate；It is sequentially depositing second surface at the back side of the substrate
Passivation layer and doped amorphous silicon layer, and first surface passivation layer is deposited on the emitter layer；It is blunt in the first surface
The all surfaces for changing layer deposit the first transparent conductive film, and transparent in all surfaces deposition second of the doped amorphous silicon layer
Conductive film；Metal electrode is formed in first transparent conductive film and second transparent conductive film.
In one embodiment of this invention, using high-temperature diffusion method, chemical vapour deposition technique or ion implantation described
Emitter layer is formed on substrate.
In one embodiment of this invention, the shape also between first transparent conductive film and the first surface passivation layer
At one second doped amorphous silicon layer, second doped amorphous silicon layer and the emitter layer homotype.
It is yet another aspect of the present invention to provide a kind of preparation method of homogeneity-heterojunction solar battery, the preparation sides
Method includes: offer substrate；Emitter layer is formed in the front of the substrate；It is sequentially depositing second surface at the back side of the substrate
Passivation layer and doped amorphous silicon layer, and first surface passivation layer is deposited on the emitter layer；It is blunt in the first surface
The local surfaces for changing layer deposit the first transparent conductive film, and cover passivating film on other surfaces of the first surface passivation layer,
And the second transparent conductive film is deposited in all surfaces of the doped amorphous silicon layer；In first transparent conductive film and described
Metal electrode is formed in second transparent conductive film.
In one embodiment of this invention, the passivating film is silica, aluminium oxide or silicon nitride.
In one embodiment of this invention, the shape also between first transparent conductive film and the first surface passivation layer
At one second doped amorphous silicon layer, second doped amorphous silicon layer and the emitter layer homotype.
In one embodiment of this invention, the cross-sectional area of second doped amorphous silicon layer and the first surface are passivated
Layer is identical.
Compared with prior art, the invention has the following advantages that the present invention provides a kind of homogeneity-heterojunction solar electricity
Pond and preparation method thereof is provided with emitter layer in solar battery between the front and intrinsic amorphous silicon of silicon substrate, so as to
To reduce the thickness of amorphous silicon and transparent conductive film, can reduce while improving the conductive capability of solar battery to light
The parasitic absorption of line.
Detailed description of the invention
For the above objects, features and advantages of the present invention can be clearer and more comprehensible, below in conjunction with attached drawing to tool of the invention
Body embodiment elaborates, in which:
Fig. 1 is the diagrammatic cross-section of solar battery according to an embodiment of the invention；
Fig. 2 is the diagrammatic cross-section of solar battery according to another embodiment of the present invention；
Fig. 3 is the flow chart of the preparation method of solar battery according to an embodiment of the invention；
Fig. 4 A-4H is that the section of the example process of the preparation method of solar battery according to an embodiment of the invention shows
It is intended to；
Fig. 5 is the flow chart of the preparation method of solar battery according to another embodiment of the present invention；
Fig. 6 A-6J is the section of the example process of the preparation method of solar battery according to another embodiment of the present invention
Schematic diagram.
Description of symbols
100 substrates
101 front side diffusion regions domain
102 back side diffusion regions
200 fronts
201 first transparent conductive films
202 first surface passivation layers
203 emitter layers
204 passivating films
300 back sides
301 second transparent conductive films
302 doped amorphous silicon layers
303 second surface passivation layers
400 metal electrodes
Specific embodiment
For the above objects, features and advantages of the present invention can be clearer and more comprehensible, below in conjunction with attached drawing to tool of the invention
Body embodiment elaborates.
In the following description, numerous specific details are set forth in order to facilitate a full understanding of the present invention, but the present invention can be with
It is different from other way described herein using other and implements, therefore the present invention is by the limit of following public specific embodiment
System.
As shown in the application and claims, unless context clearly prompts exceptional situation, " one ", "one", " one
The words such as kind " and/or "the" not refer in particular to odd number, may also comprise plural number.It is, in general, that term " includes " only prompts to wrap with "comprising"
Include clearly identify the step of and element, and these steps and element do not constitute one it is exclusive enumerate, method or apparatus
The step of may also including other or element.
When describing the embodiments of the present invention, for purposes of illustration only, indicating that the sectional view of device architecture can disobey general proportion work
Partial enlargement, and the schematic diagram is example, should not limit the scope of protection of the invention herein.In addition, in practical system
It should include the three-dimensional space of length, width and depth in work.
For the convenience of description, herein may use such as " under ", " lower section ", " being lower than ", " following ", " top ", "upper"
Etc. spatial relationship word the relationships of an elements or features shown in the drawings and other elements or feature described.It will reason
Solve, these spatial relationship words be intended to encompass in use or device in operation, other than the direction described in attached drawing
Other directions.For example, being described as be in other elements or feature " below " or " under " if overturning the device in attached drawing
Or the direction of the element of " following " will be changed to " top " in the other elements or feature.Thus, illustrative word " under
Side " and " following " can include upper and lower both direction.Device may also have other directions (to be rotated by 90 ° or in its other party
To), therefore spatial relation description word used herein should be interpreted accordingly.In addition, it will also be understood that being referred to as when one layer at two layers
" between " when, it can be only layer between described two layers, or there may also be one or more intervenient layers.
In the context of this application, structure of the described fisrt feature in the "upper" of second feature may include first
Be formed as the embodiment directly contacted with second feature, also may include that other feature is formed between the first and second features
Embodiment, such first and second feature may not be direct contact.
It is referred to as " on the other part " it should be appreciated that working as a component, " being connected to another component ", " is coupled in
When another component " or " contacting another component ", it can directly on another component, be connected or coupled to,
Or another component is contacted, or may exist insertion part.In contrast, when a component is referred to as " directly another
On a component ", " being directly connected in ", " being coupled directly to " or when " directly contact " another component, insertion part is not present.Together
Sample, when first component referred to as " is in electrical contact " or " being electrically coupled to " second component, in the first component and this second
There is the power path for allowing electric current flowing between part.The power path may include capacitor, the inductor of coupling and/or permission electricity
Other components of flowing, or even do not contacted directly between conductive component.
Fig. 1 is the diagrammatic cross-section of solar battery according to an embodiment of the invention.Refering to what is shown in Fig. 1, the solar energy
Battery includes substrate 100, the first transparent conductive film 201, the second transparent conductive film 301 and metal electrode 400.Substrate 100 can be with
It is monocrystalline silicon.The substrate 100 has certain thickness, such as 20-300 μm.Substrate 100 can be N-type substrate or P type substrate.
In an embodiment of the present invention, substrate 100 includes front and back, wherein front refers to receiving the one side of solar energy, the back side
Refer to positive opposite face.Refering to what is shown in Fig. 1, two surfaces of substrate 100 are divided into the front 200 and back side 300, wherein position
One side in top is front 200, and underlying one side is the back side 300.It is understood that Fig. 1 is only schematic diagram, at it
In his embodiment, can also by substrate 100 it is underlying be defined as on one side front 200, the one side being located above is determined
Position is the back side 300.First transparent conductive film 201 and the second transparent conductive film 301 are located on two surfaces of substrate 100.
In the present embodiment, the first transparent conductive film 201 is located at the front 200 of substrate 100, and the second transparent conductive film 301 is located at substrate
100 back side 300.First transparent conductive film 201 and the second transparent conductive film 301 can be tin indium oxide (ITO).
Metal electrode 400 is arranged in the first transparent conductive film 201 and the second transparent conductive film 301.In the present embodiment,
Illustratively show 4 metal electrodes 400, set in the first transparent conductive film 201 there are two metal electrode 400 as front
Electrode, sets that there are two metal electrodes 400 as rear electrode in the second transparent conductive film 301.In other examples, golden
The quantity for belonging to electrode 400 and position be not by limitation shown in FIG. 1.
In the present embodiment, metal electrode 400 can be silver electrode.
Emitter layer 203 and first are sequentially formed between the front 200 and the first transparent conductive film 201 of substrate 100
Surface passivation layer 202.Specifically, from 200 surface of front of substrate 100 toward the inside of substrate 100, it is followed successively by the first electrically conducting transparent
Film 201, first surface passivation layer 202 and emitter layer 203.The emitter layer 203 and substrate 100 form homojunction.First thoroughly
Bright conductive film 201 covers all surfaces of first surface passivation layer 202.
Second surface passivation layer 303 is sequentially formed between the back side of substrate 100 300 and the second transparent conductive film 301
With doped amorphous silicon layer 302.Specifically, from 300 surface of the back side of substrate 100 toward the inside of substrate 100, it is transparent to be followed successively by second
Conductive film 301, doped amorphous silicon layer 302 and second surface passivation layer 303.The second surface passivation layer 303, doped amorphous silicon layer
302 form hetero-junctions with substrate 100.The all surfaces of second transparent conductive film 301 covering doped amorphous silicon layer 302.
Wherein, emitter layer 203 and 100 transoid of substrate, doped amorphous silicon layer 302 and 100 homotype of substrate.Of the invention
In embodiment, substrate 100 can be N-type substrate, and emitter layer 203 is p-type at this time, and doped amorphous silicon layer 302 is N-type.P-type hair
Emitter layer 203 can be and adulterate boron in monocrystalline silicon, and doped amorphous silicon layer 302 can be N+ type (highly doped).Of the invention
In other embodiments, substrate 100 or P type substrate, emitter layer 203 is N-type at this time, and doped amorphous silicon layer 302 is P
Type.N-type emitter layer 203 can be and adulterate phosphorus in monocrystalline silicon, and doped amorphous silicon layer 302 can be P+ type (highly doped).?
The method that emitter layer 203 is formed on substrate 100 can be high-temperature diffusion method, chemical vapour deposition technique (CVD, Chemical
One or more of Vapor Deposition) or ion implantation etc..
First surface passivation layer 202 and/or second surface passivation layer 303 can be intrinsic amorphous silicon.First surface passivation
The preparation method of layer 202, second surface passivation layer 303 and doped amorphous silicon layer 302 can be plasma enhanced chemical vapor
Sedimentation (PECVD, Plasma Enhanced Chemical Vapor Deposition) etc..
The preparation method of first transparent conductive film 201 and the second transparent conductive film 301 can be physical vapour deposition (PVD) (PVD,
Physical Vapor Deposition) etc..
In another embodiment of the invention, it is additionally provided between the first transparent conductive film 201 and first surface passivation layer 202
One second doped amorphous silicon layer, second doped amorphous silicon layer and 203 homotype of emitter layer.For example, the second doped amorphous silicon layer
It is all p-type doping with emitter layer 203, or is all n-type doping.The thickness of second doped amorphous silicon layer can be 1-100nm.
The beneficial effect of embodiment illustrated in fig. 1 is, in solar cells the front 200 of silicon substrate 100 and intrinsic non-
Emitter layer 203 is provided between crystal silicon (first surface passivation layer 202), so as to reduce amorphous silicon and transparent conductive film
Thickness can reduce the parasitic absorption to light while improving the conductive capability of solar battery.
Fig. 2 is the diagrammatic cross-section of solar battery according to another embodiment of the present invention.Refering to what is shown in Fig. 2, this implementation
The solar battery and embodiment illustrated in fig. 1 of example are similarly, also transparent including substrate 100, the first transparent conductive film 201, second
Conductive film 301 and metal electrode 400.Hair is sequentially formed between the front 200 and the first transparent conductive film 201 of substrate 100
Emitter layer 203 and first surface passivation layer 202.The successively shape between the back side of substrate 100 300 and the second transparent conductive film 301
At having second surface passivation layer 303 and doped amorphous silicon layer 302.
Similarly with embodiment illustrated in fig. 1, metal electrode 400 can be silver electrode；Emitter layer is formed on substrate 100
203 method can be high-temperature diffusion method, chemical vapour deposition technique or ion implantation etc.；First surface passivation layer 202 and/or
Second surface passivation layer 303 can be intrinsic amorphous silicon.
Unlike embodiment shown in FIG. 1, in the present embodiment, the first transparent conductive film 201 covers first surface
The surface of 202 part of passivation layer, is not covered with the portion of the first transparent conductive film 201 on the surface of first surface passivation layer 202
Divide and is covered with passivating film 204.That is, some places are covered with the first transparent conductive film on first surface passivation layer 202
201, some places are covered with passivating film 204.In this embodiment, the second transparent conductive film 301 covers doped amorphous silicon layer 302
All surfaces.First transparent conductive film 201 and the second transparent conductive film 301 can be tungsten-doped indium oxide (IWO).First is transparent
The thickness of conductive film 201 can be 75-85nm.The thickness of second transparent conductive film 301 can be 28-32nm.
In the present embodiment, which can be silica (SiOx), aluminium oxide (AlOx) or silicon nitride (SiNx)
One or more of Deng.
In another embodiment of the invention, it is additionally provided between the first transparent conductive film 201 and first surface passivation layer 202
One second doped amorphous silicon layer, second doped amorphous silicon layer and 203 homotype of emitter layer.For example, the second doped amorphous silicon layer
It is all p-type doping with emitter layer 203, or is all n-type doping.Preferably, the cross-sectional area of second doped amorphous silicon layer with
First surface passivation layer 202 is identical.The thickness of second doped amorphous silicon layer can be 1-100nm.
Compared with embodiment illustrated in fig. 1, the beneficial effect of the present embodiment is: since the first transparent conductive film 201 is part
, there are also the better passivating films 204 of translucency on first surface passivation layer 202, and more light is made to be able to enter solar energy
Battery, so as to convert more electric currents.
Fig. 3 is the flow chart of the preparation method of solar battery according to an embodiment of the invention.This method flow chart pair
It should be in the embodiment of solar battery shown in FIG. 1.Fig. 4 A-4H is the preparation of solar battery according to an embodiment of the invention
The diagrammatic cross-section of the example process of method.Below with reference to shown in Fig. 3 and Fig. 4 A-4H, in preparation embodiment illustrated in fig. 1
The method of solar battery is illustrated:
Step 310: substrate 100 is provided.As shown in Figure 4 A, the silicon wafer of N-type or p-type can be used as substrate 100, and
It needs to handle the silicon wafer so that it is suitable for following steps.The processing includes using certain solution and additive pair
Silicon wafer carries out cleaning and two-sided making herbs into wool etc..
Step 320: forming emitter layer 203 in the front of substrate 100.With reference to shown in Fig. 4 B, it can be used in this step
The mode of High temperature diffusion once forms front side diffusion region domain 101 and back side diffusion area in the front 200 of substrate 100 and the back side 300
Domain 102, wherein the front side diffusion region domain 101 is formed emitter layer 203.When substrate 100 is N-type, adulterated using p-type
Boron diffusion, when substrate 100 be p-type when, using the phosphorus diffusion of n-type doping, to make emitter layer 203 and 100 transoid of substrate.
In the method for preparing solar battery, in the front 200 of substrate 100 and the back side 300, the primary diffusion zone that formed is more convenient,
However, will be located at due to the diffusion zone for not needing 100 back side 300 of substrate there is still a need for the method using single side etching
The back side diffusion region 102 at 100 back side 300 of substrate removes.As shown in Figure 4 C, after etching by single side, substrate 100 is only at it
Front 200 has front side diffusion region domain 101, that is, emitter layer 203.The thickness of emitter layer 203 can be 10-50 μm.
In this step, can using one of high-temperature diffusion method, chemical vapour deposition technique or ion implantation etc. or
It is several to form emitter layer 203.
Step 330: it is sequentially depositing second surface passivation layer 303 and doped amorphous silicon layer 302 at the back side of substrate 100 300,
And first surface passivation layer 202 is deposited on emitter layer 203.In this step, firstly, as shown in Figure 4 D, in substrate 100
The back side 300 deposit second surface passivation layer 303.In various embodiments, the thickness of second surface passivation layer 303 can be
1-10nm.Secondly, as shown in Figure 4 E, in the redeposited doped amorphous silicon layer 302 in the back side of substrate 100 300.In different embodiments
In, the thickness of doped amorphous silicon layer 302 can be 10-200nm.Again, as illustrated in figure 4f, is deposited on emitter layer 203
One surface passivation layer 202.In various embodiments, the thickness of first surface passivation layer 202 can be 5-7nm.
As it was noted above, first surface passivation layer 202 and/or second surface passivation layer 303 can be intrinsic amorphous silicon.The
The preparation method of one surface passivation layer 202, second surface passivation layer 303 and doped amorphous silicon layer 302 can be PECVD etc..
It should be noted that can be first deposited on the emitter layer 203 on 100 front 200 of substrate in this step
One surface passivation layer 202, then second surface passivation layer 303 and doped amorphous silicon layer are sequentially depositing at the back side of substrate 100 300
302；Can also second surface passivation layer 303 and doped amorphous silicon layer 302 first be sequentially depositing at the back side of substrate 100 300, then
First surface passivation layer 202 is deposited on emitter layer 203 on 100 front 200 of substrate；It can also be simultaneously in 100 front of substrate
First surface passivation layer 202 is deposited on emitter layer 203 on 200 and is sequentially depositing the second table at the back side of substrate 100 300
Then face passivation layer 303 deposits doped amorphous silicon layer 302 on second surface passivation layer 303 again.
Step 340: depositing the first transparent conductive film 201 in all surfaces of first surface passivation layer 202, and adulterating
The all surfaces of amorphous silicon layer 302 deposit the second transparent conductive film 301.With reference to shown in Fig. 4 G.First transparent conductive film, 201 He
Second transparent conductive film 301 can use PVD method in whole tables of first surface passivation layer 202 and doped amorphous silicon layer 302
Depositing indium tin oxide (ITO, Indium Tin Oxide) Lai Shixian on face.Wherein, the thickness of the first transparent conductive film 201 can be with
It is 30-80nm, the thickness of the second transparent conductive film 301 can be 30nm.
It should be noted that depositing the first electrically conducting transparent to all surfaces in first surface passivation layer 202 in this step
Film 201 and doped amorphous silicon layer 302 all surfaces deposit the second transparent conductive film 301 do not have sequence requirement.
Step 350: metal electrode 400 is formed in the first transparent conductive film 201 and the second transparent conductive film 301.With reference to
Shown in Fig. 4 H, this step forms respectively metal electrode 400 in the first transparent conductive film 201 and the second transparent conductive film 301.
The metal electrode 400 can be silver electrode.The method that this step can use silk-screen printing, in 201 He of the first transparent conductive film
The surface printing low temperature silver paste of second transparent conductive film 301, then drying sintering forms metal electrode 400 at high temperature.
Flow chart has been used to be used to illustrate operation performed by method according to an embodiment of the present application herein.It should be understood that
, the operation of front not necessarily accurately carries out in sequence.On the contrary, various steps can be handled according to inverted order or simultaneously
Suddenly.Meanwhile or during other operations are added to these, or from these processes remove a certain step or number step operation.For example, also
One second doped amorphous silicon layer is formed between the first transparent conductive film 201 and first surface passivation layer 202, second doping is non-
Crystal silicon layer and 203 homotype of emitter layer.Second doped amorphous silicon layer and emitter layer 203 can be all p-type doping, can also be same
For n-type doping.
Fig. 5 is the flow chart of the preparation method of solar battery according to another embodiment of the present invention.This method flow chart
Embodiment corresponding to solar battery shown in Fig. 2.Fig. 6 A-6J is solar battery according to another embodiment of the present invention
The diagrammatic cross-section of the example process of preparation method.Below with reference to shown in Fig. 5 and Fig. 6 A-6J, to preparation embodiment illustrated in fig. 2
In the method for solar battery be illustrated:
Step 510: substrate 100 is provided.As shown in Figure 6A, the silicon wafer of N-type or p-type can be used as substrate 100, and
It needs to handle the silicon wafer so that it is suitable for following steps.This step is similar with the step 310 in Fig. 3, specific
Method illustrate the description for seeing step 310.
Step 520: forming emitter layer 203 in the front of substrate 100.With reference to shown in Fig. 6 B, served as a contrast first in this step
The front 200 and the back side 300 at bottom 100 once form front side diffusion region domain 101 and back side diffusion region 102, wherein the front is expanded
It dissipates region 101 and is formed emitter layer 203.Secondly, carrying out single side etching with reference to shown in Fig. 6 C to substrate 100, removing substrate
The back side diffusion region 102 at 100 back sides 300, leaves behind the front side diffusion region domain 101 in 100 front 200 of substrate, that is, emits
Pole layer 203.
This step is similar with the step 320 in Fig. 3, wherein the specific method taken illustrates to see in the explanation of step 320
Hold.
Step 530: it is sequentially depositing second surface passivation layer 303 and doped amorphous silicon layer 302 at the back side of substrate 100 300,
And first surface passivation layer 202 is deposited on emitter layer 203.In this step, firstly, as shown in Figure 6 D, in substrate 100
The back side 300 deposit second surface passivation layer 303.Secondly, as illustrated in fig. 6e, at the back side of substrate 100 300, redeposited doping is non-
Crystal silicon layer 302.Again, as fig 6 f illustrates, first surface passivation layer 202 is deposited on emitter layer 203.
This step is similar with the step 330 in Fig. 3, wherein suitable about the thickness of the specific method, each layer taken, execution
The description for illustrating to see step 330 of sequence etc..
Step 540: depositing the first transparent conductive film 201 in the local surfaces of first surface passivation layer 202, and adulterating
The all surfaces of amorphous silicon layer 302 deposit the second transparent conductive film 301.This step and the step 340 in Fig. 3 are different.?
In this step, with reference to shown in Fig. 6 G, ITO first can be deposited using PVD method on all surfaces of doped amorphous silicon layer 302,
Form the second transparent conductive film 301.Second transparent conductive film, the 301 deposited overall doped amorphous silicon layer 302.Then, with reference to figure
Shown in 6H, ITO is deposited using PVD method in the local surfaces of first surface passivation layer 202, forms the first transparent conductive film
201.First transparent conductive film 201 can be made to be placed only in the local table of first surface passivation layer 202 using the method for mask
On face.The quantity of the local surfaces and position are not limited to shown in Fig. 6 H.
It should be noted that in this step, first first can also be covered in the local surfaces of first surface passivation layer 202
Transparent conductive film 201 (as shown in figure 6h), then the second transparent conductive film 301 is covered in all surfaces of doped amorphous silicon layer 302
(as shown in Figure 6 G).In other examples, the first transparent conductive film 201 and the second transparent conductive film 301 can also be simultaneously
It is prepared.
Step 350: depositing passivating film 204 in the other surfaces of first surface passivation layer 202.It, can be with reference to shown in Fig. 6 I
There is no the site deposition of the first transparent conductive film 201 blunt on first surface passivation layer 202 using such as PECVD and mask method
Change film 204.Passivating film 204 can be made of passivating material, and passivating material can be silica (SiOx), aluminium oxide (AlOx) or
Silicon nitride (SiNxOne or more of) etc..As shown in fig. 6i, passivating film 204 and the first transparent conductive film 201 are complete together
Cover first surface passivation layer 202.
Step 560: metal electrode 400 is formed in the first transparent conductive film 201 and the second transparent conductive film 301.With reference to
Shown in Fig. 6 J, this step forms respectively metal electrode 400 in the first transparent conductive film 201 and the second transparent conductive film 301.
The metal electrode 400 can be silver electrode.The method that this step can use silk-screen printing, in 201 He of the first transparent conductive film
The surface printing low temperature silver paste of second transparent conductive film 301, then drying sintering forms metal electrode 400 at high temperature.
Compared with the preparation method of solar battery shown in Fig. 3, the beneficial effect of preparation method shown in fig. 5 is:
Due to the first transparent conductive film 201 be it is local, there are also the better passivating film 204 of translucency on first surface passivation layer 202,
More light are made to be able to enter solar battery, so as to convert more electric currents.
Flow chart has been used to be used to illustrate operation performed by method according to an embodiment of the present application herein.It should be understood that
, the operation of front not necessarily accurately carries out in sequence.On the contrary, various steps can be handled according to inverted order or simultaneously
Suddenly.Meanwhile or during other operations are added to these, or from these processes remove a certain step or number step operation.For example, also
One second doped amorphous silicon layer is formed between the first transparent conductive film 201 and first surface passivation layer 202, second doping is non-
Crystal silicon layer and 203 homotype of emitter layer.Second doped amorphous silicon layer and emitter layer 203 can be all p-type doping, can also be same
For n-type doping.The cross-sectional area of second doped amorphous silicon layer can be identical as first surface passivation layer 202.
It is given below and carries out solar battery preparation using the preparation method of Fig. 3 and two kinds of solar batteries shown in fig. 5
Four specific embodiments.
Specific embodiment one
The present embodiment, as substrate 100, prepares the sun using technique below using the p type single crystal silicon piece of 3 ohmcms
Energy battery:
(1) cleaning and two-sided making herbs into wool are carried out to P-type wafer using KOH solution and additive.
(2) phosphorus diffusion is once formed in the front 200 of P-type wafer and the back side 300 by the way of 900 DEG C of phosphorus diffusions of high temperature
Area, that is, front side diffusion region domain 101 and back side diffusion region 102, sheet resistance reach 150 ohm of squares.Wherein, P-type wafer and
Front side diffusion region domain 101 forms emitter layer 203, and the emitter layer 203 and substrate 100 form homojunction.
(3) HF/HNO is used3Single side etching method removes the back side diffusion region 102 at the P-type wafer back side.HF/HNO3It is one
Kind HF and HNO3Mixed acid solution, for corroding to silicon wafer.Wherein, HF and HNO3Concentration proportion it is different, to silicon wafer
Corrosion rate is also different.
(4) second surface passivation layer is formed in 300 deposition intrinsic amorphous silicon of the back side of substrate 100 using PECVD method
303.The intrinsic amorphous silicon deposited with a thickness of 7nm.
(5) continue to deposit P-type non-crystalline silicon at the back side of substrate 100 300 using PECVD method, form doped amorphous silicon layer
302.The P-type non-crystalline silicon deposited with a thickness of 40nm.The P-type non-crystalline silicon layer is completely covered on as second surface passivation layer
In 303 intrinsic amorphous silicon layer.The second surface passivation layer 303, doped amorphous silicon layer 302 and substrate 100 form hetero-junctions.
(6) first surface passivation layer is formed in 200 deposition intrinsic amorphous silicon of the front of substrate 100 using PECVD method
202.The intrinsic amorphous silicon deposited with a thickness of 7nm.
(7) continue to deposit ITO in the front 200 of substrate 100 and the back side 300 by the way of PVD, correspond respectively to first
Transparent conductive film 201 and the second transparent conductive film 301.The thickness of first transparent conductive film 201 and the second transparent conductive film 301
It is 30nm.
(8) using the surface printing low-temperature silver for being screen printed onto the first transparent conductive film 201 and the second transparent conductive film 301
Slurry, then the metal electrode 400 at formation front 200 and the back side 300 after 210 DEG C of at a temperature of drying is sintered.
Specific embodiment two
Using the n type single crystal silicon piece of 3 ohmcms as substrate 100, solar battery is prepared using technique below:
(1) cleaning and two-sided making herbs into wool are carried out to N-type silicon chip using KOH solution and additive.
(2) boron diffusion is once formed in the front 200 of N-type silicon chip and the back side 300 by the way of 900 DEG C of boron diffusions of high temperature
Area, that is, front side diffusion region domain 101 and back side diffusion region 102, sheet resistance reach 180 ohm of squares.Wherein, N-type silicon chip and
Front side diffusion region domain 101 forms emitter layer 203, and the emitter layer 203 and substrate 100 form homojunction.
(3) the back side diffusion region 102 at the N-type silicon chip back side is removed using HF/HNO3 single side etching method.
(4) second surface passivation layer is formed in 300 deposition intrinsic amorphous silicon of the back side of substrate 100 using PECVD method
303.The intrinsic amorphous silicon deposited with a thickness of 5nm.
(5) deposited n-type amorphous silicon is continued at the back side of substrate 100 300 using PECVD method, forms doped amorphous silicon layer
302.The N-type amorphous silicon deposited with a thickness of 40nm.The N-type non-crystalline silicon layer is completely covered on as second surface passivation layer
In 303 intrinsic amorphous silicon layer.The second surface passivation layer 303, doped amorphous silicon layer 302 and substrate 100 form hetero-junctions.
(6) first surface passivation layer is formed in 200 deposition intrinsic amorphous silicon of the front of substrate 100 using PECVD method
202.The intrinsic amorphous silicon deposited with a thickness of 5nm.
(7) ITO is deposited in the front 200 of substrate 100 and the back side 300 by the way of PVD, it is transparent corresponds respectively to first
Conductive film 201 and the second transparent conductive film 301.The thickness of first transparent conductive film 201 and the second transparent conductive film 301 is
30nm.
(8) using the surface printing low-temperature silver for being screen printed onto the first transparent conductive film 201 and the second transparent conductive film 301
Slurry, then the metal electrode 400 at formation front 200 and the back side 300 after 200 DEG C of at a temperature of drying is sintered.
Specific embodiment three
Using the p type single crystal silicon piece of 5 ohmcms as substrate 100, solar battery is prepared using technique below:
(1) cleaning and two-sided making herbs into wool are carried out to P-type wafer using KOH solution and additive.
(2) phosphorus diffusion is once formed in the front 200 of P-type wafer and the back side 300 by the way of 920 DEG C of phosphorus diffusions of high temperature
Area, that is, front side diffusion region domain 101 and back side diffusion region 102, sheet resistance reach 200 ohm of squares.Wherein, P-type wafer and
Front side diffusion region domain 101 forms emitter layer 203, and the emitter layer 203 and substrate 100 form homojunction.
(3) the back side diffusion region 102 at the P-type wafer back side is removed using HF/HNO3 single side etching method.
(4) second surface passivation layer is formed in 300 deposition intrinsic amorphous silicon of the back side of substrate 100 using PECVD method
303.The intrinsic amorphous silicon deposited with a thickness of 6nm.
(5) continue to deposit P-type non-crystalline silicon at the back side of substrate 100 300 using PECVD method, form doped amorphous silicon layer
302.The P-type non-crystalline silicon deposited with a thickness of 100nm.The P-type non-crystalline silicon layer is completely covered on as second surface passivation layer
In 303 intrinsic amorphous silicon layer.The second surface passivation layer 303, doped amorphous silicon layer 302 and substrate 100 form hetero-junctions.
(6) first surface passivation layer is formed in 200 deposition intrinsic amorphous silicon of the front of substrate 100 using PECVD method
202.The intrinsic amorphous silicon deposited with a thickness of 6nm.
(7) IWO (tungsten-doped indium oxide) is deposited at the back side of substrate 100 300 by the way of PVD, formation second is transparent to be led
Electrolemma 301.The IWO deposited is with a thickness of 30nm.
(8) the first transparent conductive film 201 is formed in 200 local deposits IWO of the front of substrate 100 by the way of PVD.
The IWO deposited is with a thickness of 80nm.
(9) in the non-IWO area deposition AlO in the front of substrate 100 200 by the way of PECVDx, form passivating film 204.
The AlO depositedxWith a thickness of 80nm.
(10) using the surface printing low temperature for being screen printed onto the first transparent conductive film 201 and the second transparent conductive film 301
Silver paste, then the metal electrode 400 at formation front 200 and the back side 300 after 230 DEG C of at a temperature of drying is sintered.
Specific embodiment four
Using the n type single crystal silicon piece of 5 ohmcms as substrate, solar battery is prepared using technique below:
(1) cleaning and two-sided making herbs into wool are carried out to N-type silicon chip using KOH solution and additive.
(2) boron diffusion is once formed in the front 200 of N-type silicon chip and the back side 300 by the way of 920 DEG C of boron diffusions of high temperature
Area, that is, front side diffusion region domain 101 and back side diffusion region 102, sheet resistance reach 200 ohm of squares.Wherein, N-type silicon chip and
Front side diffusion region domain 101 forms emitter layer 203, and the emitter layer 203 and substrate 100 form homojunction.
(3) the back side diffusion region 102 at the N-type silicon chip back side is removed using HF/HNO3 single side etching method.
(4) second surface passivation layer is formed in 300 deposition intrinsic amorphous silicon of the back side of substrate 100 using PECVD method
303.The intrinsic amorphous silicon deposited with a thickness of 6nm.
(5) deposited n-type amorphous silicon is continued at the back side of substrate 100 300 using PECVD method, forms doped amorphous silicon layer
302.The N-type amorphous silicon deposited with a thickness of 100nm.The N-type non-crystalline silicon layer is completely covered on as second surface passivation layer
In 303 intrinsic amorphous silicon layer.The second surface passivation layer 303, doped amorphous silicon layer 302 and substrate 100 form hetero-junctions.
(6) first surface passivation layer is formed in 200 deposition intrinsic amorphous silicon of the front of substrate 100 using PECVD method
202.The intrinsic amorphous silicon deposited with a thickness of 6nm.
(7) IWO is deposited at the back side of substrate 100 300 by the way of PVD, forms the second transparent conductive film 301.It sinks
Long-pending IWO is with a thickness of 30nm.
(8) the first transparent conductive film is formed in 200 local deposits IWO of the front of substrate 100 by the way of PVD
201.The IWO deposited is with a thickness of 80nm.
(9) in the non-IWO area deposition SiN in the front of substrate 100 200 by the way of PECVDx, form passivating film 204.
The SiN depositedxWith a thickness of 80nm.
(10) using the surface printing low temperature for being screen printed onto the first transparent conductive film 201 and the second transparent conductive film 301
Silver paste, then the metal electrode 400 at formation front 200 and the back side 300 after 200 DEG C of at a temperature of drying is sintered.
The application has used particular words to describe embodiments herein.As " one embodiment ", " embodiment ",
And/or " some embodiments " means a certain feature relevant at least one embodiment of the application, structure or feature.Therefore, it answers
Emphasize and it is noted that " embodiment " or " one embodiment " that is referred to twice or repeatedly in this specification in different location or
" alternate embodiment " is not necessarily meant to refer to the same embodiment.In addition, certain in one or more embodiments of the application
Feature, structure or feature can carry out combination appropriate.
Although the present invention is described with reference to current specific embodiment, those of ordinary skill in the art
It should be appreciated that above embodiment is intended merely to illustrate the present invention, can also make in the case where no disengaging spirit of that invention
Various equivalent change or replacement out, therefore, as long as to the variation of above-described embodiment, change in spirit of the invention
Type will all be fallen in the range of following claims.
Claims (16)
1. a kind of homogeneity-heterojunction solar battery, including substrate, the first transparent conductive film, the second transparent conductive film and metal
Electrode, first transparent conductive film and second transparent conductive film are equipped with the metal electrode, which is characterized in that
It is sequentially formed with emitter layer and first surface passivation layer between positive and described first transparent conductive film of the substrate,
The emitter layer and the substrate form homojunction；Successively shape between the back side of the substrate and second transparent conductive film
At having second surface passivation layer and a doped amorphous silicon layer, the second surface passivation layer, the doped amorphous silicon layer and the lining
Bottom forms hetero-junctions；
Wherein, the emitter layer and the substrate transoid, the doped amorphous silicon layer and the substrate homotype.
2. homogeneity-heterojunction solar battery according to claim 1, which is characterized in that first transparent conductive film
The all surfaces of the first surface passivation layer are covered, second transparent conductive film covers the whole of the doped amorphous silicon layer
Surface.
3. homogeneity-heterojunction solar battery according to claim 1, which is characterized in that first transparent conductive film
The local surfaces of the first surface passivation layer are covered, other surfaces of the first surface passivation layer are covered with passivating film, institute
State all surfaces that the second transparent conductive film covers the doped amorphous silicon layer.
4. homogeneity-heterojunction solar battery according to claim 3, which is characterized in that the passivating film be silica,
Aluminium oxide or silicon nitride.
5. homogeneity-heterojunction solar battery according to claim 1, which is characterized in that use high-temperature diffusion method, chemistry
Vapour deposition process or ion implantation form emitter layer over the substrate.
6. homogeneity-heterojunction solar battery according to claim 1, which is characterized in that the first surface passivation layer
And/or the second surface passivation layer is intrinsic amorphous silicon.
7. homogeneity-heterojunction solar battery according to claim 2, which is characterized in that first transparent conductive film
One second doped amorphous silicon layer, second doped amorphous silicon layer and the hair are additionally provided between the first surface passivation layer
Emitter layer homotype.
8. homogeneity-heterojunction solar battery according to claim 3, which is characterized in that first transparent conductive film
One second doped amorphous silicon layer, second doped amorphous silicon layer and the hair are additionally provided between the first surface passivation layer
Emitter layer homotype.
9. homogeneity-heterojunction solar battery according to claim 8, which is characterized in that second doped amorphous silicon
The cross-sectional area of layer is identical as the first surface passivation layer.
10. a kind of preparation method of homogeneity-heterojunction solar battery, the preparation method include:
Substrate is provided；
Emitter layer is formed in the front of the substrate；
It is sequentially depositing second surface passivation layer and doped amorphous silicon layer at the back side of the substrate, and on the emitter layer
Deposit first surface passivation layer；
The first transparent conductive film is deposited in all surfaces of the first surface passivation layer, and in the doped amorphous silicon layer
All surfaces deposit the second transparent conductive film；
Metal electrode is formed in first transparent conductive film and second transparent conductive film.
11. the preparation method of homogeneity-heterojunction solar battery according to claim 10, which is characterized in that using high
Warm diffusion method, chemical vapour deposition technique or ion implantation form emitter layer over the substrate.
12. the preparation method of homogeneity-heterojunction solar battery according to claim 10, which is characterized in that also in institute
One second doped amorphous silicon layer of formation between the first transparent conductive film and the first surface passivation layer is stated, second doping is non-
Crystal silicon layer and the emitter layer homotype.
13. a kind of preparation method of homogeneity-heterojunction solar battery, the preparation method include:
Substrate is provided；
Emitter layer is formed in the front of the substrate；
It is sequentially depositing second surface passivation layer and doped amorphous silicon layer at the back side of the substrate, and on the emitter layer
Deposit first surface passivation layer；
The first transparent conductive film is deposited in the local surfaces of the first surface passivation layer, and in the first surface passivation layer
Other surfaces cover passivating film, and deposit the second transparent conductive film in all surfaces of the doped amorphous silicon layer；
Metal electrode is formed in first transparent conductive film and second transparent conductive film.
14. the preparation method of homogeneity-heterojunction solar battery according to claim 13, which is characterized in that described blunt
Change film is silica, aluminium oxide or silicon nitride.
15. the preparation method of homogeneity-heterojunction solar battery according to claim 13, which is characterized in that also in institute
One second doped amorphous silicon layer of formation between the first transparent conductive film and the first surface passivation layer is stated, second doping is non-
Crystal silicon layer and the emitter layer homotype.
16. the preparation method of homogeneity-heterojunction solar battery according to claim 15, which is characterized in that described
The cross-sectional area of two doped amorphous silicon layers is identical as the first surface passivation layer.
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