CN109948306A

CN109948306A - Integrated analogue system

Info

Publication number: CN109948306A
Application number: CN201910366068.4A
Authority: CN
Inventors: 沈佑良
Original assignee: Wuxi Silicon Jie Microelectronics Co Ltd
Current assignee: Wuxi Silicon Jie Microelectronics Co Ltd
Priority date: 2019-05-05
Filing date: 2019-05-05
Publication date: 2019-06-28
Anticipated expiration: 2039-05-05
Also published as: CN109948306B

Abstract

The present invention provides a kind of integrated analogue system, including computer, FPGA DLM digital line module, multiple analogue simulation modules, chip program memory, user's emulator memory, user's test port；The computer connects FPGA DLM digital line module, and FPGA DLM digital line module is separately connected chip program memory, user's emulator memory, user's test port；Each analogue simulation module flow is connect in a chip, and respectively with FPGA DLM digital line module；The FPGA DLM digital line module for realizing emulation chip Digital Logical Circuits；The multiple analogue simulation module for realizing emulation chip analog portion circuit.Emulation for more actual chips is not necessarily to multiple flow, reduces flow cost and risk present invention only requires using a set of analogue system can be realized.

Description

Integrated analogue system

Technical field

The present invention relates to chip emulation technical field, especially a kind of integrated analogue system.

Background technique

Traditional analogue system based on emulation chip, an emulation chip i.e. one actual chips of corresponding emulation, more Actual chips need more emulation chips to be emulated, this not only needs very expensive flow expense, it is also necessary to very long The flow period, Chevron Research Company (CRC) also needs to undertake certain flow risk, is unfavorable for the Rapid Popularization to chip.

Summary of the invention

It is right it is an object of the present invention to overcome the shortcomings of the prior art and provide a kind of integrated analogue system In the emulation of more actual chips, it is only necessary to can be realized using a set of analogue system, be not necessarily to multiple flow, reduce flow Cost and risk.The technical solution adopted by the present invention is that:

A kind of integrated analogue system, including computer, FPGA DLM digital line module, multiple analogue simulation modules, chip journey Sequence memory, user's emulator memory, user's test port；

The computer connects FPGA DLM digital line module, and FPGA DLM digital line module is separately connected chip program memory, uses Family emulator memory, user's test port；Each analogue simulation module flow is digital with FPGA in a chip, and respectively Line module connection；

The FPGA DLM digital line module for realizing emulation chip Digital Logical Circuits；The multiple analogue simulation module is used In the analog portion circuit for realizing emulation chip.

Further, the multiple analogue simulation module includes GPIO emulation module, LVD reset emulation module, external crystalline substance Shake emulation module, comparator emulation module, ADC emulation module and EEPROM emulation module.

Further, for storing the chips wire distance for realizing emulation chip logic in the chip program memory Sequence.

Further, realize that the user of emulation chip function emulates journey for storing in user's emulator memory Sequence.

Further, chip program memory can mnemonic using power down.

Further, user's emulator memory uses power down volatile memory.

Further, when emulating actual chips, the route program of actual chips is downloaded to chip program from computer and is deposited Reservoir realizes the connection of emulation chip internal logic by FPGA DLM digital line module, exports simulation result from user's test port；

Emulation chip include FPGA DLM digital line module in analogue system, multiple analogue simulation modules, chip program memory, User's emulator memory.

The present invention has the advantages that

1) compared to the simple analogue system based on FPGA, analogue system proposed by the present invention is by analogue simulation module flow Afterwards, the circuit function that FPGA can not be emulated can be emulated, and there is more accurate simulation result.

2) for the emulation of more actual chips, this analogue system is not necessarily to multiple flow, substantially reduces flow cost and wind Danger, and use is more convenient.

Detailed description of the invention

Fig. 1 is structure composition schematic diagram of the invention.

Specific embodiment

Below with reference to specific drawings and examples, the invention will be further described.

As shown in Figure 1, the analogue system that one kind proposed by the present invention is integrated, including computer 1, FPGA digital circuit mould Block 2, multiple analogue simulation modules 3, chip program memory 4, user's emulator memory 5, user's test port 6；

The computer 1 connects FPGA DLM digital line module 2 by USB line road, and FPGA DLM digital line module 2 is separately connected chip Program storage 4, user's emulator memory 5, user's test port 6；Each 3 flow of analogue simulation module is in a chip In, and connect respectively with FPGA DLM digital line module 2；

The FPGA DLM digital line module 2 for realizing emulation chip Digital Logical Circuits；The multiple analogue simulation module 3 For realizing the analog portion circuit of emulation chip；

The multiple analogue simulation module 3 includes GPIO emulation module, LVD reset emulation module, external crystal oscillator emulation module, ratio Compared with device emulation module, ADC emulation module, EEPROM emulation module；

Storage chip route program is used in the chip program memory 4, chips wire distance sequence to realize the logic of emulation chip Route, such as FPGA DLM digital line module 2 have been separately connected GPIO emulation module, external crystal oscillator emulation module and ADC emulation mould Block；The FLASH memory that chip program memory 4 can be remembered using power down；

For storing user's simulated program in user's emulator memory 5, user's simulated program realizes emulation chip Function, such as the pwm signal control program of signal sampling program or driving motor；User's emulator memory 5 uses Electric volatile memory, such as SRAM；

The integrated rear flow of the analog module of multiple chips can be substantially reduced flow cost, and can emulate more cores by the present invention Piece；The multiple analogue simulation module 3, each analogue simulation module 3 is realized by corresponding hardware circuit, these are emulated Flow together after analog module is integrated, is fabricated to a chip, so that it may which support emulates a variety of actual chips；

Such as the actual chips for needing to emulate have A chip, B chip, C chip, D chip；A resources of chip be GPIO+LVD reset+ External crystal oscillator；B resources of chip is GPIO+LVD reset+external crystal oscillator+comparator；C resources of chip be GPIO+LVD reset+it is external Crystal oscillator+ADC；D resources of chip is GPIO+LVD reset+external crystal oscillator+EEPROM；

When emulating A chip, it is downloaded to chip program memory 4 from computer 1 by the route program of A chip, passes through FPGA number Line module 2 realizes the connection of emulation chip internal logic, as FPGA DLM digital line module 2 connects GPIO emulation module, LVD resets Emulation module, external crystal oscillator emulation module；FPGA DLM digital line module 2 is field programmable gate array, can be realized circuit according to According to program field change；In the analogue system, FPGA DLM digital line module 2, multiple analogue simulation modules 3, chip program are deposited Reservoir 4 and user's emulator memory 5 can regard the emulation chip that an internal circuit and resources of chip can be changed as；It is surveyed from user It tries port 6 and exports simulation result.Similarly can be to B chip, C chip, D chip is emulated.

Some terms of the present invention are explained as follows:

The general purpose input/output end port of GPIO---.

LVD resets --- and the detection of-low pressure resets.

ADC---- analog-to-digital conversion.

FPGA---- field programmable gate array.

It should be noted last that the above specific embodiment is only used to illustrate the technical scheme of the present invention and not to limit it, Although being described the invention in detail referring to example, those skilled in the art should understand that, it can be to the present invention Technical solution be modified or replaced equivalently, without departing from the spirit and scope of the technical solution of the present invention, should all cover In the scope of the claims of the present invention.

Claims

1. a kind of integrated analogue system, which is characterized in that including computer (1), FPGA DLM digital line module (2), multiple Analogue simulation module (3), chip program memory (4), user's emulator memory (5), user's test port (6)；

The computer (1) connects FPGA DLM digital line module (2), and FPGA DLM digital line module (2) is separately connected chip program Memory (4), user's emulator memory (5), user's test port (6)；Each analogue simulation module (3) flow is in a core In piece, and it is connect respectively with FPGA DLM digital line module (2)；

The FPGA DLM digital line module (2) for realizing emulation chip Digital Logical Circuits；The multiple analogue simulation mould Block (3) for realizing emulation chip analog portion circuit.

2. integrated analogue system as described in claim 1, which is characterized in that

The multiple analogue simulation module (3) include GPIO emulation module, LVD reset emulation module, external crystal oscillator emulation module, Comparator emulation module, ADC emulation module and EEPROM emulation module.

3. integrated analogue system as described in claim 1, which is characterized in that

For storing the chips wire distance sequence for realizing emulation chip logic in the chip program memory (4).

4. integrated analogue system as described in claim 1, which is characterized in that

For storing the user's simulated program for realizing emulation chip function in user's emulator memory (5).

5. integrated analogue system as described in claim 1, which is characterized in that

Chip program memory (4) can mnemonic using power down.

6. integrated analogue system as described in claim 1, which is characterized in that

User's emulator memory (5) uses power down volatile memory.

7. integrated analogue system as described in claim 1, which is characterized in that

When emulating actual chips, chip program memory (4) are downloaded to from computer (1) by the route program of actual chips, are led to It crosses FPGA DLM digital line module (2) and realizes the connection of emulation chip internal logic, export simulation result from user's test port (6)；

Emulation chip includes FPGA DLM digital line module (2) in analogue system, multiple analogue simulation modules (3), chip program Memory (4), user's emulator memory (5).