CN109671818A - A kind of gallium nitride based LED epitaxial slice and preparation method thereof - Google Patents
A kind of gallium nitride based LED epitaxial slice and preparation method thereof Download PDFInfo
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- CN109671818A CN109671818A CN201811433646.3A CN201811433646A CN109671818A CN 109671818 A CN109671818 A CN 109671818A CN 201811433646 A CN201811433646 A CN 201811433646A CN 109671818 A CN109671818 A CN 109671818A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
Abstract
The invention discloses a kind of gallium nitride based LED epitaxial slices and preparation method thereof, belong to technical field of semiconductors.Gallium nitride based LED epitaxial slice includes substrate, buffer layer, n type semiconductor layer, active layer and p type semiconductor layer, buffer layer, n type semiconductor layer, active layer and p type semiconductor layer stack gradually on substrate, gallium nitride based LED epitaxial slice further includes graphene powder and the first hydrogenation boron layer, graphene powder tiles on the buffer layer, and the first hydrogenation boron layer is laid on the buffer layer exposed in graphene powder and graphene powder.The present invention passes through the one layer of graphene powder that first tile on the buffer layer, boron hydride layer is laid on the buffer layer exposed in graphene powder and graphene powder again, the heating conduction of graphene is fine, the heating conduction of boron hydride is not also poor simultaneously, the heat that epitaxial growth can quickly be transmitted improves the uniformity and consistency of epitaxial wafer.
Description
Technical field
The present invention relates to technical field of semiconductors, in particular to a kind of gallium nitride based LED epitaxial slice and its preparation
Method.
Background technique
Light emitting diode (English: Light Emitting Diode, referred to as: LED) it is a kind of semi-conductor electricity that can be luminous
Subcomponent.Gallium nitride (GaN) has good thermal conductivity, while having the good characteristics such as high temperature resistant, acid and alkali-resistance, high rigidity,
Gallium nitride (GaN) base LED is set to receive more and more attention and study.
Epitaxial wafer is the primary finished product in LED preparation process.Existing LED epitaxial wafer includes substrate, buffer layer, N-type half
Conductor layer, active layer and p type semiconductor layer, buffer layer, n type semiconductor layer, active layer and p type semiconductor layer are sequentially laminated on lining
On bottom.Substrate is used to provide growing surface for epitaxial material, and buffer layer is used to provide nuclearing centre, N for the growth of epitaxial material
Type semiconductor layer is used to provide the electronics for carrying out recombination luminescence, and p type semiconductor layer is used to provide the hole for carrying out recombination luminescence, have
The radiation recombination that active layer is used to carry out electrons and holes shines.
In the implementation of the present invention, the inventor finds that the existing technology has at least the following problems:
The material of substrate generally uses silicon carbide, sapphire or silicon, buffer layer, n type semiconductor layer, active layer and p-type
The material of semiconductor layer generally uses gallium nitride-based material, and the lattice constant difference of substrate material and gallium nitride-based material is larger,
Causing can cumulative stress and defect in epitaxial process.Epitaxial wafer will appear warpage under the action of stress.Since extension is raw
Long heat is that from substrate bottom, transmitting comes up, therefore warpage occurs in epitaxial wafer will cause the edge and central absorbent of epitaxial wafer
Heat it is inconsistent, influence the uniformity and consistency of epitaxial wafer.
Summary of the invention
The embodiment of the invention provides a kind of gallium nitride based LED epitaxial slice and preparation method thereof, it is able to solve existing
There is the problem of uniformity and consistency of technique influence epitaxial wafer.The technical solution is as follows:
On the one hand, the embodiment of the invention provides a kind of gallium nitride based LED epitaxial slice, the gallium nitride base hairs
Optical diode epitaxial wafer includes substrate, buffer layer, n type semiconductor layer, active layer and p type semiconductor layer, the buffer layer, described
N type semiconductor layer, the active layer and the p type semiconductor layer stack gradually over the substrate, the gallium nitride base light emitting
Diode epitaxial slice further includes graphene powder and the first hydrogenation boron layer, and the graphene powder is laid on the buffer layer,
The first hydrogenation boron layer is laid on the buffer layer exposed in the graphene powder and the graphene powder.
Optionally, the partial size of each particle is 0.5nm~5nm in the graphene powder.
Preferably, 1.5 times with a thickness of the partial size of each particle in the graphene powder of the first hydrogenation boron layer
~5 times.
It is highly preferred that it is described first hydrogenation boron layer with a thickness of 1nm~9nm.
Optionally, the gallium nitride based LED epitaxial slice further includes the second hydrogenation boron layer, second boron hydride
Layer is arranged between the graphene powder and the buffer layer.
Preferably, the thickness of the second hydrogenation boron layer is identical as the first hydrogenation thickness of boron layer.
On the other hand, the embodiment of the invention provides a kind of preparation method of gallium nitride based LED epitaxial slice, institutes
Stating preparation method includes:
Buffer layer is formed on the substrate；
One layer of graphene powder is laid on the buffer layer；
The first hydrogenation boron layer is formed on the buffer layer exposed in the graphene powder and the graphene powder；
N type semiconductor layer, active layer and p type semiconductor layer are sequentially formed in the first hydrogenation boron layer.
It is optionally, described that one layer of graphene powder is laid on the buffer layer, comprising:
Graphene powder is configured to graphene solution；
The graphene solution is uniformly laid on the buffer layer using photoresist spinner；
Graphene solution on the buffer layer is heated, the graphene solution on the buffer layer becomes graphene
Powder.
Optionally, the first hydrogenation is formed on the buffer layer between the graphene powder and the graphene powder
Boron layer, comprising:
One organic solution for being placed with ion exchange resin is provided；
By MgB2The organic solution, the MgB is added in powder2Powder is reacted with the ion exchange resin, generates dissolution
In the boron hydride in the organic solution and the magnesium-containing compound being deposited in the organic solution；
The magnesium-containing compound in the organic solution is filtered out, the organic solution dissolved with boron hydride is obtained；
The organic solution dissolved with boron hydride is uniformly laid on the graphene powder and the graphite using photoresist spinner
On buffer layer between alkene powder；
Organic solution dissolved with boron hydride is heated, the organic solution dissolved with boron hydride becomes the first boron hydride
Layer.
Preferably, the preparation method further include:
It is laid with before one layer of graphene powder on the buffer layer, forms the second hydrogenation boron layer on the buffer layer.
Technical solution provided in an embodiment of the present invention has the benefit that
By the one layer of graphene powder that first tile on the buffer layer, then expose in graphene powder and graphene powder
Boron hydride layer is laid on buffer layer, thus using hydrogenation boron layer that graphene powder is fixed on the buffer layer.Graphene it is thermally conductive
Performance is fine, while the heating conduction of boron hydride is not also poor, on the buffer layer tile one layer of graphene powder and by be laid with hydrogen
Change boron layer to be fixed, can quickly transmit the heat of epitaxial growth, balance the edge of epitaxial wafer and the heat of central absorbent, mention
The uniformity and consistency of high epitaxial wafer.And graphene powder with the extension that hydrogenation boron layer corresponds to power there is certain blocking to make
With, the accumulation of stress in epitaxial process can be alleviated, improve the warpage of epitaxial wafer, further increase epitaxial wafer edge and
The consistency of central absorbent heat, the final uniformity and consistency for improving epitaxial wafer.
Detailed description of the invention
To describe the technical solutions in the embodiments of the present invention more clearly, make required in being described below to embodiment
Attached drawing is briefly described, it should be apparent that, drawings in the following description are only some embodiments of the invention, for
For those of ordinary skill in the art, without creative efforts, it can also be obtained according to these attached drawings other
Attached drawing.
Fig. 1 is a kind of structural schematic diagram of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention；
Fig. 2 is a kind of process of the preparation method of gallium nitride based LED epitaxial slice provided in an embodiment of the present invention
Figure.
Specific embodiment
To make the object, technical solutions and advantages of the present invention clearer, below in conjunction with attached drawing to embodiment party of the present invention
Formula is described in further detail.
The embodiment of the invention provides a kind of gallium nitride based LED epitaxial slices.Fig. 1 provides for the embodiment of the present invention
A kind of gallium nitride based LED epitaxial slice structural schematic diagram.Referring to Fig. 1, the gallium nitride based LED epitaxial slice
Boron layer 40, n type semiconductor layer 50, active layer 60 and p-type half is hydrogenated including substrate 10, buffer layer 20, graphene powder 30, first
Conductor layer 70.
In the present embodiment, buffer layer 20 is laid on substrate 10, and graphene powder 30 is laid on buffer layer 20, and first
Hydrogenation boron layer 40 is laid on the buffer layer 20 exposed in graphene powder 30 and graphene powder 30.N type semiconductor layer 50,
Active layer 60 and p type semiconductor layer 70 are sequentially laminated in the first hydrogenation boron layer 40.
It should be noted that boron hydride refers to the substance formed after the hydrogenation of boron simple substance, such as B4H4Or B1H1.Due to boron list
Matter is unstable, but the substance formed after the hydrogenation of boron simple substance is more stable, and property is similar with boron simple substance, therefore the present embodiment is adopted
It is realized with boron hydride.
The embodiment of the present invention passes through the one layer of graphene powder that first tile on the buffer layer, then in graphene powder and graphene
Boron hydride layer is laid on the buffer layer exposed in powder, thus using hydrogenation boron layer that graphene powder is fixed on the buffer layer.
The heating conduction of graphene is fine, while the heating conduction of boron hydride is not also poor, and tile one layer of graphene powder on the buffer layer
And be fixed by being laid with hydrogenation boron layer, the heat of epitaxial growth can be quickly transmitted, the edge and center of epitaxial wafer are balanced
The heat of absorption improves the uniformity and consistency of epitaxial wafer.And graphene powder corresponds to the extension tool of power with hydrogenation boron layer
There is certain barrier effect, the accumulation of stress in epitaxial process can be alleviated, improves the warpage of epitaxial wafer, further increase
The edge of epitaxial wafer and the consistency of central absorbent heat, the final uniformity and consistency for improving epitaxial wafer.
Optionally, the partial size of each particle can be 0.5nm~5nm in graphene powder 30, raw quickly to transmit extension
Long heat improves the uniformity and consistency of epitaxial wafer.
Preferably, the thickness of the first hydrogenation boron layer 40 can be 1.5 times of the partial size of each particle in graphene powder 30
It is~5 times, graphene powder is fixed on the buffer layer, while the lattice for not interfering with gallium nitride extends, subsequent extension
Material can be with normal growth.
It is highly preferred that the thickness of the first hydrogenation boron layer 40 can be 1nm~9nm, realize that effect is good.
Optionally, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include the second hydrogenation boron layer 80,
Second hydrogenation boron layer 80 is arranged between graphene powder 30 and buffer layer 20, to pass through the first hydrogenation boron layer and the second boron hydride
Layer wraps up graphene powder, and better heat-radiation effect can effectively improve the uniformity and consistency of epitaxial wafer.
Preferably, the thickness of the second hydrogenation boron layer 80 can be identical as the first hydrogenation thickness of boron layer 40, realizes that effect is good.
Specifically, the material of substrate 10 can use sapphire, preferably graphical sapphire substrate (English:
Patterned Sapphire Substrate, referred to as: PSS).The material of buffer layer 20 can use undoped gallium nitride
(GaN) or aluminium nitride (AlN).The material of n type semiconductor layer 50 can use the gallium nitride of n-type doping (such as silicon).Active layer
60 may include that multiple Quantum Well and multiple quantum are built, and multiple Quantum Well and multiple quantum build alternately laminated setting；Quantum Well
Material can use InGaN (InGaN), such as InxGa1-xN, 0 < x < 1, the material that quantum is built can use gallium nitride.P-type
The material of semiconductor layer 70 can be using the gallium nitride of p-type doping (such as magnesium).
Further, the thickness of buffer layer 20 can be 15nm~35nm, preferably 25nm.The thickness of n type semiconductor layer 50
Degree can be 1 μm~5 μm, preferably 3 μm；The doping concentration of N type dopant can be 10 in n type semiconductor layer 5018/cm3~
1019/cm3, preferably 5*1018/cm3.The thickness of Quantum Well can be 2.5nm~3.5nm, preferably 3nm；The thickness that quantum is built
It can be 9nm~20nm, preferably 15nm；The quantity of Quantum Well is identical as the quantity that quantum is built, and the quantity that quantum is built can be 5
It is a~15, preferably 10.The thickness of p type semiconductor layer 70 can be 100nm~800nm, preferably 450nm；P-type is partly led
The doping concentration of P-type dopant can be 10 in body layer 7018/cm3~1020/cm3, preferably 1019/cm3。
Optionally, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include undoped gallium nitride layer
91, the setting of undoped gallium nitride layer 91 is in the first hydrogenation boron layer 40 and n type semiconductor layer 50, to alleviate substrate material and gallium nitride
Between lattice mismatch generate stress and defect, provide crystal quality preferable growing surface for epitaxial wafer main structure.
Further, the thickness of undoped gallium nitride layer 91 can be 1 μm~5 μm, preferably 3 μm.
Optionally, it as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include stress release layer 92, answers
Power releasing layer 92 is arranged between n type semiconductor layer 50 and active layer 60, to produce to lattice mismatch between sapphire and gallium nitride
Raw stress is discharged, and the crystal quality of active layer is improved, and is conducive to electrons and holes in active layer and is carried out radiation recombination hair
Light improves the internal quantum efficiency of LED, and then improves the luminous efficiency of LED.
Specifically, the material of stress release layer 92 can use gallium indium aluminum nitrogen (AlInGaN), can be released effectively sapphire
The stress generated with gallium nitride crystal lattice mismatch, improves the crystal quality of epitaxial wafer, improves the luminous efficiency of LED.
Preferably, the molar content of aluminium component can be less than or equal to 0.2, in stress release layer 92 in stress release layer 92
The molar content of indium component can be less than or equal to 0.05, to avoid adverse effect is caused.
Further, the thickness of stress release layer 92 can be 50nm~500nm, preferably 300nm.
Optionally, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include electronic barrier layer 93, electricity
Sub- barrier layer 93 is arranged between active layer 60 and p type semiconductor layer 70, to avoid electron transition into p type semiconductor layer with sky
Cave carries out non-radiative recombination, reduces the luminous efficiency of LED.
Specifically, the material of electronic barrier layer 93 can be using the aluminium gallium nitride alloy (AlGaN) of p-type doping, such as AlyGa1-yN,
0.1 < y < 0.5.
Further, the thickness of electronic barrier layer 93 can be 50nm~150nm, preferably 100nm；Electronic barrier layer 93
The doping concentration of middle P-type dopant can be 1018/cm3~1020/cm3, preferably 1019/cm3。
Preferably, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include low temperature P-type layer 94, low temperature
P-type layer 94 is arranged between active layer 60 and electronic barrier layer 93, has caused to avoid the higher growth temperature of electronic barrier layer
Phosphide atom in active layer is precipitated, and influences the luminous efficiency of light emitting diode.
Specifically, the material of low temperature P-type layer 94 can be the gallium nitride of p-type doping.
Further, the thickness of low temperature P-type layer 94 can be 10nm~50nm, preferably 30nm；P in low temperature P-type layer 94
The doping concentration of type dopant can be 1018/cm3~1020/cm3, preferably 1019/cm3。
Optionally, as shown in Figure 1, the gallium nitride based LED epitaxial slice can also include contact layer 95, contact layer
95 are arranged on p type semiconductor layer 70, to be formed between the electrode or transparent conductive film that are formed in chip fabrication technique
Ohmic contact.
Specifically, the material of contact layer 95 can be using the InGaN or gallium nitride of p-type doping.
Further, the thickness of contact layer 95 can be 5nm~100nm, preferably 50nm；P-type is adulterated in contact layer 95
The doping concentration of agent can be 1021/cm3~1022/cm3, preferably 5*1021/cm3。
The embodiment of the invention provides a kind of preparation methods of gallium nitride based LED epitaxial slice, are suitable for preparation figure
Gallium nitride based LED epitaxial slice shown in 1.Fig. 2 is a kind of gallium nitride based light emitting diode provided in an embodiment of the present invention
The flow chart of the preparation method of epitaxial wafer.Referring to fig. 2, which includes:
Step 201: buffer layer is formed on the substrate.
In a kind of implementation of the present embodiment, when the material of buffer layer uses aluminium nitride, which be can wrap
It includes:
Using physical vapour deposition (PVD) (English: Physical Vapor Deposition, abbreviation: PVD), technology is on substrate
Form buffer layer.
Specifically, when forming buffer layer, the temperature in PVD equipment can be 500 DEG C~700 DEG C, the pressure in PVD equipment
It can be 2torr~10torr, the flow for the argon gas being passed through in PVD equipment can be 20sccm~50sccm, lead in PVD equipment
The flow of the nitrogen entered can be 150sccm~250sccm, and the power of PVD equipment can be 3000W~4000W.
In another implementation of the present embodiment, when the material of buffer layer uses gallium nitride, which can be with
Include:
Controlled at 400 DEG C~600 DEG C (preferably 500 DEG C), pressure be 400torr~600torr (preferably
500torr), grown buffer layer on substrate；
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure be 400torr~600torr (preferably
500torr), the in-situ annealing carried out 5 minutes~10 minutes (preferably 8 minutes) to buffer layer is handled.
Optionally, before step 201, which can also include:
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), substrate move back within 8 minutes in hydrogen atmosphere
Fire processing；
Nitrogen treatment is carried out to substrate.
The surface for cleaning substrate through the above steps avoids being conducive to the life for improving epitaxial wafer in impurity incorporation epitaxial wafer
Long quality.
Step 202: being laid with one layer of graphene powder on the buffer layer.
Optionally, which may include:
Graphene powder is configured to graphene solution；
Graphene solution is uniformly laid on the buffer layer using photoresist spinner；
Graphene solution on buffer layer is heated, the graphene solution on buffer layer becomes graphene powder.
Graphene powder is uniformly laid in buffer layer by way of whirl coating, and then effectively improves the uniform of epitaxial wafer
Property and consistency.
Step 203: the first hydrogenation boron layer is formed on the buffer layer exposed in graphene powder and graphene powder.
Optionally, which may include:
One organic solution for being placed with ion exchange resin is provided；
By MgB2Organic solution, MgB is added in powder2Powder is reacted with ion exchange resin, and generation is dissolved in organic solution
Boron hydride and the magnesium-containing compound that is deposited in organic solution；
The magnesium-containing compound in organic solution is filtered out, the organic solution dissolved with boron hydride is obtained；
Using photoresist spinner by the organic solution dissolved with boron hydride be uniformly laid on graphene powder and graphene powder it
Between buffer layer on；
Organic solution dissolved with boron hydride is heated, the organic solution dissolved with boron hydride becomes the first boron hydride
Layer.
Hydrogenation boron layer is uniformly laid on the buffer layer between graphene powder and graphene powder by way of whirl coating
On.
Preferably, organic solution can be methanol solution or acetonitrile solution, realize that effect is good.
Preferably, the temperature of heating can be 50 DEG C~100 DEG C, realize that effect is good.
Further, heating can carry out under pure argon atmosphere, to avoid impurity incorporation.
Preferably, which can also include:
By MgB2Powder is added after organic solution, organic solution is persistently stirred, so that MgB2Powder and amberlite
Rouge sufficiently reacts.
Further, the duration of stirring can be 2 days~5 days, to ensure MgB2Powder is sufficiently anti-with ion exchange resin
It answers.
Further, stirring can carry out under room temperature (such as 25 DEG C), reduce cost of implementation.
Further, stirring can carry out under pure argon atmosphere, to avoid impurity incorporation.
Preferably, which can also include:
The organic solution dissolved with boron hydride is uniformly being laid on graphene powder and graphene powder using photoresist spinner
Between buffer layer on before, be ultrasonically treated to dissolved with the organic solution of boron hydride, so that boron hydride is evenly distributed on
In organic solution.
Further, the duration of ultrasonic treatment can be 5min~20min, realize that effect is good.
Optionally, before step 202, which can also include:
The second hydrogenation boron layer is formed on the buffer layer.
Specifically, the generation type of the second hydrogenation boron layer can be identical as the first hydrogenation generation type of boron layer, herein not
It is described in detail again.
Step 204: sequentially forming n type semiconductor layer, active layer and p type semiconductor layer in the first hydrogenation boron layer.
Specifically, which may include:
The first step, controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure is 100torr~500torr
(preferably 300torr) forms n type semiconductor layer in the first hydrogenation boron layer；
Second step forms active layer on forming n type semiconductor layer；Wherein, the growth temperature of Quantum Well be 720 DEG C~
829 DEG C (preferably 760 DEG C), pressure is 100torr~500torr (preferably 300torr)；Quantum build growth temperature be
850 DEG C~959 DEG C (preferably 900 DEG C), pressure is 100torr~500torr (preferably 300torr)；
Third step, controlled at 850 DEG C~1080 DEG C (preferably 960 DEG C), pressure is that 100torr~300torr is (excellent
It is selected as 200torr), p type semiconductor layer is formed on active layer.
Optionally, before the first step, which can also include:
Undoped gallium nitride layer is formed in the first hydrogenation boron layer.
Correspondingly, n type semiconductor layer is formed on undoped gallium nitride layer.
Specifically, undoped gallium nitride layer is formed in the first hydrogenation boron layer, may include:
Controlled at 1000 DEG C~1200 DEG C (preferably 1100 DEG C), pressure be 100torr~500torr (preferably
300torr), undoped gallium nitride layer is formed in the first hydrogenation boron layer.
Optionally, before second step, which can also include:
Stress release layer is formed on n type semiconductor layer.
Correspondingly, active layer is formed on stress release layer.
Specifically, stress release layer is formed on n type semiconductor layer, may include:
Controlled at 800 DEG C~1100 DEG C (preferably 950 DEG C), pressure be 100torr~500torr (preferably
300torr), stress release layer is formed on n type semiconductor layer.
Optionally, before third step, which can also include:
Electronic barrier layer is formed on active layer.
Correspondingly, p type semiconductor layer is formed on electronic barrier layer.
Specifically, electronic barrier layer is formed on active layer, may include:
Controlled at 850 DEG C~1000 DEG C (preferably 900 DEG C), pressure be 100torr~500torr (preferably
350torr), electronic barrier layer is formed on active layer.
Preferably, it is formed before electronic barrier layer on active layer, which can also include:
Low temperature P-type layer is formed on active layer.
Correspondingly, electronic barrier layer is formed in low temperature P-type layer.
Specifically, low temperature P-type layer is formed on active layer, may include:
Controlled at 600 DEG C~850 DEG C (preferably 750 DEG C), pressure be 100torr~600torr (preferably
300torr), low temperature P-type layer is formed on active layer.
Optionally, after third step, which can also include:
Contact layer is formed on p type semiconductor layer.
Specifically, contact layer is formed on p type semiconductor layer, may include:
Controlled at 850 DEG C~1050 DEG C (preferably 950 DEG C), pressure be 100torr~300torr (preferably
200torr), contact layer is formed on p type semiconductor layer.
It should be noted that after above-mentioned epitaxial growth terminates, can first by temperature be reduced to 650 DEG C~850 DEG C (preferably
It is 750 DEG C), the annealing of 5 minutes~15 minutes (preferably 10 minutes) is carried out to epitaxial wafer in nitrogen atmosphere, then again
The temperature of epitaxial wafer is reduced to room temperature.
Control temperature, pressure each mean temperature, pressure in the reaction chamber of control growth epitaxial wafer, and specially metal is organic
Compound chemical gaseous phase deposition (English: Metal-organic Chemical Vapor Deposition, referred to as: MOCVD) set
Standby reaction chamber.Using trimethyl gallium or triethyl-gallium as gallium source when realization, high-purity ammonia is as nitrogen source, and trimethyl indium is as indium
Source, for trimethyl aluminium as silicon source, N type dopant selects silane, and P-type dopant selects two luxuriant magnesium.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all in spirit of the invention and
Within principle, any modification, equivalent replacement, improvement and so on be should all be included in the protection scope of the present invention.
Claims (10)
1. a kind of gallium nitride based LED epitaxial slice, the gallium nitride based LED epitaxial slice includes substrate, buffering
Layer, n type semiconductor layer, active layer and p type semiconductor layer, the buffer layer, the n type semiconductor layer, the active layer and institute
It states p type semiconductor layer to stack gradually over the substrate, which is characterized in that the gallium nitride based LED epitaxial slice also wraps
Graphene powder and the first hydrogenation boron layer are included, the graphene powder is laid on the buffer layer, the first hydrogenation boron layer
It is laid on the buffer layer exposed in the graphene powder and the graphene powder.
2. gallium nitride based LED epitaxial slice according to claim 1, which is characterized in that in the graphene powder
The partial size of each particle is 0.5nm~5nm.
3. gallium nitride based LED epitaxial slice according to claim 2, which is characterized in that the first hydrogenation boron layer
1.5 times with a thickness of the partial size of each particle in the graphene powder~5 times.
4. gallium nitride based LED epitaxial slice according to claim 3, which is characterized in that the first hydrogenation boron layer
With a thickness of 1nm~9nm.
5. gallium nitride based LED epitaxial slice according to any one of claims 1 to 4, which is characterized in that the nitrogen
Changing gallium based LED epitaxial slice further includes the second hydrogenation boron layer, and the second hydrogenation boron layer is arranged in the graphene powder
Between the buffer layer.
6. gallium nitride based LED epitaxial slice according to claim 5, which is characterized in that the second hydrogenation boron layer
Thickness with it is described first hydrogenation the thickness of boron layer it is identical.
7. a kind of preparation method of gallium nitride based LED epitaxial slice, which is characterized in that the preparation method includes:
Buffer layer is formed on the substrate；
One layer of graphene powder is laid on the buffer layer；
The first hydrogenation boron layer is formed on the buffer layer exposed in the graphene powder and the graphene powder；
N type semiconductor layer, active layer and p type semiconductor layer are sequentially formed in the first hydrogenation boron layer.
8. preparation method according to claim 7, which is characterized in that described to be laid with one layer of graphene on the buffer layer
Powder, comprising:
Graphene powder is configured to graphene solution；
The graphene solution is uniformly laid on the buffer layer using photoresist spinner；
Graphene solution on the buffer layer is heated, the graphene solution on the buffer layer becomes Graphene powder
End.
9. preparation method according to claim 7 or 8, which is characterized in that described in the graphene powder and the stone
The first hydrogenation boron layer is formed on buffer layer between black alkene powder, comprising:
One organic solution for being placed with ion exchange resin is provided；
By MgB2The organic solution, the MgB is added in powder2Powder is reacted with the ion exchange resin, and generation is dissolved in institute
The magnesium-containing compound stating the boron hydride in organic solution and being deposited in the organic solution；
The magnesium-containing compound in the organic solution is filtered out, the organic solution dissolved with boron hydride is obtained；
The organic solution dissolved with boron hydride is uniformly laid on the graphene powder and the Graphene powder using photoresist spinner
On buffer layer between end；
Organic solution dissolved with boron hydride is heated, the organic solution dissolved with boron hydride becomes the first hydrogenation boron layer.
10. preparation method according to claim 9, which is characterized in that the preparation method further include:
It is laid with before one layer of graphene powder on the buffer layer, forms the second hydrogenation boron layer on the buffer layer.
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811433646.3A CN109671818B (en) | 2018-11-28 | 2018-11-28 | Gallium nitride-based light emitting diode epitaxial wafer and preparation method thereof |
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| CN103165783A (en) * | 2011-12-15 | 2013-06-19 | 铼钻科技股份有限公司 | Flip-chip light emitting diode and manufacturing method and application thereof |
| JP2015015321A (en) * | 2013-07-03 | 2015-01-22 | 高槻電器工業株式会社 | Semiconductor light-emitting element and method of manufacturing the same |
| US20150280091A1 (en) * | 2013-07-18 | 2015-10-01 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Light-emitting device and manufacturing method thereof |
| KR20160016586A (en) * | 2014-08-01 | 2016-02-15 | 전북대학교산학협력단 | Optoelectronic semiconductor device and method for manufacturing same |
| US20170069796A1 (en) * | 2015-09-04 | 2017-03-09 | PlayNitride Inc. | Light emitting device with epitaxial structure |
| CN107706274A (en) * | 2017-10-25 | 2018-02-16 | 中国工程物理研究院电子工程研究所 | It is a kind of based on preparation method of the hexagonal boron nitride graphene composite bed as the epitaxy of gallium nitride structure of cushion |
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| JP2015015321A (en) * | 2013-07-03 | 2015-01-22 | 高槻電器工業株式会社 | Semiconductor light-emitting element and method of manufacturing the same |
| US20150280091A1 (en) * | 2013-07-18 | 2015-10-01 | Shenzhen China Star Optoelectronics Technology Co., Ltd. | Light-emitting device and manufacturing method thereof |
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