CN106057996A - Epitaxial wafer of light-emitting diode and growing method thereof - Google Patents
Epitaxial wafer of light-emitting diode and growing method thereof Download PDFInfo
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- CN106057996A CN106057996A CN201610455108.9A CN201610455108A CN106057996A CN 106057996 A CN106057996 A CN 106057996A CN 201610455108 A CN201610455108 A CN 201610455108A CN 106057996 A CN106057996 A CN 106057996A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/04—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
- H01L33/06—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/005—Processes
- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/26—Materials of the light emitting region
- H01L33/30—Materials of the light emitting region containing only elements of group III and group V of the periodic system
- H01L33/32—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen
- H01L33/325—Materials of the light emitting region containing only elements of group III and group V of the periodic system containing nitrogen characterised by the doping materials
Abstract
The invention discloses an epitaxial wafer of a light-emitting diode and a growing method thereof, and belongs to the technical field of semiconductors. The epitaxial wafer comprises a sapphire substrate, as well as a buffer layer, a GaN-undoped layer, an N-type GaN layer, a current spreading layer, a shallow well layer, a multiple quantum well layer, a low-temperature P-type GaN layer, a P-type electron blocking layer, a high-temperature P-type GaN layer and a P-type contact layer which are stacked on the sapphire substrate in sequence, wherein the multiple quantum well layer comprises quantum well layers and quantum barrier layers which are stacked alternately, each quantum barrier layer is a GaN layer, and each quantum well layer comprises an InxGa1-xN layer, an InN layer and an InyGa1-yN layer which are stacked in sequence, in which x is greater than 0.4 and smaller than 0.9, and y is greater than 0.1 and smaller than 0.5. The InN layer is inserted in the InGaN layer, so that the composition of In quantum dots is increased, more radiation recombination centers are provided, and the luminous efficiency of the light-emitting diode is improved.
Description
Technical field
The present invention relates to technical field of semiconductors, particularly to epitaxial wafer and the growing method thereof of a kind of light emitting diode.
Background technology
The core of light emitting diode (Light Emitting Diode is called for short LED) is by p-type semiconductor and N-shaped
The wafer of quasiconductor composition, has transition zone, referred to as a pn-junction between p-type semiconductor and n-type semiconductor.In pn-junction, p-type
Quasiconductor injected holes is combined with n-type semiconductor injected electrons, and unnecessary energy discharges in the form of light, electric energy
It is converted directly into luminous energy.
III group-III nitride with gallium nitride as representative is the semiconductor material with wide forbidden band of direct band gap, has electronics drift and satisfies
High with speed, thermal conductivity is good, strong chemical bond, the premium properties such as high temperature resistant and anticorrosive, is widely used in LED.With gallium nitride
For represent III group-III nitride in, the band gap of ternary alloy three-partalloy indium gallium nitrogen (InGaN) from the 0.7eV of indium nitride (InN) to gallium nitride
(GaN) 3.4eV, emission wavelength covers the whole region of visible ray and black light.
Existing LED uses alternately laminated InGaN layer and GaN layer to form multiple quantum well layer and realizes electronics and hole
Recombination luminescence, but the luminous efficiency of LED need improve.
Summary of the invention
In order to solve problem of the prior art, embodiments provide epitaxial wafer and the life thereof of a kind of light emitting diode
Long method.Described technical scheme is as follows:
On the one hand, present example provides the epitaxial wafer of a kind of light emitting diode, and described epitaxial wafer includes that sapphire serves as a contrast
The end and be sequentially laminated on the cushion in described Sapphire Substrate, layer of undoped gan, N-type GaN layer, shallow well layer, Multiple-quantum
Well layer, low temperature p-type GaN layer, P-type electron barrier layer, high temperature p-type GaN layer, p-type contact layer, described multiple quantum well layer includes alternately
The quantum well layer of stacking and quantum barrier layer, described quantum barrier layer is GaN layer, and described quantum well layer includes stacking gradually
InxGa1-xN shell, InN layer, InyGa1-yN shell, 0.4 ＜ x ＜ 0.9,0.1 ＜ y ＜ 0.5.
Alternatively, the thickness of described InN layer is 0.5～0.9nm.
Alternatively, described InxGa1-xThe thickness of N shell is 0.5～2nm.
Alternatively, described InyGa1-yThe thickness of N shell is 1.5～4nm.
Alternatively, described InxGa1-xIn N shell, the molar constituent of In keeps constant.
On the other hand, the growing method of the epitaxial wafer of a kind of light emitting diode, described growth are embodiments provided
Method includes:
At described Grown on Sapphire Substrates cushion；
Described cushion grows layer of undoped gan；
Described layer of undoped gan grows N-type GaN layer；
Described N-type GaN layer grows shallow well layer；
Described shallow well layer grows multiple quantum well layer；
Growing low temperature p-type GaN layer on described multiple quantum well layer；
Growing P-type electronic barrier layer in described low temperature p-type GaN layer；
Described P-type electron barrier layer grows high temperature p-type GaN layer；
Growing P-type contact layer in described high temperature p-type GaN layer；
Wherein, described multiple quantum well layer includes that alternately laminated quantum well layer and quantum barrier layer, described quantum well layer include
The In stacked graduallyxGa1-xN shell, InN layer, InyGa1-yN shell, 0.4 ＜ x ＜ 0.9,0.1 ＜ y ＜ 0.5.
Alternatively, the thickness of described InN layer is 0.5～0.9nm.
Alternatively, described InxGa1-xThe thickness of N shell is 0.5～2nm.
Alternatively, described InyGa1-yThe thickness of N shell is 1.5～4nm.
Alternatively, the growth temperature of described quantum well layer is 750～800 DEG C, and the growth pressure of described quantum well layer is 150
～500Torr, V/III ratio of described quantum well layer is 1000～5000.
The technical scheme that the embodiment of the present invention provides has the benefit that
Including alternately laminated quantum well layer and quantum barrier layer by multiple quantum well layer, quantum barrier layer is GaN layer, SQW
Layer includes the In stacked graduallyxGa1-xN shell, InN layer, InyGa1-yN shell, in multiple quantum well layer, the molar constituent of In is uneven causes
The local effect of carrier, is excited the carrier of generation to be confined in In quantum dot by electrical pumping or light, and carrier is difficult to
Move to non-radiative recombination center, thus be greatly improved radiation recombination luminous efficiency.Utilize insertion InN in InGaN layer simultaneously
Layer, improves the composition of In quantum dot, it is provided that more radiation recombination center, improves the luminous efficiency of light emitting diode.
Accompanying drawing explanation
For the technical scheme being illustrated more clearly that in the embodiment of the present invention, in embodiment being described below required for make
Accompanying drawing be briefly described, it should be apparent that, below describe in accompanying drawing be only some embodiments of the present invention, for
From the point of view of those of ordinary skill in the art, on the premise of not paying creative work, it is also possible to obtain other according to these accompanying drawings
Accompanying drawing.
Fig. 1 is the structural representation of the epitaxial wafer of a kind of light emitting diode that the embodiment of the present invention one provides；
Fig. 2 is the flow chart of the growing method of the epitaxial wafer of a kind of light emitting diode that the embodiment of the present invention two provides；
Fig. 3 is the schematic diagram of the MQW growth conditions that the embodiment of the present invention two provides.
Detailed description of the invention
For making the object, technical solutions and advantages of the present invention clearer, below in conjunction with accompanying drawing to embodiment party of the present invention
Formula is described in further detail.
Embodiment one
Embodiments providing the epitaxial wafer of a kind of light emitting diode, see Fig. 1, this epitaxial wafer includes that sapphire serves as a contrast
The end 1 and the cushion 2 being sequentially laminated in Sapphire Substrate 1, layer of undoped gan 3, N-type GaN layer 4, shallow well layer 5, volume
Sub-well layer 6, low temperature p-type GaN layer 7, P-type electron barrier layer 8, high temperature p-type GaN layer 9, p-type contact layer 10.
In the present embodiment, multiple quantum well layer 6 includes alternately laminated quantum well layer 61 and quantum barrier layer 62.Quantum barrier layer
62 is GaN layer；Quantum well layer 61 includes the In stacked graduallyxGa1-xN shell 61a, InN layer 61b, InyGa1-yN shell 61c, 0.4 ＜ x
＜ 0.9,0.1 ＜ y ＜ 0.5.Cushion 2 is GaN layer.Shallow well layer 6 includes alternately laminated InzGa1-zN shell and GaN layer, 0 ＜ z
＜ 0.1.P-type electron barrier layer 9 is AlGaN layer.
Alternatively, the thickness of InN layer 61b can be 0.5～0.9nm.
Alternatively, InxGa1-xThe thickness of N shell 61a can be 0.5～2nm.
Alternatively, InyGa1-yThe thickness of N shell 61c can be 1.5～4nm.
Alternatively, InxGa1-xIn N shell 61a, the molar constituent of In can keep constant.
Alternatively, the thickness of quantum barrier layer 62 can be 5～12nm.
Alternatively, the number of plies sum of quantum well layer 61 and quantum barrier layer 62 can be 12～30.
Alternatively, the thickness of cushion 2 can be 10～30nm.
Alternatively, the thickness of layer of undoped gan 3 can be 1～2 μm.
Alternatively, the thickness of N-type GaN layer 4 can be 1.5～3.5 μm.
Alternatively, the In in shallow well layer 5zGa1-zThe number of plies sum of N shell and GaN layer can be 10～40.
Alternatively, the In in shallow well layer 5zGa1-zThe thickness of N shell can be 1～4nm.
Alternatively, the thickness of the GaN layer in shallow well layer 5 can be 10～30nm.
Alternatively, the thickness of low temperature p-type GaN layer 7 can be 30～120nm.
Alternatively, the thickness of P-type electron barrier layer 8 can be 50～150nm.
Alternatively, the thickness of high temperature p-type GaN layer 9 can be 50～150nm.
Alternatively, the thickness of p-type contact layer 10 can be 3～10nm.
The embodiment of the present invention includes alternately laminated quantum well layer and quantum barrier layer by multiple quantum well layer, and quantum barrier layer is
GaN layer, quantum well layer includes the In stacked graduallyxGa1-xN shell, InN layer, InyGa1-yN shell, mole group of In in multiple quantum well layer
Divide the uneven local effect causing carrier, electrical pumping or light excite the carrier of generation to be confined to In quantum dot
In, carrier is difficult to move to non-radiative recombination center, thus is greatly improved radiation recombination luminous efficiency.Utilize simultaneously
InGaN layer is inserted InN layer, improves the composition of In quantum dot, it is provided that more radiation recombination center, improve light emitting diode
Luminous efficiency.And in InGaN layer, insert InN layer, it is also possible to improve the exhibition of SQW interface roughness and emission wavelength
Broad effect.
Embodiment two
Embodiments provide the growing method of the epitaxial wafer of a kind of light emitting diode, it is adaptable to growth embodiment one
The epitaxial wafer of the light emitting diode provided, sees Fig. 2, and this growing method includes:
Step 200: Sapphire Substrate is carried out in the hydrogen atmosphere that temperature is 1000～1200 DEG C high-temperature cleaning and processes 5
～20min, and carry out nitrogen treatment.
In the present embodiment, with nitrogen (N2) or hydrogen (H2) as carrier gas, sow (TMGa) with trimethyl, triethyl group is sowed
(TEGa), trimethyl aluminium (TMAl), trimethyl indium (TMIn) and ammonia (NH3) respectively as Ga, Al, In and N source, use silane
(SiH4), two cyclopentadienyls magnesium (CP2Mg) are respectively as N, P-type dopant.
Step 201: control growth temperature be 450～600 DEG C, growth pressure is 75～200Torr, V/III ratio be 100～
400, rotating speed is 800～1200r/min, and growth thickness is the cushion of 10～30nm on a sapphire substrate.
In the present embodiment, cushion is GaN layer.V/III ratio is V valency atom and the mol ratio of III valency atom.
Step 202: controlling growth temperature is 1000～1200 DEG C, and growth pressure is 200～500Torr, and V/III ratio is
200～3000, rotating speed is 900～1200r/min, and growth thickness is the layer of undoped gan of 1～2 μm on the buffer layer.
Step 203: controlling growth temperature is 950～1150 DEG C, and growth pressure is 300～500Torr, and V/III ratio is 400
～3000, in layer of undoped gan, growth thickness is the N-type GaN layer of 1.5～3.5 μm.
In the present embodiment, N-type GaN layer uses Si doping and doping content to keep constant.
Step 204: controlling growth pressure is 100～500Torr, and V/III ratio is 500～10000, raw in N-type GaN layer
Long shallow well layer.
In the present embodiment, shallow well layer includes alternately laminated InzGa1-zN shell and GaN layer, 0 ＜ z ＜ 0.1.
Alternatively, the In in shallow well layerxGa1-xThe number of plies sum of N shell and GaN layer can be 10～40.
Alternatively, the In in shallow well layerxGa1-xThe thickness of N shell can be 1～4nm.
Alternatively, the In in shallow well layerxGa1-xThe growth temperature of N shell can be 750～850 DEG C.
Alternatively, the thickness of the GaN layer in shallow well layer can be 10～30nm.
Alternatively, the growth temperature of the GaN layer in shallow well layer can be 850～950 DEG C.
Step 205: grow multiple quantum well layer on shallow well layer.
In the present embodiment, multiple quantum well layer includes alternately laminated quantum well layer and quantum barrier layer.Quantum barrier layer is GaN
Layer；Quantum well layer includes the In stacked graduallyxGa1-xN shell, InN layer, InyGa1-yN shell, 0.4 ＜ x ＜ 0.9,0.1 ＜ y ＜ 0.5.
Alternatively, the thickness of InN layer can be 0.5～0.6nm.
Alternatively, InxGa1-xThe thickness of N shell can be 0.5～1nm.
Alternatively, InyGa1-yThe thickness of N shell can be 1.5～2nm.
Alternatively, InxGa1-xIn N shell, the molar constituent of In can keep constant.
Alternatively, the thickness of quantum barrier layer can be 5～12nm.
Alternatively, the number of plies sum of quantum well layer and quantum barrier layer can be 12～30.
Alternatively, the growth temperature of quantum well layer can be 750～800 DEG C, and the growth pressure of quantum well layer can be 150
～500Torr, V/III ratio of quantum well layer is 1000～5000.
Alternatively, the growth temperature of quantum barrier layer can be 860～950 DEG C, and the growth pressure of quantum barrier layer can be 200
～400Torr, V/III ratio of quantum barrier layer is 1500～5000.
Specifically, see Fig. 3, during grown quantum well layer, be first passed through triethyl-gallium and trimethyl indium, grow InxGa1-xN
Layer；Stop again being passed through triethyl-gallium, continue to be passed through trimethyl indium, grow InN layer；Finally again it is passed through triethyl-gallium, growth
InyGa1-yN shell.
Step 206: controlling growth temperature is 700～800 DEG C, and growth pressure is 100～600Torr, and V/III ratio is 1000
～4000, growth time is 3～15min, and on multiple quantum well layer, growth thickness is the low temperature p-type GaN layer of 30～120nm.
Step 207: controlling growth temperature is 900～1000 DEG C, and growth pressure is 50～300Torr, and V/III ratio is 1000
～10000, growth time is 4～15min, and in low temperature p-type GaN layer, growth thickness is the p-type electronic blocking of 50～150nm
Layer.
In the present embodiment, P-type electron barrier layer is p-type AlGaN layer.
Step 208: controlling growth temperature is 900～1050 DEG C, and growth pressure is 100～500Torr, and V/III ratio is 500
～4000, growth time is 10～20min, grows the high temperature p-type GaN layer of 50～150nm in P-type electron barrier layer.
Step 209: controlling growth temperature is 700～850 DEG C, and growth pressure is 100～500Torr, and V/III ratio is
10000～20000, growth time is 0.5～5min, and in high temperature p-type GaN layer, growth thickness is the p-type contact of 3～10nm
Layer.
It should be noted that after epitaxial growth technology terminates, the temperature of reaction chamber is down to 600～900 DEG C, at PN2
Carry out making annealing treatment 10～30min under atmosphere, be then down to room temperature, terminate epitaxial growth.Through over cleaning, deposition, photoetching and quarter
After the semiconducter process processing procedures such as erosion, LED is made the LED chip of 17*35mil.
The embodiment of the present invention includes alternately laminated quantum well layer and quantum barrier layer by multiple quantum well layer, and quantum barrier layer is
GaN layer, quantum well layer includes the In stacked graduallyxGa1-xN shell, InN layer, InyGa1-yN shell, mole group of In in multiple quantum well layer
Divide the uneven local effect causing carrier, electrical pumping or light excite the carrier of generation to be confined to In quantum dot
In, carrier is difficult to move to non-radiative recombination center, thus is greatly improved radiation recombination luminous efficiency.Utilize simultaneously
InGaN layer is inserted InN layer, improves the composition of In quantum dot, it is provided that more radiation recombination center, improve light emitting diode
Luminous efficiency.And in InGaN layer, insert InN layer, it is also possible to improve the exhibition of SQW interface roughness and emission wavelength
Broad effect.
Embodiment three
Embodiments provide the growing method of the epitaxial wafer of a kind of light emitting diode, this growing method and embodiment
The difference of two growing methods provided is, in quantum well layer, the thickness of each layer is different.Specifically, the thickness of InN layer is
0.6～0.8nm, InxGa1-xThe thickness of N shell is 1～1.5nm, InyGa1-yThe thickness of N shell is 2～2.5nm.
Embodiment four
Embodiments provide the growing method of the epitaxial wafer of a kind of light emitting diode, this growing method and embodiment
Two, the difference of the growing method that embodiment three provides is, in quantum well layer, the thickness of each layer is different.Specifically, InN layer
Thickness be 0.8～0.9nm, InxGa1-xThe thickness of N shell is 1.5～2nm, InyGa1-yThe thickness of N shell is 2.5～3nm.
Find after LED chip is tested, Electro-static Driven Comb (Electro-Static discharge is called for short ESD) test
When voltage is 4000V, the luminous efficiency of the sample of embodiment two promotes 0.5%～1.2%；The luminous effect of the sample of embodiment three
Rate promotes 2%～4%；The luminous efficiency of the sample of embodiment four is without significant change.
The invention described above embodiment sequence number, just to describing, does not represent the quality of embodiment.
The foregoing is only presently preferred embodiments of the present invention, not in order to limit the present invention, all spirit in the present invention and
Within principle, any modification, equivalent substitution and improvement etc. made, should be included within the scope of the present invention.
Claims (10)
1. an epitaxial wafer for light emitting diode, described epitaxial wafer includes Sapphire Substrate and is sequentially laminated on described blue precious
Cushion at the bottom of stone lining, layer of undoped gan, N-type GaN layer, shallow well layer, multiple quantum well layer, low temperature p-type GaN layer, p-type electronics
Barrier layer, high temperature p-type GaN layer, p-type contact layer, described multiple quantum well layer includes alternately laminated quantum well layer and quantum barrier layer,
Described quantum barrier layer is GaN layer, it is characterised in that described quantum well layer includes the In stacked graduallyxGa1-xN shell, InN layer,
InyGa1-yN shell, 0.4 ＜ x ＜ 0.9,0.1 ＜ y ＜ 0.5.
Epitaxial wafer the most according to claim 1, it is characterised in that the thickness of described InN layer is 0.5～0.9nm.
Epitaxial wafer the most according to claim 1 and 2, it is characterised in that described InxGa1-xThe thickness of N shell is 0.5～2nm.
Epitaxial wafer the most according to claim 1 and 2, it is characterised in that described InyGa1-yThe thickness of N shell is 1.5～4nm.
Epitaxial wafer the most according to claim 1 and 2, it is characterised in that described InxGa1-xIn N shell, the molar constituent of In keeps
Constant.
6. the growing method of the epitaxial wafer of a light emitting diode, it is characterised in that described growing method includes:
Grown buffer layer on a sapphire substrate；
Described cushion grows layer of undoped gan；
Described layer of undoped gan grows N-type GaN layer；
Described N-type GaN layer grows shallow well layer；
Described shallow well layer grows multiple quantum well layer；
Growing low temperature p-type GaN layer on described multiple quantum well layer；
Growing P-type electronic barrier layer in described low temperature p-type GaN layer；
Described P-type electron barrier layer grows high temperature p-type GaN layer；
Growing P-type contact layer in described high temperature p-type GaN layer；
Wherein, described multiple quantum well layer includes that alternately laminated quantum well layer and quantum barrier layer, described quantum well layer include successively
The In of stackingxGa1-xN shell, InN layer, InyGa1-yN shell, 0.4 ＜ x ＜ 0.9,0.1 ＜ y ＜ 0.5.
Growing method the most according to claim 6, it is characterised in that the thickness of described InN layer is 0.5～0.9nm.
8. according to the growing method described in claim 6 or 7, it is characterised in that described InxGa1-xThe thickness of N shell be 0.5～
2nm。
9. according to the growing method described in claim 6 or 7, it is characterised in that described InyGa1-yThe thickness of N shell be 1.5～
4nm。
10. according to the growing method described in claim 6 or 7, it is characterised in that the growth temperature of described quantum well layer is 750
～800 DEG C, the growth pressure of described quantum well layer is 150～500Torr, described quantum well layer V/III than be 1000～
5000。
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| CN114068774A (en) * | 2021-11-15 | 2022-02-18 | 厦门乾照光电股份有限公司 | LED chip and preparation method thereof |
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