CN109524463A - 半导体装置的形成方法 - Google Patents

半导体装置的形成方法 Download PDF

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Publication number
CN109524463A
CN109524463A CN201711191912.1A CN201711191912A CN109524463A CN 109524463 A CN109524463 A CN 109524463A CN 201711191912 A CN201711191912 A CN 201711191912A CN 109524463 A CN109524463 A CN 109524463A
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Prior art keywords
metal
oxide
self
layer
coating
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CN201711191912.1A
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Inventor
黄如立
江志隆
庄英良
叶明熙
黄国彬
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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Taiwan Semiconductor Manufacturing Co TSMC Ltd
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    • H01L29/7855—Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET with at least two independent gates
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Abstract

本公开实施例提供湿工艺为主的方法形成自组装单层于特定的晶体管上，以调整高介电常数介电物‑金属栅极的临界电压。在一实施例中，方法包括形成栅极结构于基板上，且栅极结构包含栅极介电层、阻挡层形成于栅极介电层上、以及氧化物层形成于阻挡层上。上述方法也将氧化物层暴露至水溶液以形成自组装单层于氧化物层上，且水溶液包含金属氧化物于溶解金属的酸中。

Description

半导体装置的形成方法
技术领域
本公开实施例涉及半导体装置，更具体涉及具有鳍状场效晶体管的半导体装置。
背景技术
半导体集成电路产业已经历指数生长。集成电路材料与设计的技术进展，使每一代的集成电路均比前一代具有更小且更复杂的电路。在集成电路的演进中，功能密度(单位芯片面积所具有的内连线装置数目)通常随着几何尺寸(如最小构件或线路)减少而增加。尺寸缩小的工艺通常有利于增加产能并降低相关成本。上述尺寸缩小也增加集成电路的工艺复杂度。
举例来说，制作场效晶体管如鳍状场效晶体管时，可采用金属栅极取代公知的多晶硅栅极以改善装置效能。形成金属栅极堆叠的工艺的称作置换栅极或栅极后制工艺，其最后制作的栅极堆叠可减少形成栅极后的后续工艺(如高温工艺)的数目。金属栅极通常包含栅极介电层、功函数金属层、与金属栅极。功函数金属层可采用不同材料以用于不同种类的晶体管(如p型鳍状场效晶体管或n型鳍状场效晶体管)，可微调晶体管的临界电压，并依需求增进装置的电性效能。然而，功函数金属层的沉积面临挑战，特别是在进阶与更进阶的工艺节点中，缩小的集成电路结构与复杂表面形貌等部分。挑战之一为在小栅极长度中沉积功函数金属时，需要沉积/图案化多重硬掩模、蚀刻金属、移除硬掩模、与后清洁工艺以操作n型金属氧化物半导体或p型金属氧化物半导体装置的临界电压，这让工艺复杂化且成本提高。同时需沉积的功函数金属厚度也受限，因为进阶工艺节点的关键尺寸较小。此外，金属图案化工艺可能损伤金属栅极与栅极介电层之间的金属阻挡层。如此一来，金属材料可能侵入栅极介电层，造成装置缺陷。
发明内容
本公开一实施例提供的半导体装置的形成方法，包括：形成栅极结构于基板上，栅极结构包括栅极介电层、阻挡层形成于栅极介电层上、以及氧化物层形成于阻挡层上；以及将氧化物层暴露至水溶液，以形成自组装单层于氧化物层上，其中水溶液包含金属氧化物于溶解金属的酸中。
附图说明
图1为本公开多种实施例中，制作半导体装置的例示性方法的流程图。
图2至图14为依据图1的流程图形成的部分半导体，于多种制作阶段中的附图。
附图标记说明：
10：方法；
12、14、16、18、20、22、24、26、28、30：步骤；
100：装置；
100a、100b：装置区；
101a、101b：栅极结构；
102：基板；
104a、104b：鳍状结构；
106：隔离结构；
108a、108b：源极/漏极结构；
110：虚置栅极堆叠；
112：间隔物结构；
114：层间介电层；
116a、116b：沟槽；
117、121：掩模单元；
120：界面层；
122：栅极介电层；
123、125、139：自组装单层；
124：阻挡层；
126：氧化物层；
136：栅极材料；
137：上表面；
128：功函数金属层；
具体实施方式
下述内容提供的不同实施例或实例可实施本公开的不同结构。特定构件与排列的实施例用以简化本公开而非局限本公开。举例来说，形成第一构件于第二构件上的叙述包含两者直接接触，或两者之间隔有其他额外构件而非直接接触。此外，本公开的多种例子中可重复标号和/或符号，但这些重复仅用以简化与清楚说明，不代表不同实施例和/或设置之间具有相同标号和/或符号的单元之间具有相同的对应关系。
此外，空间性的相对用语如“下方”、“其下”、“较下方”、“上方”、“较上方”、或类似用语可用于简化说明某一元件与另一元件在图示中的相对关系。空间性的相对用语可延伸至以其他方向使用的元件，而非局限于图示方向。元件也可转动90°或其他角度，因此方向性用语仅用以说明图示中的方向。
本公开实施例的目的为提供湿工艺为主的方法，调整采用自组装单层于特定晶体管上的高介电常数介电物-金属栅极的临界电压。
图1为本公开多种实施例中，制作半导体装置的例示性方法10的流程图。方法10仅用以举例，并非局限本公开至权利要求未实际限缩的范畴。在方法10之前、之中、或之后可进行额外步骤，且方法的额外实施例可置换、省略、或掉换一些下述步骤。下述的方法10搭配图2至图13说明，其显示多种工艺阶段中部分的装置10。装置10可为集成电路工艺中制作的中间装置或其部分，其可包含随机存取存储器和/或其他逻辑电路；被动构件如电阻、电容或电感；或有源构件如p型场效晶体管、n型场效晶体管、鳍状场效晶体管、金属氧化物半导体场效晶体管、互补式金属氧化物半导体晶体管、双极晶体管、高电压晶体管、高频晶体管、其他存储器、或上述的组合。
图1的方法10的步骤12提供基板102，其具有多种结构形成其中和/或其上。如图2所示，装置100包含基板102，与基板102上的隔离结构106。隔离结构106可将装置10分隔成多种装置区。在图示的例子中，装置100包含n型场效晶体管的装置区100a与p型场效晶体管的装置区100b。在此实施例中，装置100包含鳍状场效晶体管，且基板102包含自隔离结构106之间向上凸起的两个鳍状结构104a与104b。鳍状结构104a与104b分别位于装置区100a与100b中。
图2至图13是沿着个别鳍状结构104a或104b的鳍状物长度方向的部分装置100的剖视图。在多种实施例中，装置区100a与100b为连续或不连续。应理解的是，本公开并不限于任何特定数目的装置或装置区，或任何特定装置设置。
装置100也包含栅极结构101a与101b，其各自位于装置区100a与100b中。栅极结构101a与101b各自包含虚置栅极堆叠110，与虚置栅极堆叠110的侧壁上的间隔物结构112。栅极结构101a与101b各自接合或邻接部分的鳍状结构104a与104b。装置100更包含源极/漏极区108a与108b于鳍状结构104a与104b上，且各自与栅极结构101a与101b的相反两侧相邻或位于其上。装置100也包含层间介电层114以围绕栅极结构101a与101b。装置100的多种前述结构将进一步说明如下。
在此实施例中，基板102为硅基板。在其他实施例中，基板102可包含另一半导体元素如锗；半导体化合物如碳化硅、砷化镓、磷化镓、磷化铟、砷化铟、和/或锑化铟；半导体合金如硅锗、磷砷化镓、砷化铝铟、砷化铝镓、砷化镓铟、磷化镓铟、和/或磷砷化镓铟；或上述的组合。在又一实施例中，基板102为绝缘层上半导体，比如埋置介电层。
在此实施例中，鳍状结构104a适于形成n型鳍状场效晶体管，且鳍状结构104b适于形成p型鳍状场效晶体管。此设置用于说明而非局限本公开。鳍状结构104a与104b的制作方法可采用合适工艺，其包含光刻与蚀刻工艺。光刻工艺可包含形成光致抗蚀剂层于基板102上、以图案曝光光致抗蚀剂层、进行曝光后烘烤工艺、以及显影光致抗蚀剂以形成包含光致抗蚀剂的掩模单元。接着将掩模单元用于蚀刻凹陷至基板102中，以保留鳍状结构104a与104b于基板102上。蚀刻工艺可包含干蚀刻、湿蚀刻、反应性离子蚀刻、和/或其他合适工艺。在其他实施例中，鳍状结构104a与104b的形成方法可采用芯间隔物的双重图案化光刻工艺。
隔离结构106的组成可为氧化硅、氮化硅、氮氧化硅、掺杂氟的硅酸盐玻璃、低介电常数介电材料、和/或其他合适的绝缘材料。隔离结构106可为浅沟槽隔离结构。在一实施例中，隔离结构106的形成方法可为蚀刻沟槽于基板102中，比如鳍状结构104a与104b的形成工艺的一部分。接着可将隔离材料填入沟槽，接着进行平坦化工艺如化学机械研磨。其他可能的隔离结构包括场氧化物、局部氧化硅、和/或其他合适结构。举例来说，隔离结构106可包含多层结构，其可具有一或多层的热氧化物衬垫层。
在此实施例中，虚置栅极堆叠110接合至鳍状结构104a与104b的两侧或三侧上。用语“虚置”指的是在栅极后制的工艺中，后续阶段将移除栅极堆叠，并置换成“实际”的栅极堆叠如高介电常数介电物-金属栅极。虚置栅极堆叠110可包含一或多个材料层，比如氧化物层、多晶硅层、硬掩模层、盖层、与其他合适层状物。虚置栅极堆叠110中的多种层状物可由合适的沉积技术形成。举例来说，氧化物层的形成方法可为化学氧化、热氧化、原子层沉积、化学气相沉积、和/或其他合适方法。举例来说，多晶硅层的形成方法可为合适的沉积工艺，比如低压化学气相沉积或等离子体增强化学气相沉积。在一实施例中，虚置栅极堆叠110可先沉积如毯覆层。接着以光刻工艺与蚀刻工艺图案化毯覆层，其移除部分的毯覆层并保留部分的毯覆层于隔离结构106与鳍状结构104a与104b上，以作为虚置栅极堆叠110。
间隔物结构112形成于虚置栅极堆叠110的侧壁上。间隔物结构112包含的材料不同于虚置栅极堆叠110的材料。在一实施例中，间隔物结构112包含介电材料如氮化硅、氮氧化硅、碳化硅、碳硅、氧化硅、硅氢、或其他可用材料。在一例中，间隔物结构112包含多层，比如与虚置栅极结构110相邻的密封层，以及与密封层相邻的主要间隔物层。在一实施例中，在形成虚置栅极堆叠110之后，可沉积间隔物材料于装置100上，以形成一或多层的间隔物层。接着进行非等向蚀刻工艺，以移除部分的间隔物层并形成图2所示的间隔物结构112。
源极/漏极区108a与108b可包含源极/漏极结构且可多种技术形成，比如蚀刻工艺之后进行一或多道外延工艺。在一例中，进行一或多道蚀刻工艺以移除部分的鳍状结构104a与104b，可形成凹陷于其中。可采用氟化氢溶液或其他合适溶液进行清洁工艺以清洁凹陷。接着进行一或多道外延生长工艺，以生长源极/漏极结构于凹陷中。虽然未图示，但可设想源极/漏极结构填入凹陷之后，可向外扩展出凹陷并形成晶面。晶面可形成为多种轮廓，比如在沿着个别鳍状结构104a与104b的鳍状物宽度方向具有钻石形状的剖面轮廓，其来自于在基板的不同平面或表面上的生长速率差异。源极/漏极结构的材料可包含但不限于锗、硅、砷化镓、砷化铝镓、硅锗、磷砷化镓、锑化镓、锑化铟、砷化铟镓、砷化铟、或上述的组合。源极/漏极结构可掺杂p型掺质以形成p型鳍状场效晶体管，或掺杂n型掺质以形成n型鳍状场效晶体管。源极/漏极结构的形成方法可为外延生长工艺，比如化学气相沉积技术(如气相外延和/或超高真空化学气相沉积)、分子束外延、和/或其他合适工艺。
层间介电层114形成于基板102上。在实施例中，装置100还包括接点蚀刻停止层(未图示)于层间介电层114下。接点蚀刻停止层的组成可为氮化硅、氧化硅、氮氧化硅、碳化硅、氮化碳硅、氮化硼、氮化硼硅、氮化硼碳硅、上述的组合、和/或其他可行材料。在一实施例中，接点蚀刻停止层为氮化硅。接点蚀刻停止层的形成方法可采用任何合适技术，比如化学气相沉积、等离子体增强化学气相沉积、高密度等离子体化学气相沉积、或旋转涂布工艺等等。
层间介电层114可包含的材料包括四乙氧基硅烷的氧化物、未掺杂的硅酸盐玻璃、或掺杂的氧化硅如硼磷硅酸盐玻璃、掺杂氟的硅酸盐玻璃、磷硅酸盐玻璃、掺杂硼的硅酸盐玻璃、和/或其他合适的介电材料。层间介电层114的沉积方法可为等离子体增强化学气相沉积工艺或其他合适的沉积技术。在一实施例中，层间介电层的形成方法为可流动的化学气相沉积工艺。可流动的化学气相沉积工艺包含沉积可流动的材料(如液态化合物)至基板102上以填入沟槽，再以适当技术如回火以将可流动的材料转变为固态材料。在多种沉积工艺后，可进行平坦化工艺如化学机械研磨，以平坦化层间介电层114的上表面，并露出虚置栅极堆叠110的上表面以进行后续工艺步骤。
在步骤14中，移除虚置栅极堆叠110。如图3所示，此步骤分别形成沟槽116a与116b于栅极结构101a与101b中，并露出鳍状结构104a与104b。前述结构如间隔物结构112与层间介电层114围绕沟槽116a与116b。在一实施例中，步骤14包含一或多道蚀刻工艺，其经选择性地调整后可移除虚置栅极堆叠110(见图2)，并实质上保留间隔物结构112与层间介电层114。蚀刻工艺可包含合适的湿蚀刻、干(等离子体)蚀刻、和/或其他工艺。举例来说，干蚀刻工艺可采用含氯气体、含氟气体、其他蚀刻气体、或上述的组合。湿蚀刻溶液可包含氢氧化铵、氟化氢或稀释氟化氢、去离子水、氢氧化四甲基铵、其他合适的湿蚀刻溶液、或上述的组合。
在步骤16中，形成栅极介电层122于沟槽116a与116b中。栅极介电层122顺应性地形成于沟槽116a与116b的露出表面上。如图4所示，方法10可视情况形成界面层120于栅极介电层122下方的沟槽116a与116b其底部。举例来说，界面层120可包含介电材料如氧化硅、氮氧化硅、或其他合适的介电物，且其形成方法可为化学氧化、热氧化、原子层沉积、化学气相沉积、和/或其他合适方法。在此实施例中，栅极介电层122包含高介电常数介电材料如氧化铪、氧化铝、氧化镧、氧化钛、氧化铪锆、氧化钽、氧化铪硅、氧化锆、氧化锆硅、氧化铪-氧化铝合金、上述的组合或其他合适材料。栅极介电层122的形成方法可为原子层沉积和/或其他合适方法，比如化学气相沉积、物理气相沉积、高密度等离子体化学气相沉积、有机金属化学气相沉积、或等离子体增强化学气相沉积。栅极介电层122的厚度可介于约至约之间。界面层120的厚度可介于约至约之间。然而栅极介电层122与界面层120可具有其他合适厚度，并可调整以分别用于p型场效晶体管装置与n型场效晶体管装置。
在步骤18中，形成阻挡层124于沟槽116a与116b中。如图5所示，阻挡层124也称作金属阻障层或金属阻挡层。阻挡层124形成于栅极介电层122上，其目的在于保护栅极介电层122免于后续工艺中导入金属杂质的可能。举例来说，此实施例的栅极结构110a与110b将包括一或多个功函数金属层。若无阻挡层124，功函数金属层的金属材料可能扩散至栅极介电层122，导致工艺缺陷。在多种实施例中，阻挡层124包含金属元素。在此实施例中，阻挡层124包含氮化钽。在另一实施例中，阻挡层124包含氮化钛。在又一实施例中，阻挡层124包含氮化铌。多种其他材料也适用。在一实施例中。阻挡层124的形成方法为原子层沉积、物理气相沉积、化学气相沉积、或其他合适方法。阻挡层124的厚度可介于约至约之间。然而阻挡层124可具有其他合适厚度，并可调整以分别用于p型场效晶体管装置与n型场效晶体管装置。
在步骤20中，形成氧化物层126于阻挡层124上。氧化物层126可提供额外保护至栅极介电层122，其可避免后续阶段使用的蚀刻剂蚀刻穿过阻挡层124。此外，氧化物层126也可作为自组装单层所用的结合层，且自组装单层将形成于栅极结构101a或101b中以调整膜的电性，其详述如下。如图6所示，氧化物层126形成于沟槽116a与116b中，并覆盖阻挡层124的露出表面。氧化物层126的形成方法可为多种工艺。在一实施例中，氧化物层126的形成方法可为以氧气流处理阻挡层124。在一些实施例中，阻挡层124与氧化物层126包含共同的金属元素。在一例中，金属元素为过渡金属。在一实施例中，阻挡层124包含氮化钽，且氧化物层126包含氧化钽。在另一实施例中，阻挡层124包含氮化钛，且氧化物层126包含氧化钛。在又一实施例中，阻挡层124包含氮化铌，且氧化物层126包含氧化铌。在一实施例中，可在干蚀刻工具中对阻挡层124进行氧处理。在其他实施例中，可在干灰化工具中进行氧处理。在一实施例中，氧处理的压力为约1.5mTorr、温度介于约30至60之间，氧流速介于约1mL/min至100mL/min之间(如约30mL/min)，且历时约5秒至约30秒之间。氧化物层126的厚度可介于约至约之间。然而氧化物层126可具有其他合适厚度，并可调整以分别用于p型场效晶体管装置与n型场效晶体管装置。
在其他实施例中，氧化物层126的形成方法可为一或多道的沉积工艺。在此例中，阻挡层124与氧化物层126可包含相同或不同的金属元素。在一例中，金属元素为过渡金属。举例来说，在沉积氧化钽层于阻挡层124上的工艺中，压力可介于约1Torr至约100Torr之间，温度可介于约250℃至约400℃之间，前驱物可为四乙氧基二甲基胺基乙氧化钽，且载气可为氩。前驱物气体的流速可设为约20标准立方公分/分钟。沉积氧化钛或氧化铌的方法，与其作为氧化物层126时的沉积方法类似。氧化物层126的形成方法可为化学氧化、热氧化、原子层沉积、化学气相沉积、和/或其他合适方法如低压化学气相沉积或等离子体增强化学气相沉积。
在步骤22中，自装置区100a中的n型场效晶体管的沟槽116a移除氧化物层126。自沟槽116a移除氧化物层126的方法，可采用掩模单元117覆盖装置区100b，并将装置区100a暴露至蚀刻工艺，如图7所示。掩模单元117超填沟槽116b并完全覆盖装置区100b的露出表面。在一实施例中，掩模单元117包含以光刻工艺图案化的光致抗蚀剂图案，且更进一步包含光致抗蚀剂的下方层如底抗反射涂层。光刻工艺可包含形成光致抗蚀剂层于基板上，以图案曝光光致抗蚀剂层，进行曝光后烘烤工艺，以及显影光致抗蚀剂以移除装置区100b上的部分光致抗蚀剂，即形成掩模单元117。
蚀刻工艺可采用蚀刻剂，自装置区100a中的n型场效晶体管的沟槽116a移除氧化物层126。在一实施例中，蚀刻剂包含氟化氢。氧化物层126如氧化钽的移除方法，可为将基板102浸入氟化氢与水的混合溶液中。氟化氢的浓度可介于约0.2体积％至约1体积％，比如约0.5体积％。在另一实施例中，蚀刻剂可包含氟化氢与氯化氢。氯化氢可用以调整溶液的pH值至1到4之间，比如2。在此例中，氯化氢水溶液中的氯化氢用量可介于溶液的约0.5wt％至10wt％之间。不论如何，蚀刻温度可介于约室温(23℃)至约40℃之间。蚀刻剂的混合溶液其pH值可低于或等于约4，比如约1至约2之间。
可以设想的是，同样可进行步骤22以自装置区100b中的p型场效晶体管的沟槽116b移除氧化物层126。在此例中，自沟槽116b移除氧化物层126的方法可为暴露装置区100b至蚀刻工艺(如蚀刻剂)，并以掩模单元(如掩模单元117)覆盖装置区100a，如前述图7所示。
自装置区100a中的n型场效晶体管的沟槽116a移除氧化物层126之后，自装置区100b移除掩模单元117，如图8所示。掩模单元117的移除方法可采用合适工艺，比如光致抗蚀剂剥除或灰化。
在步骤24中，形成掩模单元121以覆盖装置区100a，如图9所示。掩模单元121过填沟槽116a并完全覆盖装置区100a的露出表面。与掩模单元117类似，掩模单元121包含以光刻工艺图案化的图案化光致抗蚀剂，且可进一步包含光致抗蚀剂的下方层如底抗反射涂层。光刻工艺可包含形成光致抗蚀剂层于基胆102上、以图案曝光光致抗蚀剂层、进行曝光后烘烤工艺、以及显影光致抗蚀剂层以移除装置区100a上的光致抗蚀剂，并形成掩模单元121。
在步骤26中，进行沉积工艺以用于装置区100b中的p型场效晶体管。此沉积工艺采用自组装沉积工艺，以形成一或多层的自组装单层123于装置区100a中的p型场效晶体管其沟槽116b中的氧化物层126上，如图10所示。当自组装单层123可调整金属栅极的电性如临界电压时，其可视作装置区100a中的p型场效晶体管所用的功函数金属层或其部分。此处的用语“单层”指的是厚度与单一原子或分子的长度实际上相同的层状物。在多种实施例中，自组装单层123的厚度可小于或等于约比如小于或等于约其可依组装单层123的组成而变化。
自组装沉积工艺可为以溶液为主(如液体为主)的前驱物喷洒、浸泡、含浸、注入、或冲洗基板102。在一实施例中，将溶液为主的前驱物喷洒至氧化物层126上。溶液为主的前驱物其制备方法，可为溶解金属氧化物于磷为主的酸的水溶液中，且上述步骤的温度可介于约室温(23℃)至约60℃之间，且历时约10分钟至120分钟之间(比如约60分钟至约90分钟之间)。溶液可包含约10mmol/L至约1mol/L(或约1wt％至5wt％)的磷为主的酸，与约0.1mg/L至10mg/L的金属氧化物。磷为主的酸可为合适的可溶解金属酸，比如磷酸、正磷酸、或类似物。在一实施例中，磷为主的酸是磷酸(或正磷酸)。在另一实施例中，磷为主的酸是十八烷基磷酸。例示性的金属氧化物可包含但不限于含钛氧化物如氧化钛、含铌氧化物如氧化铌、含钽氧化物如氧化钽、含铝氧化物如氧化铝、或含铁氧化物如氧化铁。自组装单层123可包含与氧化物层126的金属相同或不同的金属。在图11中，自组装单层123的金属标示为“M”。磷为主的酸的水溶液中的磷酸盐离子，与磷为主的酸的水溶液中的金属离子化学反应，以形成水溶液中的金属络合物。
沉积工艺中的自组装单层123的分子产生磷酸螯合，以自发性地键结或吸附至p型场效晶体管的沟槽116b中的氧化物层126。自组装单层123的分子为自组装且彼此交联。不拘于任何特定理论，据信自组装单层123的单一分子可经由磷-氧-钽键结自动键结至氧化物层126，接着与自组装单层123键结至氧化物层126的两个相邻分子交联，见图11。自组装单层123为自我限制，其中分子本身使形成的结构为单层。自组装单层123形成于氧化物层126上有利于调整栅极结构101b的电性如临界电压，且可避免磷酸穿越氧化物层126。在氧化物层126为氧化钽的例子中，自组装单层123可包含紧密堆积的磷酸盐分子(如十八烷基磷酸盐分子)，其配位至氧化钽表面以形成单层结构。多个磷酸盐的头基可配位至一钽离子，并形成单螯合与双螯合的络合物，如图11所示的化学式。
在一实施例中，当氧化物层126包含氧化钛或氧化铌时，可在沉积工艺中形成自组装单层123于p型场效晶体管的沟槽116b中的氧化物层126其表面上。
虽然上述沉积工艺是在装置区100b中的p型场效晶体管上进行，但可设想若需调整n型场效晶体管，则电性沉积工艺也可在装置区100a中的n型场效晶体管上进行。在此例中，可进行步骤22自p型场效晶体管的沟槽116b移除氧化物层126，接着以掩模单元覆盖装置区100b。不论沉积工艺是在n型场效晶体管或在p型场效晶体管上进行，一些实施例在形成自组装单层123于氧化物层126上之后，同样可进行上述沉积工艺以形成额外的自组装单层125(图11只显示一自组装单层125以达说明目的)于之前形成的自组装单层(如自组装单层123)上，以提供多层功函数金属设置。举例来说，沉积工艺可形成两层的自组装单层，其中第一自组装单层包括含钛氧化物如氧化钛，且第二自组装单层包括含铌氧化物如氧化铌。在一些实施例中，沉积工艺可形成三层的自组装单层，其中第一自组装单层包括含钛氧化物如氧化钛，第二自组装单层包括含铌氧化物如氧化铌，且第三自组装单层包括含钽氧化物如氧化钽。在一些例子中，沉积工艺可形成三层的自组装单层，其中第一自组装单层包括含钛氧化物如氧化钛，第二自组装单层包括含铝氧化物如氧化铝，且第三自组装单层包括含铁氧化物如氧化铁。可以理解的是，这些实施例仅用以举例而非局限本公开。自组装单层结构可为任何级数，且可具有任何数目的单层以调整n型场效晶体管或p型场效晶体管的电性如临界电压。
在氧化物层126上形成自组装单层123的优点在于，上述两者一起提供阻挡金属的能力，以确保栅极介电层122的纯度。此外，由于自组装单层123(作为功函数金属)是由紧密堆积的分子所组成的单层，且其形成于氧化物层126上的沟槽116b中的厚度小于或等于约因此自组装单层123的厚度不限于进阶工艺节点的较小关键尺寸。相反地，化学气相沉积形成于沟槽其相对侧壁上的金属膜易于合并。此外，自组装沉积工艺可直接沉积金属于特定的p型或n型晶体管上，以在光致抗蚀剂存在下调整临界电压，这是因为自组装单层123可形成于低温工艺(比如室温至60℃)，比如将基板暴露至溶液为主的前驱物(具有金属与磷酸盐络合物)。相反地，公知化学气相沉积工艺需要多重图案化/移除金属的高温工艺(比如300℃至400℃或更高)，以形成功函数金属层以微调鳍状场效晶体管的临界电压。上述公知工艺复杂且昂贵，也可能在沉积时污染功函数金属层。高温下的金属图案化工艺也灰化光致抗蚀剂，和/或因图案化移除功函数金属层所用的蚀刻剂的蚀刻选择性不佳，而造成阻挡层产生不想要的蚀刻。公知金属图案化工艺需要n型金属氧化物半导体金属与p型金属氧化物半导体金属具有湿蚀刻选择性，以避免移除n型金属氧化物半导体金属的工艺损伤p型金属氧化物半导体金属。如此一来，功函数金属的选择受限于湿蚀刻选择性。搭配进步的湿工艺为主的研究可形成自组装单层，而不因光致抗蚀剂存在而损伤p型场效晶体管或n型场效晶体管。
在形成自组装单层123之后，可采用冲洗工艺清洁基板102。冲洗工艺可采用含去离子水的溶液、二氧化碳化的去离子水(如具有二氧化碳的去离子水)、或具有稀氢氧化铵的去离子水。冲洗工艺的温度可介于约20℃至约80℃之间。在一些实施例中，可在冲洗工艺之后进行干燥工艺，使自组装单层123的表面干燥。举例来说，干燥工艺可包含在氮气气流的存在下旋转干燥装置100。举例来说，干燥工艺可包含异丙醇干燥工艺。
在步骤28中，自装置区100a移除掩模单元121，且接着形成功函数金属层128以用于装置区100a中的n型场效晶体管与装置区100b中的p型场效晶体管，如图12所示。掩模单元121的移除方法可采用合适工艺，比如光致抗蚀剂剥除或灰化。功函数层128形成于沟槽116a与116b中，以分别覆盖阻挡层124与自组装单层123。功函数金属层128可包含金属或金属化合物，比如氮化钛、氮化钽、钌、钼、铝、氮化钨、锆硅化物、钼硅化物、钽硅化物、镍硅化物、钛、钽、银、钛铝、钽铝、碳化钽铝、氮化钛铝、碳化钽、碳氮化钽、氮化钽硅、锰、锆、或上述的组合。功函数金属层128可包含多层，且其沉积方法可为化学气相沉积、物理气相沉积、和/或其他合适工艺。
在一实施例中，功函数金属层128包含适于形成n型场效晶体管于装置区100a中的功函数材料。举例来说，含铝材料可用于功函数金属层128。功函数金属层128的厚度可介于约至约之间。在此实施例中，即使功函数金属层128并非用于装置区100b中的p型场效晶体管，仍沉积功函数材料至沟槽116a与116b中。同时沉积功函数金属层128至沟槽116a与116b中，可简化工艺并改善膜纯度，因为不需以有机材料如光致抗蚀剂覆盖部分的装置100(比如装置区100b)。另一方面，可进行选择性沉积，比如以光致抗蚀剂覆盖装置区100b，接着沉积功函数材料至沟槽116a中，反之亦然。可以设想的是，若自组装单层存在于装置区100a中的n型场效晶体管内以调整电性(如高介电常数介电物-金属栅极的临界电压)，功函数金属层128可包含任何适于形成装置区100b中p型场效晶体管的功函数材料。
在图12所示的实施例中，在沉积功函数金属层128于沟槽116a中之后，保留功函数材料于p型场效晶体管的沟槽116b中。金属栅极结构中的多种材料可提供较宽的装置调整容忍度，以达p型场效晶体管和/或n型场效晶体管所需。
在一些实施例中，在沉积功函数金属层128至沟槽116a中之后，可视情况自p型场效晶体管的沟槽116b移除功函数材料。在此例中，蚀刻工艺可采用蚀刻剂自沟槽116b移除功函数金属层128。在一实施例中，蚀刻剂可包含磷酸(或正磷酸)，比如水溶液中85wt％的磷酸。蚀刻工艺的温度可介于约20℃至约80℃之间。在此实施例中，蚀刻剂可为磷酸与其他组成的混合物，而其他组成可为双氧水、硝酸、硫酸、去离子水、氢氧化铵、臭氧、氢氟酸、盐酸、其他酸性溶液与有机氧化剂或上述的组合。在实施例中，混合物中的磷酸比例介于约1：5至约1：50之间。
在一些实施例中，蚀刻工艺用以自p型场效晶体管的沟槽116b移除功函数材料，且在蚀刻工艺后可进行冲洗工艺以自沟槽116b移除蚀刻残留物。举例来说，冲洗工艺可采用含去离子水的溶液、二氧化碳化的去离子水(如具有二氧化碳的去离子水)、或具有稀氢氧化铵的去离子水。冲洗工艺的温度可介于约20℃至约80℃之间。与前述冲洗工艺类似，方法10也可包含干燥工艺使自组装单层123的表面干燥。举例来说，干燥工艺可包含在氮气气流的存在下旋转干燥装置100。举例来说，干燥工艺可包含异丙醇干燥工艺。
在步骤30中，形成栅极材料136于沟槽116a与116b的其余空间中，如图13所示。栅极材料136可包含金属如钨、铝、铜、钛、钽、钴、钼、铂、或上述的组合。栅极材料136的形成方法可为化学气相沉积、物理气相沉积、电镀、和/或其他合适工艺如原子层沉积。可进行平坦化工艺如化学机械研磨，自栅极结构101a与101b移除多余材料，以平坦化装置100的上表面137。
上述实施例形成装置区100b中的p型场效晶体管上的自组装单层，以调整p型场效晶体管的临界电压。若需调整n型场效晶体管的电性，可以设想的是本公开多种实施例可用于装置区100a中的n型场效晶体管。在这些例子中，步骤22可自p型场效晶体管的沟槽116b移除氧化物层126，接着以掩模单元覆盖装置区100b，以形成自组装单层139于n型场效晶体管的氧化物层126上。图14显示一实施例的部分装置的剖视图。接着分别形成功函数金属层128于沟槽116a与116b中，其形成方法如前述。之后，可将上述的栅极材料136形成于沟槽116a与116b的其余空间中，以完成金属栅极结构。自组装单层可形成于n型场效晶体管与p型场效晶体管上，均视需要而定。
在平坦化装置100的上表面137之后，可对装置100进行额外工艺，比如形成接点与通孔以电性连接源极/漏极结构108a与108b及栅极结构101a与101b，并形成金属内连线以连接鳍状场效晶体管至装置的其他部分，以完成完整的集成电路。
本公开实施例提供调整高介电常数介电物-金属栅极的湿工艺为主的方法。在本公开实施例中，自组装单层形成于栅极介电层上的保护氧化层上。自组装单层可作为功函数金属，有助于调整高介电常数介电物-金属栅极的临界电压。自组装单层的形成温度为低温(比如室温至60℃之间)，比如将基板暴露至溶液为主的前驱物(具有金属与磷酸盐络合物)，在光致抗蚀剂存在下直接沉积金属于特定的p型或n型晶体管上，且光致抗蚀剂用以覆盖不需调整的装置区。如此一来，形成功函数金属时不会污染功函数金属。此外，位于氧化物层上的狭窄沟槽中的自组装单层，是由紧密堆积的分子所组成的单层，且其厚度小于或等于约自组装单层的沉积厚度，不限于进阶工艺节点其较小的关键尺寸。与此相反，化学气相沉积形成的金属膜具有厚度限制，因为沟槽的相对侧壁上的功函数金属层易于合并而使装置效能失效。
在一实施例中，半导体装置的形成方法包括：形成栅极结构于基板上，栅极结构包括栅极介电层、阻挡层形成于栅极介电层上、以及氧化物层形成于阻挡层上；以及将氧化物层暴露至水溶液，以形成自组装单层于氧化物层上，其中水溶液包含金属氧化物于溶解金属的酸中。
在一实施例中，上述方法的氧化物层包括过渡金属。
在一实施例中，上述方法的溶解金属的酸是磷为主的酸。
在一实施例中，金属氧化物包括含钛氧化物、含铌氧化物、含钽氧化物、含铝氧化物、或含铁氧化物。
在一实施例中，上述方法还包括形成金属层于自组装单层上；以及形成金属栅极材料于金属层上。
在一实施例中，上述方法在形成金属层于自组装单层上之前，还包括形成自组装单层堆叠于自组装单层上，且自组装单层堆叠包括一或多个自组装单层。
在一实施例中，上述方法的每一自组装单层为金属氧化物，且金属包含钛、铌、钽、铝、或铁。
在另一实施例中，半导体装置的形成方法包括：提供基板，包含第一装置区与第二装置区，且第一装置与区第二装置区各自具有介电层位于基板上；具有沟槽的栅极结构位于介电层上；与栅极结构接合的鳍状结构垂直地位于基板表面上；以及与栅极结构的相对两侧相邻的源极/漏极区；形成栅极介电层于第一与第二装置区中的栅极结构其沟槽中；形成阻挡层于第一与第二装置区中的栅极结构其沟槽中的栅极介电层上；形成氧化物层于第一与第二装置区中的栅极结构其沟槽中的阻挡层上；自第一装置区中的栅极结构其沟槽移除氧化物层；以及形成自组装单层于第二装置区中的栅极结构其沟槽中的氧化物层上，且自组装单层包含金属。
在一实施例中，上述方法形成自组装单层于氧化物层上的步骤还包括：以掩模单元覆盖第一装置区。
在一实施例中，上述方法的自组装单层形成于氧化物层上的方法，是将氧化物层暴露至水溶液中，且水溶液包含金属氧化物于溶解金属的酸中。
在一实施例中，上述方法的溶解金属的酸是磷为主的酸。
在一实施例中，上述方法的金属氧化物包括含钛氧化物、含铌氧化物、含钽氧化物、含铝氧化物、或含铁氧化物。
在一实施例中，上述方法的阻挡层与氧化物层包括共同的金属元素，且金属元素为过渡金属。
在一实施例中，上述方法的氧化物层包括氧化钽、氧化钛、或氧化铌。
在一实施例中，上述方法在形成自组装单层于第二装置区中的栅极结构的沟槽中的氧化物层上之后，还包括各自形成功函数金属层于第一装置区中的栅极结构的阻挡层上，以及第二装置区中的栅极结构的自组装单层上；以及将金属栅极材料填入第一与第二装置区中的栅极结构的沟槽中。
在又一实施例中，半导体装置包括基板；以及第一栅极结构位于基板上，其中第一栅极结构包括：栅极介电层位于基板上；阻挡层位于栅极介电层上；氧化物层位于阻挡层上；自组装单层位于氧化物层上，且自组装单层包含金属；以及金属栅极材料位于自组装单层上。
在一实施例中，上述半导体装置的氧化物层包括过渡金属。
在一实施例中，上述半导体装置还包括：第二栅极结构位于基板上，其中第二栅极结构包括：栅极介电层位于基板上；阻挡层位于栅极介电层上；功函数金属层位于阻挡层上；以及金属栅极材料层位于功函数金属层上。
在一实施例中，上述半导体装置还包括功函数金属层于自组装单层与金属栅极材料层之间，其中第一栅极结构的功函数金属层与第二栅极结构的功函数金属层具有相同导电度。
在一实施例中，上述半导体装置还包括自组装单层堆叠位于自组装单层上，自组装单层堆叠包含一或多个金属氧化物的自组装单层，其中金属包括钛、铌、钽、铝、或铁。
上述实施例的特征有利于本领域普通技术人员理解本公开。本领域普通技术人员应理解可采用本公开作基础，设计并变化其他工艺与结构以完成上述实施例的相同目的和/或相同优点。本领域普通技术人员也应理解，这些等效置换并未脱离本公开构思与范畴，并可在未脱离本公开的构思与范畴的前提下进行改变、替换、或更动。

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1.一种半导体装置的形成方法，包括：
形成一栅极结构于一基板上，该栅极结构包括一栅极介电层、一阻挡层形成于该栅极介电层上、以及一氧化物层形成于该阻挡层上；以及
将该氧化物层暴露至一水溶液，以形成一自组装单层于该氧化物层上，其中该水溶液包含金属氧化物于一溶解金属的酸中。
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