CN109429442B - Circuit board and manufacturing method thereof - Google Patents
Circuit board and manufacturing method thereof Download PDFInfo
- Publication number
- CN109429442B CN109429442B CN201710773938.0A CN201710773938A CN109429442B CN 109429442 B CN109429442 B CN 109429442B CN 201710773938 A CN201710773938 A CN 201710773938A CN 109429442 B CN109429442 B CN 109429442B
- Authority
- CN
- China
- Prior art keywords
- conductive
- layer
- pad
- conductive pad
- copper foil
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Images
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0296—Conductive pattern lay-out details not covered by sub groups H05K1/02 - H05K1/0295
- H05K1/0298—Multilayer circuits
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09672—Superposed layout, i.e. in different planes
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Wiring (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
Abstract
The present invention relates to a circuit board. A circuit board includes an insulating layer, a bonding pad, and a nickel-gold plating layer. The welding pad and the nickel-gold plating layer are arranged on the insulating layer. The nickel-gold plating layer coats the welding pad. The bonding pad comprises a first conductive pad and a second conductive pad. The second conductive pad is disposed on the insulating layer. The first conductive pad is disposed on the second conductive pad. The thickness of the second conductive pad is less than the thickness of the first conductive pad. The second conductive pad has a protruding portion opposite the first conductive pad. The protruding portion surrounds the first conductive pad. The invention also provides a manufacturing method of the circuit board.
Description
Technical Field
The invention relates to the field of circuit board manufacturing, in particular to a multilayer circuit board and a manufacturing method thereof.
Background
Printed circuit boards are widely used because of their high packaging density. For the use of circuit boards see the documents Takahashi, A.Ooki, N.Nagai, A.Akahoshi, H.Mukoh, A.Wajima, M.Res.Lab, high diversity multilayer printed circuit board for HITAC M-880, IEEE trans.on Components, Packaging, and Manufacturing Technology,1992,15(4): 1418-.
In the manufacturing process of the circuit board, the surface of the bonding pad is usually treated, and a nickel plating layer and a gold plating layer are sequentially plated on the surface of the bonding pad. The welding pad, the nickel-plated layer and the gold-plated layer are all arranged on the insulating layer, the nickel-plated layer covers the welding pad, and the gold-plated layer covers the nickel-plated layer. In practical situations, minute gaps exist at the interfaces of the gold plating layer, the nickel plating layer and the insulating layer. Moist air easily enters from the gap to cause metal corrosion with the nickel plating layer. The nickel plating layer is corroded to a certain degree, and the gold plating layer is stripped off from the circuit board.
Disclosure of Invention
Therefore, it is desirable to provide a circuit board and a method for manufacturing the same to solve the above problems.
A manufacturing method of a circuit board comprises the following steps:
providing a first copper foil layer and an insulating layer, wherein the copper foil layer is fixedly arranged on the insulating layer;
manufacturing and forming a first conductive layer with a circuit pattern on the surface of the first copper foil layer, wherein the first conductive layer comprises a plurality of first conductive pads;
etching the first copper foil layer to obtain a second conductive layer, so that the circuit pattern of the second conductive layer corresponds to the circuit pattern of the first conductive layer, the second conductive layer comprises a plurality of second conductive pads, the thickness of the second conductive pads is smaller than that of the first conductive pads, the first conductive pads and the second conductive pads together form a welding pad of the circuit board, each first conductive pad is arranged on the corresponding second conductive pad, the second conductive pads have a protruding portion opposite to the first conductive pads, and the protruding portions surround the first conductive pads;
and plating a nickel-gold plating layer on the upper surface and the side surface of the welding pad.
A circuit board includes an insulating layer, a bonding pad, and a nickel-gold plating layer. The welding pad and the nickel-gold plating layer are arranged on the insulating layer. The nickel-gold plating layer coats the welding pad. The bonding pad comprises a first conductive pad and a second conductive pad. The second conductive pad is disposed on the insulating layer. The first conductive pad is disposed on the second conductive pad. The thickness of the second conductive pad is less than the thickness of the first conductive pad. The second conductive pad has a protruding portion opposite the first conductive pad. The protruding portion surrounds the first conductive pad.
Compared with the prior art, the circuit board and the manufacturing method thereof provided by the invention comprise the welding pad, and the welding pad comprises the second conductive pad and the first conductive pad. The second conductive pad is arranged on the insulating layer, the first conductive pad is arranged on the second conductive pad, the thickness of the second conductive pad is smaller than that of the first conductive pad, the second conductive pad is provided with a protruding part relative to the first conductive pad, the protruding part surrounds the first conductive pad, the protruding part is arranged close to the gold-plated layer in an extending mode, the nickel-plated layer is replaced by the protruding part, the nickel-plated layer preferentially reacts with air and moisture entering between the gold-plated layer and the insulating layer, the reaction time of the nickel-plated layer with the air and moisture is prolonged, and the gold-plated layer is prevented from being stripped and falling off from the circuit board to a certain extent.
Drawings
Fig. 1 is a schematic cross-sectional view of a copper foil substrate and a first dry film according to a preferred embodiment of the invention.
Fig. 2 is a schematic cross-sectional view of the copper first dry film pattern of fig. 1.
Fig. 3 is a schematic cross-sectional view of the first dry film of fig. 2 after development.
Fig. 4 is a schematic cross-sectional view of the first dry film pattern of fig. 3 after a first conductive layer is formed.
Fig. 5 is a schematic cross-sectional view of the copper foil substrate of fig. 4 after the first dry film is stripped.
Fig. 6 is a schematic cross-sectional view of the first copper foil layer and the first conductive layer of fig. 5 after a second dry film is laminated thereon.
Fig. 7 is a schematic cross-sectional view of the second dry film of fig. 6 after exposure.
Fig. 8 is a schematic cross-sectional view of the second dry film of fig. 7 after development.
Fig. 9 is a schematic cross-sectional view of the first copper foil layer of fig. 8 after being etched to form a pattern.
Fig. 10 is a cross-sectional view of the second dry film of fig. 9 after being stripped from the first copper foil layer and the first conductive layer.
Fig. 11 is a cross-sectional view after forming a nickel plating layer and a gold plating layer on the bonding pad of fig. 10.
Description of the main elements
First copper foil layer 14
First dry film 20
First dry film pattern 22
First opening 220
First conductive layer 30
First conductive pad 32
Second dry film 40
Second dry film pattern 42
Second conductive layer 50
Second conductive pad 52
The following detailed description will further illustrate the invention in conjunction with the above-described figures.
Detailed Description
The following describes a method for manufacturing the circuit board 100 according to the present technical solution by taking the manufacturing of a single-layer circuit board as an example, where the method for manufacturing the circuit board 100 includes the following steps:
referring to fig. 1, a copper foil substrate 10 and a first dry film 20 are provided, and the first dry film 20 is attached and fixed on a copper foil surface of the copper foil substrate 10.
The copper foil substrate 10 includes an insulating layer 12 and a first copper foil layer 14. The first copper foil layer 14 is attached to the insulating layer 12. The copper foil substrate 10 may be a flexible copper foil substrate or a rigid copper foil substrate. The first dry film 20 is attached to the first copper foil layer 14.
In a second step, referring to fig. 2 and fig. 3, the first dry film 20 is exposed and developed to form a first dry film pattern 22 on the first dry film 20.
Referring to fig. 3, a plurality of first openings 220 are formed on the first dry film pattern 22. A portion of the first copper foil layer 14 is exposed from the plurality of first openings 220.
Third, referring to fig. 4, the copper foil substrate 10 is electroplated, and the first conductive layer 30 is formed on the first copper foil layer 14.
The first conductive layer 30 fills the plurality of first openings 220. In this embodiment, the thickness of the first conductive layer 30 is smaller than the thickness of the first dry film 20.
In other embodiments, the thickness of the first conductive layer 30 may be greater than or equal to the thickness of the first dry film 20.
In a fourth step, referring to fig. 5, the first dry film 20 is removed from the first copper foil layer 14. The thickness of the first conductive layer 30 is greater than the thickness of the first copper foil layer 14. The first conductive layer 30 includes a plurality of first conductive pads 32.
In a fifth step, referring to fig. 6, a second dry film 40 is provided, and the second dry film 40 is laminated on the first copper foil layer 14 and the first conductive layer 30. The second dry film 40 is a photosensitive cover film.
In a sixth step, referring to fig. 7 and 8, the second dry film 40 is exposed and developed to form a second dry film pattern 42.
In this step, the second dry film pattern 42 covers the first conductive layer 30 and covers a portion of the first copper foil layer 14. The portion of the first copper foil layer 14 surrounds the first conductive layer 30. The second dry film pattern 42 includes a plurality of second openings 420. The first copper foil layer 14 is exposed from the plurality of second openings 420.
Seventhly, referring to fig. 9, the first copper foil layer 14 is etched, the first copper foil layer 14 is fabricated into a second conductive layer 50 having a circuit pattern, and a circuit layer 60 is formed on the insulating layer 12.
The line pattern of the second conductive layer 50 corresponds to the line pattern of the first conductive layer 30.
In an eighth step, referring to fig. 10, the second dry film 40 on the second conductive layer 50 and the first conductive layer 30 is stripped, so that the second conductive layer 50 and the first conductive layer 30 are exposed.
The second conductive layer 50 includes a plurality of second conductive pads 52. The second conductive layer 50 and the first conductive layer 30 together form a circuit layer 60. The circuit layer 60 includes the first conductive layer 30 and the second conductive layer 50 stacked on top of each other. The wiring layer 60 includes a plurality of pads 70. The pad 70 includes a first conductive pad 32 and the second conductive pad 52. The second conductive pad 52 is disposed on the insulating layer 12. The first conductive pad 32 is secured to the second conductive pad 52. The thickness of the second conductive pad 52 is less than the thickness of the first conductive pad 32. The second conductive pad 52 has a protruding portion 54 opposite the first conductive pad 32. The protruding portion 54 surrounds the first conductive pad 32.
Ninth, referring to fig. 11, a nickel plating layer 80 is plated on the surface of the bonding pad 70, and a gold plating layer 90 is plated on the surface of the nickel plating layer 80, thereby completing the manufacturing of the circuit board 100.
The nickel plating layer 80 is disposed on the insulating layer 12 and covers the pad 70. The gold plating layer 90 is disposed on the insulating layer 12 and covers the nickel plating layer 80.
Referring to fig. 11, the circuit board 100 includes the insulating layer 12, the bonding pad 70, the nickel plating layer 80, and the gold plating layer 90. The bonding pad 70, the nickel plating layer 80, and the gold plating layer 90 are all disposed on the insulating layer 12. The nickel plating layer 80 covers the upper surface and the side surface of the pad 70. The gold-plating layer 90 covers the nickel-plating layer 80. The pad 70 includes the second conductive pad 52 and the first conductive pad 32. The second conductive pad 52 is disposed on the insulating layer 12. The first conductive pad 32 is disposed on the second conductive pad 52. The thickness of the second conductive pad 52 is less than the thickness of the first conductive pad 32. The second conductive pad 52 has a protruding portion 54 opposite the first conductive pad 32. The protruding portion 54 surrounds the first conductive pad 32.
The top of the first conductive pad 32 extends toward the gold plating layer 90. The cross-sectional shape of the protruding portion 54 in a direction perpendicular to the insulating layer 12 is one of a triangle, a rectangle, or a trapezoid. The cross-sectional shape of the protruding portion 54 is not limited thereto.
Wherein, the vertical height from the highest point of the protruding portion 54 to the upper surface of the insulating layer 12 is h; the total thickness of the second conductive pad 52 and the first conductive pad 32 is T; the total thickness of the nickel-plated layer 80 and the gold-plated layer 90 is H; wherein:
h+H≦T。
the protruding portion 54 protrudes beyond the first conductive pad 32 by a width d, wherein:
d≦T/3。
the circuit board and the manufacturing method thereof provided by the present invention include the pad 70, and the pad 70 includes the second conductive pad 52 and the first conductive pad 32. The second conductive pad 52 is disposed on the insulating layer 12, the first conductive pad 32 is disposed on the second conductive pad 52, the thickness of the second conductive pad 52 is smaller than that of the first conductive pad 32, the second conductive pad 52 has a protruding portion 54 opposite to the first conductive pad 32, the protruding portion 54 surrounds the first conductive pad 32, the protruding portion 54 extends close to the gold-plated layer 90, and instead of the nickel-plated layer 80 preferentially reacting with the air and moisture entering between the gold-plated layer 90 and the insulating layer 12, the reaction time of the nickel-plated layer 80 with the air and moisture is delayed, and the gold-plated layer 90 is prevented from being peeled off from the circuit board 100 to some extent.
It is understood that various other changes and modifications may be made by those skilled in the art based on the technical idea of the present invention, and all such changes and modifications should fall within the protective scope of the claims of the present invention.
Claims (4)
1. A manufacturing method of a circuit board comprises the following steps:
providing a first copper foil layer and an insulating layer, wherein the copper foil layer is fixedly arranged on the insulating layer;
manufacturing and forming a first conductive layer with a circuit pattern on the surface of the first copper foil layer, wherein the first conductive layer comprises a plurality of first conductive pads;
etching the first copper foil layer to obtain a second conductive layer, so that the circuit pattern of the second conductive layer corresponds to the circuit pattern of the first conductive layer, the second conductive layer comprises a plurality of second conductive pads, the thickness of the second conductive pads is smaller than that of the first conductive pads, the first conductive pads and the second conductive pads together form a welding pad of the circuit board, each first conductive pad is arranged on the corresponding second conductive pad, the second conductive pads have a protruding portion opposite to the first conductive pads, and the protruding portions surround the first conductive pads; the cross section of the protruding part along the direction vertical to the insulating layer is in one of a triangle shape, a rectangle shape or a trapezoid shape;
plating a nickel-gold plating layer on the upper surface and the side surface of the welding pad; the vertical height from the highest point of the second conductive pad to the upper surface of the insulating layer is h; the total thickness of the second conductive pad and the first conductive pad is T; the total thickness of the nickel-gold plating layer is H; wherein: h + H ≦ T; the second conductive pad end protrudes beyond the first conductive pad by a width d, wherein: d ≦ T/3.
2. The method of claim 1, wherein after the step of forming the first conductive layer having a pattern and before etching the first copper foil layer to obtain the second conductive layer, the method further comprises the steps of providing a second dry film, attaching the second dry film to the first copper foil layer and the first conductive layer, exposing and developing the second dry film to form a second dry film pattern, wherein the second dry film pattern covers the first conductive layer and covers a portion of the first copper foil layer surrounding the first conductive layer, and the first copper foil layer not covered by the second dry film pattern is removed by etching.
3. The method of claim 1, wherein the step of forming a patterned first conductive layer on the surface of the first copper foil layer comprises: and providing a first dry film, attaching the first dry film to the first copper foil layer, and carrying out exposure, development, copper plating and film stripping treatment on the first dry film to obtain the first conductive layer.
4. A circuit board comprises an insulating layer, a welding pad and a nickel-gold plating layer, wherein the welding pad and the nickel-gold plating layer are arranged on the insulating layer, the nickel-gold plating layer covers the welding pad, the welding pad comprises a first conductive pad and a second conductive pad, the second conductive pad is arranged on the insulating layer, the first conductive pad is arranged on the second conductive pad, the thickness of the second conductive pad is smaller than that of the first conductive pad, the second conductive pad is provided with a protruding part relative to the first conductive pad, and the protruding part surrounds the first conductive pad; the cross section of the protruding part along the direction vertical to the insulating layer is in one of a triangle shape, a rectangle shape or a trapezoid shape; the vertical height from the highest point of the second conductive pad to the upper surface of the insulating layer is h; the total thickness of the second conductive pad and the first conductive pad is T; the total thickness of the nickel-gold plating layer is H; wherein: h + H ≦ T; the second conductive pad end protrudes beyond the first conductive pad by a width d, wherein: d ≦ T/3.
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710773938.0A CN109429442B (en) | 2017-08-31 | 2017-08-31 | Circuit board and manufacturing method thereof |
TW106140405A TWI661751B (en) | 2017-08-31 | 2017-11-21 | Printed circuit board and method for manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CN201710773938.0A CN109429442B (en) | 2017-08-31 | 2017-08-31 | Circuit board and manufacturing method thereof |
Publications (2)
Publication Number | Publication Date |
---|---|
CN109429442A CN109429442A (en) | 2019-03-05 |
CN109429442B true CN109429442B (en) | 2020-09-22 |
Family
ID=65505473
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
CN201710773938.0A Active CN109429442B (en) | 2017-08-31 | 2017-08-31 | Circuit board and manufacturing method thereof |
Country Status (2)
Country | Link |
---|---|
CN (1) | CN109429442B (en) |
TW (1) | TWI661751B (en) |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN109714902A (en) * | 2017-10-25 | 2019-05-03 | 鹏鼎控股(深圳)股份有限公司 | Circuit board and preparation method thereof |
CN110809364A (en) * | 2019-11-15 | 2020-02-18 | 广州兴森快捷电路科技有限公司 | PCB manufacturing method and PCB |
CN114554729A (en) * | 2020-11-27 | 2022-05-27 | 鹏鼎控股(深圳)股份有限公司 | Manufacturing method of circuit board and circuit board |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN102802364A (en) * | 2012-09-11 | 2012-11-28 | 岳长来 | Method for arranging metal palladium layer in conducting layer of printed circuit board and layered structure thereof |
CN202857129U (en) * | 2012-09-11 | 2013-04-03 | 岳长来 | Structure of metal palladium layer in conducting layer of printed circuit board |
CN103582304A (en) * | 2012-07-30 | 2014-02-12 | 富葵精密组件(深圳)有限公司 | Transparent printed circuit board and manufacturing method thereof |
CN104427738A (en) * | 2013-08-21 | 2015-03-18 | 富葵精密组件(深圳)有限公司 | Printed circuit board and manufacturing method thereof |
CN106304662A (en) * | 2015-05-27 | 2017-01-04 | 富葵精密组件(深圳)有限公司 | Circuit board and preparation method thereof |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5800575A (en) * | 1992-04-06 | 1998-09-01 | Zycon Corporation | In situ method of forming a bypass capacitor element internally within a capacitive PCB |
US5764485A (en) * | 1996-04-19 | 1998-06-09 | Lebaschi; Ali | Multi-layer PCB blockade-via pad-connection |
US5912809A (en) * | 1997-01-21 | 1999-06-15 | Dell Usa, L.P. | Printed circuit board (PCB) including channeled capacitive plane structure |
KR102552614B1 (en) * | 2016-02-26 | 2023-07-06 | 주식회사 기가레인 | Flexible printed circuit board |
CN206260136U (en) * | 2016-12-23 | 2017-06-16 | 中磊电子(苏州)有限公司 | Circuit board |
TWM546084U (en) * | 2017-04-21 | 2017-07-21 | Jiang-Rong Xie | Circuit board module structure improvement |
-
2017
- 2017-08-31 CN CN201710773938.0A patent/CN109429442B/en active Active
- 2017-11-21 TW TW106140405A patent/TWI661751B/en active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN103582304A (en) * | 2012-07-30 | 2014-02-12 | 富葵精密组件(深圳)有限公司 | Transparent printed circuit board and manufacturing method thereof |
CN102802364A (en) * | 2012-09-11 | 2012-11-28 | 岳长来 | Method for arranging metal palladium layer in conducting layer of printed circuit board and layered structure thereof |
CN202857129U (en) * | 2012-09-11 | 2013-04-03 | 岳长来 | Structure of metal palladium layer in conducting layer of printed circuit board |
CN104427738A (en) * | 2013-08-21 | 2015-03-18 | 富葵精密组件(深圳)有限公司 | Printed circuit board and manufacturing method thereof |
CN106304662A (en) * | 2015-05-27 | 2017-01-04 | 富葵精密组件(深圳)有限公司 | Circuit board and preparation method thereof |
Also Published As
Publication number | Publication date |
---|---|
TWI661751B (en) | 2019-06-01 |
CN109429442A (en) | 2019-03-05 |
TW201914382A (en) | 2019-04-01 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5144222B2 (en) | Wiring board and manufacturing method thereof | |
EP1675175B1 (en) | Wired circuit board | |
US20050095862A1 (en) | Package substrate manufactured using electrolytic leadless plating process, and method for manufacturing the same | |
JP5096855B2 (en) | Wiring board manufacturing method and wiring board | |
US20090095508A1 (en) | Printed circuit board and method for manufacturing the same | |
US8785789B2 (en) | Printed circuit board and method for manufacturing the same | |
CN109429442B (en) | Circuit board and manufacturing method thereof | |
JP5587139B2 (en) | Multilayer wiring board | |
US20150245485A1 (en) | Printed wiring board and method for manufacturing printed wiring board | |
JP2009094361A (en) | Cof board | |
CN108024442B (en) | Wired circuit board and method for manufacturing the same | |
KR20090037811A (en) | Wiring board | |
TWI599283B (en) | Printed circuit board and fabrication method thereof | |
US8853551B2 (en) | Wired circuit board and producing method thereof | |
US9974166B2 (en) | Circuit board and manufacturing method thereof | |
KR100771308B1 (en) | Fabricating method of rigid flexible printed circuit board | |
JP2005332906A (en) | Flexible printed wiring board and its manufacturing method | |
JP6863244B2 (en) | Electronic components and manufacturing methods for electronic components | |
WO2022176599A1 (en) | Method for manufacturing wiring board, and flexible printed wiring board | |
KR101924458B1 (en) | Manufacturing method of electronic chip embedded circuit board | |
KR100771310B1 (en) | Rigid flexible printed circuit board and fabricating method of the same | |
KR20120004088A (en) | Manufacturing method for pcb | |
US20150282315A1 (en) | Printed circuit board and method of manufacturing the same | |
JP2006049587A (en) | Printed wiring board and its manufacturing method | |
JP2005340864A (en) | Manufacturing method of semiconductor device |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
PB01 | Publication | ||
PB01 | Publication | ||
SE01 | Entry into force of request for substantive examination | ||
SE01 | Entry into force of request for substantive examination | ||
GR01 | Patent grant | ||
GR01 | Patent grant |