CN109411580B - Gallium nitride-based power device and preparation method thereof - Google Patents
Gallium nitride-based power device and preparation method thereof Download PDFInfo
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- H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
- H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
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- H01L33/0062—Processes for devices with an active region comprising only III-V compounds
- H01L33/0075—Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
Abstract
The invention provides a gallium nitride-based power device and a preparation method thereof, wherein the power device comprises a substrate, and a buffer layer, an electron providing layer, a light-emitting layer and a hole providing layer which are sequentially deposited on the substrate; the substrate comprises a sapphire substrate and a conical pattern substrate formed on the sapphire substrate; the thickness of the buffer layer is smaller than the distance from the top of the conical pattern substrate to the upper surface of the sapphire substrate; the electron providing layer comprises an intrinsic layer and a doped layer which are sequentially deposited on the buffer layer; the intrinsic layer includes a first intrinsic layer deposited in a longitudinal mode and a second intrinsic layer deposited in a lateral mode, and a sum of a thickness of the first intrinsic layer and a thickness of the buffer layer is equal to a distance from a top of the conical substrate to an upper surface of the sapphire substrate. The gallium nitride-based power device provided by the invention has the advantages of small stress, low dislocation density and high crystal quality.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a gallium nitride-based power device and a preparation method thereof.
Background
Gallium nitride is a direct band gap wide bandgap semiconductor material with a bandgap width of 3.4 eV. The gallium nitride material has stable chemical property, is insoluble in water, acid and alkali at room temperature, and has hard texture and high melting point. Blue and green LEDs and Laser Diodes (LDs) made of gallium nitride materials have already been industrially produced, and are expected to replace traditional incandescent lamps, fluorescent lamps and the like to become main lighting sources due to the advantages of small volume, long service life, high brightness, low energy consumption and the like.
At present, gallium nitride-based power devices are prepared by depositing gallium nitride materials on substrate materials mainly through a metal organic chemical vapor deposition process, the substrate has important influence on the polarity and polarization of gallium nitride, and chemical reactions and conditions required by high-quality gallium nitride epitaxial layers are related to the polarity of crystals. In many cases, the substrate determines the polarity, the magnitude and kind of stress (tensile or compressive), and the degree of polarization effect of the gallium nitride crystal. At present, gallium nitride is heteroepitaxially grown on a sapphire substrate, the crystallization quality of gallium nitride can directly affect various electrical parameters of devices, such as ESD (electrostatic discharge), reverse leakage and the like, and how to obtain high-quality gallium nitride crystals on the sapphire substrate is an urgent need of research and development personnel.
Disclosure of Invention
The invention aims to provide a gallium nitride-based power device and a preparation method thereof.
The technical problem to be solved by the invention is realized by adopting the following technical scheme:
a gallium nitride-based power device comprising a substrate and a buffer layer deposited on the substrate, an electron-providing layer deposited on the buffer layer, a light-emitting layer deposited on the electron-providing layer, a hole-providing layer deposited on the light-emitting layer; the substrate comprises a sapphire substrate and a conical pattern lining formed on the sapphire substrate, and the conical pattern lining is uniformly distributed on the sapphire substrate; the thickness of the buffer layer is smaller than the distance from the top of the conical pattern substrate to the upper surface of the sapphire substrate; the electron providing layer comprises an intrinsic layer and a doped layer which are sequentially deposited on the buffer layer; the intrinsic layer contains no doping atoms or contains doping atoms with low concentration, and the doped layer contains doping atoms with high concentration; the intrinsic layer includes a first intrinsic layer deposited in a longitudinal mode and a second intrinsic layer deposited in a lateral mode, and a sum of a thickness of the first intrinsic layer and a thickness of the buffer layer is equal to a distance from a top of the conical liner to an upper surface of the sapphire substrate.
Optionally, the intrinsic layer further comprises a transition layer interposed between the first intrinsic layer and the second intrinsic layer, the transition layer being deposited on the first intrinsic layer in a deposition mode interposed between a longitudinal mode and a lateral mode.
Optionally, the longitudinal mode and the transverse mode are controlled by pressure of the reaction chamber, and the pressure of the reaction chamber during deposition in the longitudinal mode is greater than the pressure of the reaction chamber during deposition in the transverse mode.
Optionally, a ratio of the thickness of the buffer layer to the thickness of the first intrinsic layer is 1: (50-70).
Optionally, the distance from the top of the conical patterned substrate to the upper surface of the sapphire substrate is 1500nm, the thickness of the buffer layer is 25nm, and the thickness of the first intrinsic layer is 1475 nm.
Optionally, the thickness ratio of the first intrinsic layer to the transition layer to the second intrinsic layer is 2:1 (3-5).
A preparation method of a gallium nitride-based power device comprises the following steps:
providing a substrate;
depositing a buffer layer, an electron providing layer, a light emitting layer and a hole providing layer on the substrate in sequence;
the substrate is a sapphire pattern substrate, and the sapphire pattern substrate comprises a sapphire substrate and a conical pattern substrate formed on the sapphire substrate;
the buffer layer is a low-temperature gallium nitride layer, and the thickness of the low-temperature gallium nitride layer is smaller than the distance from the top of the conical pattern substrate to the upper surface of the sapphire substrate;
the electron providing layer comprises an intrinsic layer and a doped layer which are sequentially deposited on the buffer layer; the intrinsic layer contains no doping atoms or contains doping atoms with low concentration, and the doped layer contains doping atoms with high concentration; the intrinsic layer includes a first intrinsic layer deposited in a longitudinal mode and a second intrinsic layer deposited in a lateral mode, and a sum of a thickness of the first intrinsic layer and a thickness of the buffer layer is equal to a distance from a top of the conical liner to an upper surface of the sapphire substrate.
Optionally, controlling the temperature to be 400-600 ℃ and the pressure to be 400-500 Torr, depositing a gallium nitride buffer layer on the sapphire substrate, and controlling the deposition time to ensure that the thickness of the buffer layer is smaller than the distance from the top of the conical graph substrate to the upper surface of the sapphire substrate;
controlling the temperature to be 800-1000 ℃ and the pressure to be 500-600 Torr, depositing a first intrinsic layer on the buffer layer, and controlling the deposition time to enable the sum of the thickness of the first intrinsic layer and the thickness of the buffer layer to be equal to the distance from the top of the conical figure substrate to the upper surface of the sapphire substrate;
depositing a second intrinsic layer on the first intrinsic layer at a temperature of 1000-1200 ℃ and a pressure of 100-200 Torr;
controlling the temperature to be 1000-1200 ℃ and the pressure to be 100-200 Torr, and depositing a doping layer on the second intrinsic layer;
controlling the temperature to be 750-850 ℃ and the pressure to be 100-300 Torr, and depositing a light emitting well layer on the doping layer; controlling the temperature to be 850-950 ℃ and the pressure to be 100-300 Torr, and depositing a light-emitting barrier layer on the light-emitting well layer; the light emitting well layer and the light emitting barrier layer are alternately laminated to form a light emitting layer;
the temperature is controlled to be 750-1080 ℃ and the pressure is 200-300 Torr, and a hole providing layer is deposited on the light-emitting layer.
Optionally, the intrinsic layer further includes a transition layer, the transition layer is interposed between the first intrinsic layer and the second intrinsic layer, and the transition layer is deposited on the first intrinsic layer by controlling temperature and pressure to gradually change from the temperature and pressure for depositing the first intrinsic layer to the temperature and pressure for depositing the second intrinsic layer.
Optionally, the method further comprises a step of pretreating the sapphire substrate before depositing the buffer layer on the sapphire substrate, wherein the pretreatment is carried out by annealing the sapphire substrate in a hydrogen atmosphere for 6-10 minutes at a controlled temperature of 1000-1200 ℃ and a pressure of 400-500 Torr.
The invention has the beneficial effects that: the method comprises the steps of depositing a buffer layer with the thickness smaller than the height of a conical figure substrate on a sapphire substrate, depositing a first intrinsic layer on the buffer layer in a longitudinal mode, wherein the sum of the thickness of the first intrinsic layer and the thickness of the buffer layer is equal to the distance between the top of the conical figure substrate and the upper surface of the sapphire substrate, reducing the interface free energy generated by the sapphire substrate, the conical figure substrate and a gallium nitride contact surface, reducing the stress and dislocation density generated by heteroepitaxy and the use of the figure substrate, depositing a transition layer by using a deposition mode between the longitudinal deposition mode and a transverse deposition mode, fusing the first intrinsic layer with a second intrinsic layer by using the transition layer, reducing the internal stress and dislocation generated by two different deposition modes, and improving the quality of gallium nitride crystals.
Drawings
Fig. 1 is a schematic structural diagram of a gallium nitride-based power device provided by the present invention;
FIG. 2 is a schematic structural diagram of a sapphire patterned substrate and a buffer layer and an electron-providing layer deposited thereon according to the present invention;
FIG. 3 is a schematic view of a light-emitting layer structure of a GaN-based power device provided by the invention;
FIG. 4 is a flow chart of a method for fabricating a GaN-based power device according to the present invention;
FIG. 5 is a flowchart illustrating a specific method for fabricating a GaN-based power device according to the present invention;
FIG. 6 is a schematic diagram showing the reaction chamber pressure as a function of time during deposition of the first and second intrinsic layers according to the present invention;
FIG. 7 is a schematic diagram showing the reaction chamber pressure as a function of time during deposition of the first intrinsic layer, the transition layer, and the second intrinsic layer according to the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, embodiments of the present invention will be described in detail with reference to the accompanying drawings.
Example one
According to an embodiment of the present invention, there is provided a gallium nitride-based power device, referring to fig. 1, the power device includes a substrate 1, and a buffer layer 2 deposited on the substrate 1, an electron providing layer 3 deposited on the buffer layer 2, a light emitting layer 4 deposited on the electron providing layer 3, and a hole providing layer 5 deposited on the light emitting layer 4.
Referring to fig. 2, in the present embodiment, substrate 1 is a sapphire pattern substrate, and specifically, the sapphire pattern substrate includes sapphire substrate 11 and conical liners 12 formed on sapphire substrate 11, conical liners 12 are uniformly distributed on sapphire substrate 11, and conical liners 12 have a height, which is the distance from the top of conical liners 12 to the upper surface of sapphire substrate 11.
Growing a mask for dry etching on the sapphire substrate 11, etching a conical patterned liner 12 on the mask by using a standard photoetching process, etching the sapphire substrate 11 by using an ICP (inductively coupled plasma) etching technology, removing the mask, and growing a gallium nitride material on the mask to change the longitudinal epitaxy of the gallium nitride material into the transverse epitaxy. On one hand, the dislocation density of the gallium nitride epitaxial material can be effectively reduced, so that the non-radiative recombination of an active region is reduced, the reverse leakage is reduced, and the service life of the device is prolonged; on the other hand, light emitted from the active region is scattered for multiple times through the interface of the gallium nitride and the sapphire substrate, the emergent angle of total reflection light is changed, the probability of the light of the flip-chip device being emergent from the sapphire substrate is increased, and therefore the light extraction efficiency is improved.
In this embodiment, the buffer layer 2 is a low-temperature gallium nitride layer, and the thickness of the low-temperature gallium nitride layer is smaller than the distance from the top of the conical patterned liner 12 to the upper surface of the sapphire substrate 11.
Due to the large lattice and thermal mismatch between the sapphire substrate and the gallium nitride material, there is a large stress and a high dislocation density in the gallium nitride material. In order to reduce the interface free energy between the gallium nitride and the substrate, a thin low-temperature buffer layer is firstly deposited on the substrate, and the physical property of the low-temperature buffer layer is between that of the substrate and the gallium nitride, so that the interface free energy can be effectively reduced. By utilizing the low-temperature buffer layer, high-quality gallium nitride single crystals are obtained by heteroepitaxy, so that the dislocation density is reduced by 3-4 orders of magnitude.
In the present embodiment, the electron supply layer 3 forms electrons by replacing low valence atoms with high valence atoms, for example, four valence atoms may be used to form electrons by replacing three valence atoms with four valence atoms, and specifically, gallium atoms are replaced with silicon atoms.
In this embodiment, the electron supply layer 3 includes an intrinsic layer 31, a doped layer 32; the intrinsic layer 31 contains no doping atoms or contains doping atoms at a low concentration, and the doped layer 32 contains doping atoms at a high concentration; the intrinsic layer 31 includes a first intrinsic layer 31a deposited in a longitudinal mode, a transition layer 31b deposited between the longitudinal deposition mode and the lateral deposition mode, and a second intrinsic layer 31c deposited in a lateral mode, and the sum of the thickness of the first intrinsic layer 31a and the thickness of the buffer layer 2 is equal to the distance from the top of the conical patterned substrate 12 to the upper surface of the sapphire substrate 11.
In this embodiment, the longitudinal deposition mode and the transverse deposition mode are mainly realized by the pressure of the reaction chamber, and in general, the gallium nitride is mainly deposited in the longitudinal mode when the pressure of the reaction chamber is higher, and the gallium nitride is mainly deposited in the transverse mode when the pressure of the reaction chamber is lower.
By depositing a buffer layer 2 with a thickness smaller than the height of the conical figure liner 12 on the sapphire substrate, and then depositing a first intrinsic layer 31a on the buffer layer 2 in a longitudinal mode, wherein the sum of the thickness of the first intrinsic layer 31a and the thickness of the buffer layer 2 is equal to the distance between the top of the conical figure liner 12 and the upper surface of the sapphire substrate 11, the interface free energy generated by the sapphire substrate 11, the conical figure liner 12 and the gallium nitride contact surface is reduced, the stress and dislocation density generated by heteroepitaxy and the use of a figure substrate are reduced, if the sum of the thickness of the first intrinsic layer 31a and the thickness of the buffer layer 2 is smaller than or larger than the distance between the top of the conical figure liner 12 and the upper surface of the sapphire substrate 11, when gallium nitride is subsequently deposited, a larger interface free energy is generated due to the surface unevenness generated by the first intrinsic layer 31a deposited in the longitudinal mode and the top of the conical, the stress and dislocation density are increased, and the surface of the obtained device is uneven; because the whole electron providing layer 3 is thick (about 1.0-6.0 um, 2/5-4/5 after the whole power device) and has a fast deposition rate (about 2.5-5.0 um/h), the transition layer 31b is deposited by using a deposition mode between a longitudinal deposition mode and a transverse deposition mode, the first intrinsic layer 31a and the second intrinsic layer 31c are fused by the transition layer 31b, the internal stress and dislocation generated by two different deposition modes are reduced, and the quality of the gallium nitride crystal is improved.
Experiments prove that when the thickness ratio of the buffer layer to the first intrinsic layer is 1: (50-70), XRD test shows that the half width of the 102 plane of the 002 plane is the smallest, namely the gallium nitride crystal quality is the best. In one embodiment, the distance from the top of the conical patterned substrate to the upper surface of the sapphire substrate is 1500nm, the thickness of the buffer layer is 25nm, and the thickness of the first intrinsic layer is 1475 nm.
Referring to fig. 3, in the present embodiment, the light emitting layer 4 includes a plurality of light emitting well layers 41 and a plurality of light emitting barrier layers 42 alternately deposited on the electron providing layer 3, the light emitting well layers 41 and the light emitting barrier layers 42 are alternately stacked, the light emitting well layers 41 are indium gallium nitride layers, the light emitting barrier layers 42 are gallium nitride layers, the number of the light emitting well layers 41 is equal to the number of the light emitting barrier layers 42, the first light emitting well layer 41 is deposited on the electron providing layer 3, and the hole providing layer 5 is deposited on the last light emitting barrier layer 42.
In the present embodiment, the hole providing layer 5 forms a hole by substituting a lower valence atom for a higher valence atom, for example, a divalent atom for a trivalent atom, and specifically, a magnesium atom for a gallium atom.
Example two
An embodiment of the present invention provides a method for manufacturing a gallium nitride-based power device, which is suitable for manufacturing the gallium nitride-based power device provided in the embodiment one, and referring to fig. 4, the method includes:
step 101: a substrate is provided.
Step 102: and depositing a buffer layer, an electron providing layer, a light emitting layer and a hole providing layer on the substrate in sequence.
In this embodiment, the substrate is a sapphire pattern substrate, and the sapphire pattern substrate includes a sapphire substrate and a conical pattern substrate formed on the sapphire substrate.
In this embodiment, the buffer layer is a low-temperature gallium nitride layer, and the thickness of the low-temperature gallium nitride layer is smaller than the distance from the top of the conical-shaped figure liner to the upper surface of the sapphire substrate.
In this embodiment, the electron providing layer includes an intrinsic layer and a doped layer sequentially deposited on the buffer layer; the intrinsic layer contains no doping atoms or contains doping atoms with low concentration, and the doped layer contains doping atoms with high concentration; the intrinsic layer includes a first intrinsic layer deposited in a longitudinal mode and a second intrinsic layer deposited in a lateral mode, and a sum of a thickness of the first intrinsic layer and a thickness of the buffer layer is equal to a distance from a top of the conical liner to an upper surface of the sapphire substrate.
EXAMPLE III
The third embodiment of the invention provides a preparation method of a gallium nitride-based power device, which is a specific implementation of the second embodiment. Referring to fig. 5, the manufacturing method includes:
step 201: the sapphire substrate is pretreated.
Optionally, the pretreatment is to anneal the sapphire substrate in a hydrogen atmosphere at a controlled temperature of 1000-1200 ℃ and a pressure of 400-500 Torr for 6-10 minutes.
It is to be understood that step 201 may function to clean the surface of the sapphire substrate while orienting the sapphire crystals.
In this embodiment, controlling both the temperature and the pressure refers to controlling the temperature and the pressure in the reaction chamber during the deposition process, and will not be described in detail below.
In this embodiment, a sapphire substrate employs [0001] orientation sapphire.
Step 202: depositing a buffer layer on the sapphire substrate.
Optionally, the temperature is controlled to be 400-600 ℃, the pressure is controlled to be 400-500 Torr, the gallium nitride buffer layer is deposited on the sapphire substrate, and the thickness of the buffer layer is controlled to be smaller than the distance from the top of the conical graph substrate to the upper surface of the sapphire substrate by controlling the deposition time.
Optionally, after step 202, the preparation method may further include:
and controlling the temperature to be 1000-1200 ℃, the pressure to be 400-500 Torr and the duration to be 5-10 minutes, and carrying out in-situ annealing treatment on the gallium nitride transition layer.
Step 203: an electron-providing layer is deposited on the buffer layer.
Optionally, the temperature is controlled to be 800-1000 ℃, the pressure is controlled to be 500-600 Torr, the first intrinsic layer is deposited on the buffer layer, and the sum of the thickness of the first intrinsic layer and the thickness of the buffer layer is controlled to be equal to the distance between the top of the conical graph substrate and the upper surface of the sapphire substrate.
Optionally, a second intrinsic layer is deposited on the first intrinsic layer at a controlled temperature of 1000-1200 deg.C and a pressure of 100-200 Torr.
The pressure in the reaction chamber with time when the first and second intrinsic layers are deposited is shown in fig. 6.
In another embodiment, after the deposition of the first intrinsic layer, a step of depositing a transition layer is further included, specifically, the temperature and the pressure are controlled to be gradually changed (linearly gradually changed) from the temperature and the pressure for depositing the first intrinsic layer to the temperature and the pressure for depositing the second intrinsic layer, respectively, a transition layer is deposited on the first intrinsic layer, and the pressure in the reaction chamber changes with time as shown in fig. 7.
Optionally, a doped layer is deposited on the second intrinsic layer at a temperature of 1000-1200 ℃ and a pressure of 100-200 Torr.
Specifically, the doped layer is formed by doping silicon in gallium nitride.
Step 204: depositing a light emitting layer on the electron providing layer.
In this embodiment, the light emitting layer includes a plurality of light emitting well layers and a plurality of light emitting barrier layers alternately deposited on the electron providing layer, the light emitting well layers and the light emitting barrier layers are alternately stacked, the light emitting well layers are indium gallium nitride layers, the light emitting barrier layers are gallium nitride layers, the number of the light emitting well layers is equal to the number of the light emitting barrier layers, the first light emitting well layer is deposited on the electron providing layer, and the hole providing layer is deposited on the last light emitting barrier layer.
Specifically, the deposition method of the single light emitting well layer may include:
and depositing a light emitting well layer at the temperature of 750-850 ℃ and the pressure of 100-300 Torr.
The method for depositing the single light-emitting barrier layer comprises the following steps:
controlling the temperature to be 850-950 ℃ and the pressure to be 100-300 Torr, and depositing a light-emitting barrier layer.
Step 205: depositing a hole-providing layer on the light-emitting layer.
Optionally, the temperature is controlled to be 750-1080 ℃ and the pressure is controlled to be 200-300 Torr, and a hole providing layer is deposited on the light-emitting layer.
Specifically, the hole supply layer is formed by doping gallium nitride with magnesium.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (9)
1. A gallium nitride-based power device, comprising a substrate and a buffer layer deposited on the substrate, an electron-providing layer deposited on the buffer layer, a light-emitting layer deposited on the electron-providing layer, a hole-providing layer deposited on the light-emitting layer; the substrate comprises a sapphire substrate and a conical pattern lining formed on the sapphire substrate, and the conical pattern lining is uniformly distributed on the sapphire substrate; the thickness of the buffer layer is smaller than the distance from the top of the conical pattern substrate to the upper surface of the sapphire substrate; the electron providing layer comprises an intrinsic layer and a doped layer which are sequentially deposited on the buffer layer; the intrinsic layer contains no doping atoms or contains doping atoms with low concentration, and the doped layer contains doping atoms with high concentration; the intrinsic layer includes a first intrinsic layer deposited in a longitudinal mode, and a second intrinsic layer deposited in a lateral mode, a sum of a thickness of the first intrinsic layer and a thickness of the buffer layer being equal to a distance from a top of the conical liner to an upper surface of the sapphire substrate, the intrinsic layer further including a transition layer interposed between the first intrinsic layer and the second intrinsic layer, the transition layer being deposited on the first intrinsic layer in a deposition mode interposed between the longitudinal mode and the lateral mode.
2. The gallium nitride-based power device according to claim 1, wherein the longitudinal mode and the transverse mode are controlled by a pressure of the reaction chamber, and the pressure of the reaction chamber during the longitudinal mode deposition is greater than the pressure of the reaction chamber during the transverse mode deposition.
3. The gallium nitride-based power device of claim 2, wherein a ratio of the thickness of the buffer layer to the first intrinsic layer is 1: (50-70).
4. The gallium nitride-based power device of claim 3, wherein the conical patterned substrate has a top spaced from a top surface of the sapphire substrate by a distance of 1500nm, the buffer layer has a thickness of 25nm, and the first intrinsic layer has a thickness of 1475 nm.
5. The gallium nitride-based power device according to claim 3, wherein the thickness ratio of the first intrinsic layer to the transition layer to the second intrinsic layer is 2:1 (3-5).
6. A preparation method of a gallium nitride-based power device is characterized by comprising the following steps:
providing a substrate;
depositing a buffer layer, an electron providing layer, a light emitting layer and a hole providing layer on the substrate in sequence;
the substrate is a sapphire pattern substrate, and the sapphire pattern substrate comprises a sapphire substrate and a conical pattern substrate formed on the sapphire substrate;
the buffer layer is a low-temperature gallium nitride layer, and the thickness of the low-temperature gallium nitride layer is smaller than the distance from the top of the conical pattern substrate to the upper surface of the sapphire substrate;
the electron providing layer comprises an intrinsic layer and a doped layer which are sequentially deposited on the buffer layer; the intrinsic layer contains no doping atoms or contains doping atoms with low concentration, and the doped layer contains doping atoms with high concentration; the intrinsic layer includes a first intrinsic layer deposited in a longitudinal mode and a second intrinsic layer deposited in a lateral mode, and a sum of a thickness of the first intrinsic layer and a thickness of the buffer layer is equal to a distance from a top of the conical liner to an upper surface of the sapphire substrate.
7. The method for manufacturing a gallium nitride-based power device according to claim 6, wherein:
controlling the temperature to be 400-600 ℃ and the pressure to be 400-500 Torr, depositing a gallium nitride buffer layer on the sapphire substrate, and controlling the deposition time to ensure that the thickness of the buffer layer is smaller than the distance from the top of the conical graph substrate to the upper surface of the sapphire substrate;
controlling the temperature to be 800-1000 ℃ and the pressure to be 500-600 Torr, depositing a first intrinsic layer on the buffer layer, and controlling the deposition time to enable the sum of the thickness of the first intrinsic layer and the thickness of the buffer layer to be equal to the distance from the top of the conical figure substrate to the upper surface of the sapphire substrate;
depositing a second intrinsic layer on the first intrinsic layer at a temperature of 1000-1200 ℃ and a pressure of 100-200 Torr;
controlling the temperature to be 1000-1200 ℃ and the pressure to be 100-200 Torr, and depositing a doping layer on the second intrinsic layer;
controlling the temperature to be 750-850 ℃ and the pressure to be 100-300 Torr, and depositing a light emitting well layer on the doping layer; controlling the temperature to be 850-950 ℃ and the pressure to be 100-300 Torr, and depositing a light-emitting barrier layer on the light-emitting well layer; the light emitting well layer and the light emitting barrier layer are alternately laminated to form a light emitting layer;
the temperature is controlled to be 750-1080 ℃ and the pressure is 200-300 Torr, and a hole providing layer is deposited on the light-emitting layer.
8. The method of claim 7, wherein the intrinsic layer further comprises a transition layer interposed between the first intrinsic layer and the second intrinsic layer, and the transition layer is deposited on the first intrinsic layer by controlling temperature and pressure to gradually change from the temperature and pressure for depositing the first intrinsic layer to the temperature and pressure for depositing the second intrinsic layer.
9. The method for preparing a gallium nitride-based power device according to claim 8, further comprising a step of pre-treating the sapphire substrate before depositing the buffer layer on the sapphire substrate, wherein the pre-treating is carried out by annealing the sapphire substrate in a hydrogen atmosphere at a controlled temperature of 1000-1200 ℃ and a pressure of 400-500 Torr for 6-10 minutes.
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| CN109411580A (en) | 2019-03-01 |
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