CN109410836A - Oled像素驱动电路及显示面板 - Google Patents
Oled像素驱动电路及显示面板 Download PDFInfo
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Abstract
一种OLED像素驱动电路及显示面板,所述OLED像素驱动电路由一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管构成一7T1C型式的像素驱动电路,所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端,所述第七晶体管的控制端与第二端耦接,所述第四晶体管的控制端与第二端耦接,所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。
Description
技术领域
本发明是有关于一种显示技术,特别是有关于一种OLED像素驱动电路及显示面板。
背景技术
有机发光二极管(Organic Light Emitting Display,OLED)显示面板具有自发光、驱动电压低、发光效率高、响应时间短及可柔性显示等优点,已成为最有发展潜力的显示面板。
OLED显示面板依驱动方式,可分为被动矩阵OLED(Passive Matrix OLED,PMOLED)及主动矩阵OLED(Active Matrix OLED,AMOLED)两种,其中,AMOLED显示面板的耗电量明显小于PMOLED显示面板,在AMOLED显示面板的像素阵列中,每一像素都有一电容,用于存储数据,让每一像素能维持在发光状态。其中,现有的AMOLED显示面板的像素驱动电路通常以多个晶体管搭配一个电容器驱动一有机发光二极管。
如图1及图2所示,现有的7T1C像素驱动电路包括晶体管T1~T7、电容器C1及有机发光二极管D,现有的7T1C像素驱动电路利用Scan[n-1]、Scan[n]、XScan[n]、EM、Vi及Vdd等6个控制信号(如图2所示)进行运作,其工作阶段通常可分为准备阶段(t1)、补偿阶段(t2)及显示阶段(t3)。其中,以WQHD解析度(1440*2960 18.5:9)的面板为例,栅极扫描频率为60Hz,也就是栅极驱动时间在t1或t2阶段为1/60/(1440+Tblank)约为6μs,但t3=1/60-t1-t2,即t3阶段的栅极驱动时间约为16.7毫秒(ms),但是,这段时间对在t3阶段打开的晶体管(如T1、T5、T6)而言是非常长的,将会影响OLED显示面板的显示效果。
因此,现有技术存在缺陷,急需改进。
发明内容
有鉴于此,本发明提供一种OLED像素驱动电路,以解决现有技术所存在显示效果受到显示阶段的栅极驱动时间影响的问题。
本发明的一个方面在于提供一种OLED像素驱动电路,其包括:一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管,所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端;其中,所述第一晶体管的控制端耦接所述电容器的一端、所述第三晶体管的第一端及所述第四晶体管的第一端,所述第一晶体管的第一端耦接所述第二晶体管的第二端及所述第五晶体管的第一端,所述第一晶体管的第二端耦接第三晶体管的第二端及第六晶体管的第一端,所述第二晶体管的控制端耦接所述第三晶体管的控制端及一本级扫描端,所述第二晶体管的第一端耦接一数据端,所述第四晶体管的控制端耦接所述第四晶体管的第二端及一前级扫描端,所述第五晶体管的控制端耦接所述第六晶体管的控制端及一发光脉冲端,所述第五晶体管的第二端耦接所述电容器的另一端及一正电端,所述第六晶体管的第二端耦接所述第七晶体管的第一端及所述有机发光二极管的一阳极端,所述第七晶体管的控制端耦接所述第七晶体管的第二端及所述本级扫描端,所述有机发光二极管的一阴极端接地。
在一些实施例中,所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。
在一些实施例中,所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为P型薄膜晶体管。
在一些实施例中,所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种。
本发明的另一个方面在于提供一种显示面板,其包括:数个如上所述的OLED像素驱动电路
与现有技术相比较,本发明的OLED像素驱动电路及显示面板,通过所述第四晶体管的控制端与第二端短接,所述第七晶体管的控制端与第二端短接,所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。从而,使所述电容器充电时间可大幅缩短,且所述第一晶体管的栅级驱动能力更强。
附图说明
图1是一现有的7T1C像素驱动电路的示意图。
图2是图1中的电路的控制信号时序示意图。
图3是本发明一实施例的OLED像素驱动电路的示意图。
具体实施方式
以下各实施例的说明是参考附加的图式,用以例示本发明可用以实施的特定实施例。再者,本发明所提到的方向用语,例如上、下、顶、底、前、后、左、右、内、外、侧面、周围、中央、水平、横向、垂直、纵向、轴向、径向、最上层或最下层等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。
请参照图3所示,本发明一实施例的OLED像素驱动电路可以用于一AMOLED像素驱动配置(configuration),所述OLED像素驱动电路包括:一第一晶体管T1、一第二晶体管T2、一第三晶体管T3、一第四晶体管T4、一第五晶体管T5、一第六晶体管T6、一第七晶体管T7、一电容器C1及一有机发光二极管D,所述第一晶体管T1、所述第二晶体管T2、所述第三晶体管T3、所述第四晶体管T4、所述第五晶体管T5、所述第六晶体管T6及所述第七晶体管T7分别具有一控制端、一第一端及一第二端,例如:所述控制端可为薄膜晶体管的栅极,所述第一端、第二端可为薄膜晶体管的源极或漏极中的一个。
其中,所述第一晶体管T1的控制端耦接所述电容器C1的一端、所述第三晶体管T3的第一端及所述第四晶体管T4的第一端,所述第一晶体管T1的第一端耦接所述第二晶体管T2的第二端及所述第五晶体管T5的第一端,所述第一晶体管T1的第二端耦接第三晶体管T3的第二端及第六晶体管T6的第一端,所述第二晶体管T2的控制端耦接所述第三晶体管T3的控制端及一本级(第n级)扫描端,例如n可为一正整数,用以代表级联的多级信号中的一个,所述本级(第n级)扫描端用以输入Scan[n]信号,所述第二晶体管T2的第一端耦接一数据端,所述数据端用以输入Vdata信号,所述第四晶体管T4的控制端耦接所述第四晶体管T4的第二端及一前级(第n-1级)扫描端,所述前级(第n-1级)扫描端用以输入Scan[n-1]信号,所述第五晶体管T5的控制端耦接所述第六晶体管T6的控制端及一发光脉冲端,所述发光脉冲端用以输入EM信号,所述第五晶体管T5的第二端耦接所述电容器C1的另一端及一正电端,所述正电端用以输入Vdd信号,所述第六晶体管T6的第二端耦接所述第七晶体管T7的第一端及所述有机发光二极管D的一阳极端,所述第七晶体管T7的控制端耦接所述第七晶体管T7的第二端及所述第n级扫描端,所述有机发光二极管D的一阴极端接地。具体地,所述第四晶体管T4的第二端与所述第七晶体管T7的第二端互不连接。
可被理解的是,所述有机发光二极管D依实际需求可以被配置成发出红、绿、蓝光;所述Scan[n-1]信号、Scan[n]信号为来自GOA(Gate Driver on Array)的第n-1级、第n级的扫描信号;所述EM信号为用于控制所述有机发光二极管D发光的发光脉冲信号;所述Vdd信号为一直流恒压正电信号,可用于作为OLED像素驱动电路的工作电源,其特征是本领域技术人员可以理解的,不再赘述于此。
在一些实施例中,所述第一晶体管T1、所述第二晶体管T2、所述第三晶体管T3、所述第四晶体管T4、所述第五晶体管T5、所述第六晶体管T6及所述第七晶体管T7为P型薄膜晶体管,例如:低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种,但不以此为限。
请再参阅图3,本发明的OLED像素驱动电路属于一种新颖的7T1C像素驱动电路,与现有的7T1C像素驱动电路相较,现有的7T1C像素驱动电路需要Scan[n-1]、Scan[n]、XScan[n]、EM、Vi及Vdd等6个控制信号(如图2所示),本发明的OLED像素驱动电路只需要Scan[n-1]、Scan[n]、EM及Vdd等4个控制信号,无需现有技术所需的XScan[n]及Vi信号,即可进行准备阶段(t1)、补偿阶段(t2)及显示阶段(t3)等工作阶段(如图2所示),本发明的OLED像素驱动电路的运作方式举例说明如下。
举例而言,如图3所示,在t1阶段,Scan[n-1]信号为低电位,所述第四晶体管T4打开,将a点电位变成低电位,所述电容器C1进行充电。在t2阶段,Scan[n]信号为低电位,晶体管T2、T3、T7打开,晶体管T1的栅漏短接(short),在a点电位|Va|>|Vth|时,即晶体管T1如同二极管,晶体管T1打开,直到A点电位变成Vdata-|Vth|而截止;另外,晶体管T7打开,有机发光二极管D复位。在t3阶段,EM信号为低电位,所述第五晶体管T5及第六晶体管T6打开,所述第一晶体管T1的Vgs=Vdd-(Vdata-|Vth|),此时,经过所述第一晶体管T1的电流Ids=(1/2)·K·[Vdd-(Vdata-|Vth|)-|Vth|]^2=(1/2)·K·(Vdd-Vdata)^2,K=Cox·μ·W/L,电流流过所述有机发光二极管D而发光,例如:红、蓝、绿光等。具体地,来自GOA电路的Scan[n]信号的低电位约为-9伏特(V)。
本发明的另一方面还可包括一种显示面板,所述显示面板可包括数个如上所述的OLED像素驱动电路。
与现有技术相较,本发明的OLED像素驱动电路及显示面板,通过所述第四晶体管T4的控制端(如薄膜电晶体的栅极)与第二端(如薄膜电晶体的源极)短接,所述第七晶体管T7的控制端(如薄膜电晶体的栅极)与第二端(如薄膜电晶体的源极)短接,所述第四晶体管T4的第二端与所述第七晶体管T7的第二端互不连接。从而,使所述电容器C1充电时间可大幅缩短,且所述第一晶体管T1的栅级驱动能力更强。
本发明已由上述相关实施例加以描述,然而上述实施例仅为实施本发明的范例。必需指出的是,已公开的实施例并未限制本发明的范围。相反地,包含于权利要求书的精神及范围的修改及均等设置均包括于本发明的范围内。
Claims (8)
1.一种OLED像素驱动电路,其特征在于:包括:
一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管,所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端;
其中,所述第一晶体管的控制端耦接所述电容器的一端、所述第三晶体管的第一端及所述第四晶体管的第一端,所述第一晶体管的第一端耦接所述第二晶体管的第二端及所述第五晶体管的第一端,所述第一晶体管的第二端耦接第三晶体管的第二端及第六晶体管的第一端,所述第二晶体管的控制端耦接所述第三晶体管的控制端及一本级扫描端,所述第二晶体管的第一端耦接一数据端,所述第四晶体管的控制端耦接所述第四晶体管的第二端及一前级扫描端,所述第五晶体管的控制端耦接所述第六晶体管的控制端及一发光脉冲端,所述第五晶体管的第二端耦接所述电容器的另一端及一正电端,所述第六晶体管的第二端耦接所述第七晶体管的第一端及所述有机发光二极管的一阳极端,所述第七晶体管的控制端耦接所述第七晶体管的第二端及所述本级扫描端,所述有机发光二极管的一阴极端接地。
2.如权利要求1所述的OLED像素驱动电路,其特征在于:所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。
3.如权利要求1所述的OLED像素驱动电路,其特征在于:所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为P型薄膜晶体管。
4.如权利要求3所述的OLED像素驱动电路,其特征在于:所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种。
5.一种显示面板,其特征在于:包括:数个OLED像素驱动电路,每个OLED像素驱动电路包括:
一第一晶体管、一第二晶体管、一第三晶体管、一第四晶体管、一第五晶体管、一第六晶体管、一第七晶体管、一电容器及一有机发光二极管,所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管分别具有一控制端、一第一端及一第二端;
其中,所述第一晶体管的控制端耦接所述电容器的一端、所述第三晶体管的第一端及所述第四晶体管的第一端,所述第一晶体管的第一端耦接所述第二晶体管的第二端及所述第五晶体管的第一端,所述第一晶体管的第二端耦接第三晶体管的第二端及第六晶体管的第一端,所述第二晶体管的控制端耦接所述第三晶体管的控制端及一本级扫描端,所述第二晶体管的第一端耦接一数据端,所述第四晶体管的控制端耦接所述第四晶体管的第二端及一前级扫描端,所述第五晶体管的控制端耦接所述第六晶体管的控制端及一发光脉冲端,所述第五晶体管的第二端耦接所述电容器的另一端及一正电端,所述第六晶体管的第二端耦接所述第七晶体管的第一端及所述有机发光二极管的一阳极端,所述第七晶体管的控制端耦接所述第七晶体管的第二端及所述本级扫描端,所述有机发光二极管的一阴极端接地。
6.如权利要求5所述的显示面板,其特征在于:所述第四晶体管的第二端与所述第七晶体管的第二端互不连接。
7.如权利要求5所述的显示面板,其特征在于:所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为P型薄膜晶体管。
8.如权利要求7所述的显示面板,其特征在于:所述第一晶体管、所述第二晶体管、所述第三晶体管、所述第四晶体管、所述第五晶体管、所述第六晶体管及所述第七晶体管为低温多晶硅薄膜晶体管、氧化物半导体薄膜晶体管或非晶硅薄膜晶体管中的一种。
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