CN109407436B - 阵列基板 - Google Patents

阵列基板 Download PDF

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CN109407436B
CN109407436B CN201811505975.4A CN201811505975A CN109407436B CN 109407436 B CN109407436 B CN 109407436B CN 201811505975 A CN201811505975 A CN 201811505975A CN 109407436 B CN109407436 B CN 109407436B
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fan
electrically connected
lines
metal layer
display area
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CN109407436A (zh
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冯校亮
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Priority to US16/343,778 priority patent/US11264407B2/en
Priority to PCT/CN2018/122899 priority patent/WO2020118759A1/zh
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    • G02F1/13629—Multilayer wirings
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    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Abstract

本发明提供一种阵列基板。该阵列基板包括：基板、多条扇出走线及多个邦定端子；基板包括显示区及包围显示区的非显示区，多条扇出走线及多个邦定端子均设于非显示区中，且多个邦定端子间隔排列，多条扇出走线的第一端分别电性连接多个邦定端子，多条扇出走线的第二端均电性连接显示区；多条扇出走线包括多条第一扇出走线及多条第二扇出走线，多条第一扇出走线位于第一金属层，多条第二扇出走线位于第二金属层，第一金属层与第二金属层之间具有绝缘层，多条第一扇出走线与多条第二扇出走线部分重叠，通过将扇出走线分散布置到第一金属层和第二金属层中，能够减少扇出走线的布线面积，降低显示面板的边框宽度，实现窄边框显示。

Description

阵列基板
技术领域
本发明涉及显示技术领域，尤其涉及一种阵列基板。
背景技术
随着显示技术的发展，液晶显示器(Liquid Crystal Display，LCD)等平面显示装置因具有高画质、省电、机身薄及应用范围广等优点，而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
现有市场上的液晶显示装置大部分为背光型液晶显示器，其包括液晶显示面板及背光模组(backlight module)。液晶显示面板的工作原理是在两片平行的玻璃基板当中放置液晶分子，两片玻璃基板中间有许多垂直和水平的细小电线，通过通电与否来控制液晶分子改变方向，将背光模组的光线折射出来产生画面。
现有的液晶显示面板一般由彩膜基板(CF，Color Filter)、阵列管基板(TFT，ThinFilm Transistor)、夹于彩膜基板与阵列基板之间的液晶(LC，Liquid Crystal)及密封胶框(Sealant)组成。其中，现有的阵列基板的结构如图1所示，其包括基板10、多条扫描线20、多条数据线30、多条扇出走线40及多个邦定端子50，所述基板10包括显示区110及包围所述显示区110的非显示区120，所述多条扫描线20在所述显示区110内沿竖直方向间隔排列且沿水平方向延伸，所述多条数据线30在所述显示区110内水平方向间隔排列且沿竖直方向延伸，所述多条扇出走线40及多个邦定端子50位于所述非显示区120内，且所述多个邦定端子50位于所述显示区110的上侧，奇数行的扫描线20通过位于显示区左侧的扇出走线40与所述邦定端子50电性连接，偶数行的扫描线20通过位于显示区右侧的扇出走线40与邦定端子50，数据线30通过位于显示区110上侧的扇出走线40与邦定端子50电性连接，该结构通过将与扫描线20电性连接的扇出走线40分布到显示区110的左右两侧，该阵列基板的所有扇出走线40位于同一金属线，需要占用大量的布线空间，不利于显示面板窄边框的实现。
发明内容
本发明的目的在于提供一种阵列基板，能够显著减小显示面板的边框大小，提升产品品质。
为实现上述目的，本发明提供了一种阵列基板，包括：基板、多条扇出走线及多个邦定端子；
所述基板包括显示区及包围显示区的非显示区，所述多条扇出走线及多个邦定端子均设于所述非显示区中，且多个邦定端子间隔排列，所述多条扇出走线的第一端分别电性连接所述多个邦定端子，所述多条扇出走线的第二端均电性连接所述显示区；
所述多条扇出走线包括多条第一扇出走线及多条第二扇出走线，所述多条第一扇出走线位于第一金属层，所述多条第二扇出走线位于第二金属层，所述第一金属层与第二金属层之间具有绝缘层，所述多条第一扇出走线与所述多条第二扇出走线部分重叠。
所述显示区内设有平行间隔排列的多条数据线及平行间隔排列且与所述多条数据线交叉的多条扫描线，每一条数据线均对应通过一条扇出走线电性连接一个对应的邦定端子，每一条扫描线均对应的通过一条扇出走线电性连接一个对应的邦定端子；
所述多条扫描线包括多条第一扫描线和多条第二扫描线，所述多条第一扫描线与多条第二扫描线交替排列。
对应每相邻的两条数据线分别设置一条第一扇出走线和一与该第一扇出走线部分重叠的第二扇出走线，该相邻的两条数据线中的一条通过第一扇出走线电性连接其对应的邦定端子，另一条数据线通过第二扇出走线电性连接其对应的邦定端子。
对应每相邻的两条第一扫描线分别设置一条第一扇出走线和一与该第一扇出走线部分重叠的第二扇出走线，该相邻的两条第一扫描线中的一条通过第一扇出走线电性连接其对应的邦定端子，另一条第一扫描线通过第二扇出走线电性连接其对应的邦定端子。
对应每相邻的两条第二扫描线分别设置一条第一扇出走线和一与该第一扇出走线部分重叠的第二扇出走线，该相邻的两条第二扫描线中的一条通过第一扇出走线电性连接其对应的邦定端子，另一条第二扫描线通过第二扇出走线电性连接其对应的邦定端子。
所述多条扫描线沿第一方向延伸，所述多条数据线沿与所述第一方向垂直的第二方向延伸，所述非显示区包括沿第一方向相对设置的第一布线区和第二布线区以及沿第二方向相对设置的第三布线区及第四布线区；
所述多个邦定端子及连接所述数据线及邦定端子的扇出线均位于所述第一布线区中，连接所述第一扫描线及邦定端子的扇出走线从第三布线区延伸至第一布线区中，连接所述第二扫描线及邦定端子的扇出走线从第四布线区延伸至第一布线区中。
所述多个邦定端子位于第二金属层，所述第一扇出走线通过一穿越所述绝缘层的第一过孔与其对应的邦定端子电性连接。
所述多条数据线位于第二金属层，所述第一扇出走线通过一穿越所述绝缘层的第二过孔与其对应的数据线电性连接。
所述多条扫描线位于第一金属层，所述第二扇出走线通过一穿越所述绝缘层的第三过孔与其对应的扫描线电性连接。
所述多条数据线与多条扫描线交叉限定出阵列排布的多个像素区，每一个像素区内均设有一开关薄膜晶体管和一像素电极，所述开关薄膜晶体管的栅极对应电性连接一扫描线，源极对应电性连接一数据线，漏极电性连接其所在像素区内的像素电极。
本发明的有益效果：本发明提供一种阵列基板，包括：基板、多条扇出走线及多个邦定端子；所述基板包括显示区及包围显示区的非显示区，所述多条扇出走线及多个邦定端子均设于所述非显示区中，且多个邦定端子间隔排列，所述多条扇出走线的第一端分别电性连接所述多个邦定端子，所述多条扇出走线的第二端均电性连接所述显示区；所述多条扇出走线包括多条第一扇出走线及多条第二扇出走线，所述多条第一扇出走线位于第一金属层，所述多条第二扇出走线位于第二金属层，所述第一金属层与第二金属层之间具有绝缘层，所述多条第一扇出走线与所述多条第二扇出走线部分重叠，通过将扇出走线分散布置到第一金属层和第二金属层中，能够减少扇出走线的布线面积，降低显示面板的边框宽度，实现窄边框显示。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为现有的阵列基板的示意图；
图2为本发明的阵列基板的示意图；
图3为图2中A处的剖面图；
图4为图2中B处的剖面图；
图5为图2中C处的剖面图；
图6为图2中D处的剖面图；
图7为图2中E处的剖面图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图2至图7，在本发明提供一种阵列基板，包括：基板1、多条扇出走线2及多个邦定端子3；
所述基板1包括显示区11及包围显示区11的非显示区12，所述多条扇出走线2及多个邦定端子3均设于所述非显示区12中，且多个邦定端子3间隔排列，所述多条扇出走线2的第一端分别电性连接所述多个邦定端子3，所述多条扇出走线2的第二端均电性连接所述显示区11；
所述多条扇出走线2包括多条第一扇出走线21及多条第二扇出走线22，所述多条第一扇出走线21位于第一金属层，所述多条第二扇出走线22位于第二金属层，所述第一金属层与第二金属层之间具有绝缘层4，所述多条第一扇出走线21与所述多条第二扇出走线22部分重叠。
具体地，如图2所示，所述显示区11内设有平行间隔排列的多条数据线5及平行间隔排列且与所述多条数据线5交叉的多条扫描线6，每一条数据线5均对应通过一条扇出走线2电性连接一个对应的邦定端子3，每一条扫描线6均对应的通过一条扇出走线2电性连接一个对应的邦定端子3；
其中，所述多条扫描线6包括多条第一扫描线61和多条第二扫描线62，所述多条第一扫描线61与多条第二扫描线62交替排列。
进一步地，所述多条数据线5与多条扫描线6交叉限定出阵列排布的多个像素区9，每一个像素区9内均设有一开关薄膜晶体管T1和一像素电极P，所述开关薄膜晶体管T1的栅极对应电性连接一扫描线6，源极对应电性连接一数据线5，漏极电性连接其所在像素区9内的像素电极P，具体如图2所述，每一个开关薄膜晶体管T1的栅极对应电性连接其上方的一扫描线6，源极对应电性连接左侧的一数据线5。
其中，所述开关薄膜晶体管T1的栅极位于第一金属层，源极和漏极位于第二金属层，像素电极P位于位于第二金属层上方的透明电极层，所述透明电极层与第二金属层之间设于钝化层，所述像素电极P通过穿越所述钝化层的过孔与所述开关薄膜晶体管T1的漏极电性连接，也即该阵列基板的膜层从下到上依次为第一金属层、绝缘层、第二金属层、钝化层及透明电极层。
进一步地，如图3和图4所示，所述多个邦定端子3及多条数据线5均位于第二金属层，所述第一扇出走线21通过一穿越所述绝缘层4的第一过孔81与其对应的邦定端子3电性连接，所述第一扇出走线21通过一穿越所述绝缘层4的第二过孔82与其对应的数据线5电性连接。
具体地，如图5所示，所述多条扫描线6位于第一金属层，所述第二扇出走线22通过一穿越所述绝缘层4的第三过孔83与其对应的扫描线6电性连接。
进一步地，如图6所示，为了防止静电击穿，本发明的阵列基板还包括围绕所述显示区11设置第一地线101和第二地线102，所述第二地线102的位于第二金属层，其两端分别电性连接一绑定端子3，所述第一地线101位于第一金属层，所述第一地线101通过一穿越所述绝缘层4的第四过孔84与第二地线102电性连接。
具体地，如图2所示并结合图7，在本发明的实施例中，对应每相邻的两条数据线5分别设置一条第一扇出走线21和一与该第一扇出走线21部分重叠的第二扇出走线22，该相邻的两条数据线5中的一条通过第一扇出走线21电性连接其对应的邦定端子3，另一条数据线5通过第二扇出走线22电性连接其对应的邦定端子3；
对应每相邻的两条第一扫描线61分别设置一条第一扇出走线21和一与该第一扇出走线21部分重叠的第二扇出走线22，该相邻的两条第一扫描线61中的一条通过第一扇出走线21电性连接其对应的邦定端子3，另一条第一扫描线61通过第二扇出走线22电性连接其对应的邦定端子3；
对应每相邻的两条第二扫描线62分别设置一条第一扇出走线21和一与该第一扇出走线21部分重叠的第二扇出走线22，该相邻的两条第二扫描线62中的一条通过第一扇出走线21电性连接其对应的邦定端子3，另一条第二扫描线62通过第二扇出走线22电性连接其对应的邦定端子3。
进一步地，所述多条扫描线6沿第一方向延伸，所述多条数据线5沿与所述第一方向垂直的第二方向延伸，所述非显示区12包括沿第一方向相对设置的第一布线区121和第二布线区122以及沿第二方向相对设置的第三布线区123及第四布线区124；
所述多个邦定端子3及连接所述数据线5及邦定端子3的扇出线2均位于所述第一布线区121中，连接所述第一扫描线61及邦定端子3的扇出走线2从第三布线区123延伸至第一布线区121中，连接所述第二扫描线62及邦定端子3的扇出走线2从第四布线区124延伸至第一布线区121中。
详细地，如图2所示，在本发明的实施例中，位于奇数行的扫描线6均为第一扫描线61、位于偶数行的扫描线6均为第二扫描线62，所述第一布线区121、第二布线区122、第三布线区123及第四布线区124分别位于所述显示区11的上侧、下侧、左侧及右侧，其中第一扫描线61对应的扇出走线2均位于其左端，第二扫描线62对应的扇出走线2均位于其右端，数据线5对应的扇出走线2均位于其上端。
例如图2所示，对应第一行的扫描线6设置一条第一扇出走线21，对应第三行的扫描线6设置一条第二扇出走线22，该一条第一扇出走线21及第二扇出走线22分别从第一行的扫描线6及第三行的扫描线6的左端引出，并向上延伸，且该第二扇出走线22延伸至超过第一行的扫描线6后与该第一扇出走线21重叠，在延伸至第一布线区121后转向向右水平延伸，并保持重叠，直至到达其对应的绑定端子3的下方后再次转向向上延伸，分别与其对应的绑定端子3电性连接，相同的对应第二行的扫描线6和第四行的扫描线6分别设置的一条第一扇出走线21，对应第三行的扫描线6设置一条第二扇出走线22。
例如图2所示，对应第一列的数据线5和第二列的数据线5分别设置一条第二扇出走线22和一条第一扇出走线21，该一条第二扇出走线22和该一条第一扇出走线21从一条第二扇出走线22和一条第一扇出走线21的上端引出后向右水平延伸，并部分重叠，到达其对应的绑定端子3的下方后转向向上延伸，分别与其对应的绑定端子3电性连接。
对比图1和图2可知，在本发明的阵列基板中，位于显示区11左侧的扇出走线2两两重叠，所需要的空间减半，位于显示区11上侧的扇出走线2也两两重叠，所需要的空间也减半，位于显示区11的右侧的扇出走线2同样两两重叠，所需要的空间也减半，从而本发明的阵列基板相比于现有技术能够使得显示面板的上边框和左右边框均减少一半，从而实现窄边框显示。
综上所述，本发明提供一种阵列基板，包括：基板、多条扇出走线及多个邦定端子；所述基板包括显示区及包围显示区的非显示区，所述多条扇出走线及多个邦定端子均设于所述非显示区中，且多个邦定端子间隔排列，所述多条扇出走线的第一端分别电性连接所述多个邦定端子，所述多条扇出走线的第二端均电性连接所述显示区；所述多条扇出走线包括多条第一扇出走线及多条第二扇出走线，所述多条第一扇出走线位于第一金属层，所述多条第二扇出走线位于第二金属层，所述第一金属层与第二金属层之间具有绝缘层，所述多条第一扇出走线与所述多条第二扇出走线部分重叠，通过将扇出走线分散布置到第一金属层和第二金属层中，能够减少扇出走线的布线面积，降低显示面板的边框宽度，实现窄边框显示。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (8)

1.一种阵列基板，其特征在于，包括：基板(1)、多条扇出走线(2)及多个邦定端子(3)；
所述基板(1)包括显示区(11)及包围显示区(11)的非显示区(12)，所述多条扇出走线(2)及多个邦定端子(3)均设于所述非显示区(12)中，且多个邦定端子(3)间隔排列，所述多条扇出走线(2)的第一端分别电性连接所述多个邦定端子(3)，所述多条扇出走线(2)的第二端均电性连接所述显示区(11)；
所述多条扇出走线(2)包括多条第一扇出走线(21)及多条第二扇出走线(22)，所述多条第一扇出走线(21)位于第一金属层，所述多条第二扇出走线(22)位于第二金属层，所述第一金属层与第二金属层之间具有绝缘层(4)，所述多条第一扇出走线(21)与所述多条第二扇出走线(22)部分重叠；
所述显示区(11)内设有平行间隔排列的多条数据线(5)及平行间隔排列且与所述多条数据线(5)交叉的多条扫描线(6)，每一条数据线(5)均对应通过一条扇出走线(2)电性连接一个对应的邦定端子(3)，每一条扫描线(6)均对应的通过一条扇出走线(2)电性连接一个对应的邦定端子(3)；
所述多条扫描线(6)包括多条第一扫描线(61)和多条第二扫描线(62)，所述多条第一扫描线(61)与多条第二扫描线(62)交替排列；
所述多条扫描线(6)沿第一方向延伸，所述多条数据线(5)沿与所述第一方向垂直的第二方向延伸，所述非显示区(12)包括沿第一方向相对设置的第一布线区(121)和第二布线区(122)以及沿第二方向相对设置的第三布线区(123)及第四布线区(124)；
所述多个邦定端子(3)及连接所述数据线(5)及邦定端子(3)的扇出线(2)均位于所述第一布线区(121)中，连接所述第一扫描线(61)及邦定端子(3)的扇出走线(2)从第三布线区(123)延伸至第一布线区(121)中，连接所述第二扫描线(62)及邦定端子(3)的扇出走线(2)从第四布线区(124)延伸至第一布线区(121)中。
2.如权利要求1所述的阵列基板，其特征在于，对应每相邻的两条数据线(5)分别设置一条第一扇出走线(21)和一与该第一扇出走线(21)部分重叠的第二扇出走线(22)，该相邻的两条数据线(5)中的一条通过第一扇出走线(21)电性连接其对应的邦定端子(3)，另一条数据线(5)通过第二扇出走线(22)电性连接其对应的邦定端子(3)。
3.如权利要求1所述的阵列基板，其特征在于，对应每相邻的两条第一扫描线(61)分别设置一条第一扇出走线(21)和一与该第一扇出走线(21)部分重叠的第二扇出走线(22)，该相邻的两条第一扫描线(61)中的一条通过第一扇出走线(21)电性连接其对应的邦定端子(3)，另一条第一扫描线(61)通过第二扇出走线(22)电性连接其对应的邦定端子(3)。
4.如权利要求1所述的阵列基板，其特征在于，对应每相邻的两条第二扫描线(62)分别设置一条第一扇出走线(21)和一与该第一扇出走线(21)部分重叠的第二扇出走线(22)，该相邻的两条第二扫描线(62)中的一条通过第一扇出走线(21)电性连接其对应的邦定端子(3)，另一条第二扫描线(62)通过第二扇出走线(22)电性连接其对应的邦定端子(3)。
5.如权利要求1所述的阵列基板，其特征在于，所述多个邦定端子(3)位于第二金属层，所述第一扇出走线(21)通过一穿越所述绝缘层(4)的第一过孔(81)与其对应的邦定端子(3)电性连接。
6.如权利要求1所述的阵列基板，其特征在于，所述多条数据线(5)位于第二金属层，所述第一扇出走线(21)通过一穿越所述绝缘层(4)的第二过孔(82)与其对应的数据线(5)电性连接。
7.如权利要求1所述的阵列基板，其特征在于，所述多条扫描线(6)位于第一金属层，所述第二扇出走线(22)通过一穿越所述绝缘层(4)的第三过孔(83)与其对应的扫描线(6)电性连接。
8.如权利要求1所述的阵列基板，其特征在于，所述多条数据线(5)与多条扫描线(6)交叉限定出阵列排布的多个像素区(9)，每一个像素区(9)内均设有一开关薄膜晶体管(T1)和一像素电极(P)，所述开关薄膜晶体管(T1)的栅极对应电性连接一扫描线(6)，源极对应电性连接一数据线(5)，漏极电性连接其所在像素区(9)内的像素电极(P)。
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Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110018595B (zh) * 2019-04-25 2021-11-12 厦门天马微电子有限公司 一种显示面板及显示装置
CN111653603B (zh) * 2020-06-18 2023-08-29 京东方科技集团股份有限公司 显示基板及显示装置
CN111798765A (zh) * 2020-07-08 2020-10-20 Tcl华星光电技术有限公司 显示面板的制备方法、显示装置
US11462576B2 (en) 2020-07-08 2022-10-04 Tcl China Star Optoelectronics Technology Co., Ltd. Display panel, manufacturing method thereof, and display device
CN112017531B (zh) * 2020-09-14 2022-07-29 武汉华星光电技术有限公司 显示面板
CN114868077B (zh) * 2020-10-28 2023-09-19 京东方科技集团股份有限公司 驱动背板及其制备方法和显示模组
DE112021001218T5 (de) * 2021-03-30 2022-12-22 Boe Technology Group Co., Ltd. Anzeigesubstrat und Anzeigevorrichtung
CN113327516B (zh) * 2021-05-31 2022-09-27 Tcl华星光电技术有限公司 显示面板及显示装置
CN114609836B (zh) * 2022-03-07 2023-07-25 武汉华星光电技术有限公司 显示面板和显示装置
CN115830995A (zh) * 2022-12-29 2023-03-21 Tcl华星光电技术有限公司 显示面板

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140094231A (ko) * 2013-01-21 2014-07-30 엘지디스플레이 주식회사 액정 표시패널 및 그 검사 시스템
CN105867035A (zh) * 2016-06-12 2016-08-17 武汉华星光电技术有限公司 扇出走线结构，阵列基板及液晶显示装置
CN107305757A (zh) * 2016-04-21 2017-10-31 瀚宇彩晶股份有限公司 显示装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20080008704A (ko) * 2006-07-21 2008-01-24 삼성전자주식회사 표시기판, 그 제조방법 및 이를 갖는 표시장치
KR101326246B1 (ko) * 2006-12-12 2013-11-11 삼성디스플레이 주식회사 표시 장치
KR101493556B1 (ko) * 2011-10-27 2015-02-16 엘지디스플레이 주식회사 터치 센서 내장형 유기발광 다이오드 표시장치
KR101356594B1 (ko) * 2011-11-11 2014-02-05 엘지디스플레이 주식회사 액정표시장치
KR101932993B1 (ko) * 2012-04-16 2018-12-27 엘지디스플레이 주식회사 표시 장치
KR102240937B1 (ko) * 2014-10-10 2021-04-15 삼성디스플레이 주식회사 표시 장치
KR102446857B1 (ko) * 2015-05-26 2022-09-23 삼성디스플레이 주식회사 표시 장치
US10114258B2 (en) * 2015-05-31 2018-10-30 Lg Display Co., Ltd. Narrow bezel display device
KR102557140B1 (ko) * 2016-06-16 2023-07-20 삼성디스플레이 주식회사 표시장치
KR102561277B1 (ko) * 2016-08-01 2023-07-28 삼성디스플레이 주식회사 표시 장치
CN108549180A (zh) * 2018-03-30 2018-09-18 厦门天马微电子有限公司 一种显示面板及显示装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140094231A (ko) * 2013-01-21 2014-07-30 엘지디스플레이 주식회사 액정 표시패널 및 그 검사 시스템
CN107305757A (zh) * 2016-04-21 2017-10-31 瀚宇彩晶股份有限公司 显示装置
CN105867035A (zh) * 2016-06-12 2016-08-17 武汉华星光电技术有限公司 扇出走线结构，阵列基板及液晶显示装置

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