CN109300849B - 低温多晶硅薄膜晶体管阵列基板及其制造方法 - Google Patents

低温多晶硅薄膜晶体管阵列基板及其制造方法 Download PDF

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CN109300849B
CN109300849B CN201810995637.7A CN201810995637A CN109300849B CN 109300849 B CN109300849 B CN 109300849B CN 201810995637 A CN201810995637 A CN 201810995637A CN 109300849 B CN109300849 B CN 109300849B
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CN109300849A (zh
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陈辰
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Wuhan China Star Optoelectronics Technology Co Ltd
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Abstract

一种低温多晶硅薄膜晶体管阵列基板及其制造方法，该薄膜晶体管阵列基板的制造方法包括在基板上形成多晶硅层；在多晶硅层上依次形成至少一栅极绝缘层和至少一间绝缘层及其上的过孔图案，该过孔图案包括栅极沟槽和源漏极孔，通过填充栅极沟槽以形成栅极线。本发明通过采用栅极绝缘层和间绝缘层的叠层制备，为栅极沟槽的形成提供条件；此外，栅极绝缘层和间绝缘层的叠层制备，配合在栅极绝缘层和间绝缘层上制备过孔以形成过孔图案以及填充过孔图案以制备栅极线等步骤，使得栅极线的形成和过孔图案的形成可以采用相同的光罩即可完成，从而减少光罩使用数量，降低生产成本。

Description

低温多晶硅薄膜晶体管阵列基板及其制造方法
技术领域
本发明涉及显示技术领域，具体涉及一种低温多晶硅(Low Temperature Poly-silicon,LTPS)薄膜晶体管(Thin Film Transistor,TFT)阵列基板及其制造方法。
背景技术
在显示屏制造领域中，LTPS技术由于其产品成本较低及器件电子迁移率高等特点，越来越受到手机和平板屏幕等制造商的青睐。
传统的LTPS技术所需的膜层较多且膜层结构复杂，造成LTPS的制程过程存在所需曝光次数多及所需光罩数量较多的问题。图1为采用传统LTPS技术形成的TFT器件膜层结构，该TFT器件膜层结构包括玻璃基板100、设于所述玻璃基板100上的遮光层101、设于所述玻璃基板100及所述遮光层101上的缓冲层102、设于所述缓冲层102上的多晶硅层103、设于所述多晶硅层103及所述缓冲层102上的栅极绝缘层104、设于所述栅极绝缘层104上的栅极线105、设于所述栅极线105及所述栅极绝缘层104上的间绝缘层106、设于所述间绝缘层106上且通过源极孔连接所述多晶硅层103的源电极108及设于所述间绝缘层106上且通过漏极孔与所述多晶硅层103连接的漏电极109；图2为图1所示TFT器件膜层结构的主要工艺流程，利用该工艺流程图制造图1所示的TFT器件膜层结构需至少6块光罩。为了解决LTPS TFT器件的制程过程存在所需光罩数量较多导致生产成本提高的问题，各大厂商均在寻求减少光罩使用数量的方法。
发明内容
鉴于此，本发明的目的在于提供一种低温多晶硅薄膜晶体管阵列基板的制造方法，该低温多晶硅薄膜晶体管阵列基板的制造方法能够有效地减少光罩使用数量，从而降低生产成本。
为实现上述目的，具体方案如下：
一种低温多晶硅薄膜晶体管阵列基板的制造方法，包括以下步骤：
提供一基板，在所述基板上形成多晶硅层；
在所述多晶硅层上依次形成至少一栅极绝缘层和至少一间绝缘层，在所述栅极绝缘层或所述间绝缘层上涂布第一光阻层，所述第一光阻层经过一光罩曝光及显影液显影后，采用蚀刻制程处理所述栅极绝缘层和所述间绝缘层以形成源漏极孔并暴露部分的多晶硅层，同时于所述栅极绝缘层或所述间绝缘层上形成栅极沟槽，剥离所述栅极绝缘层或所述间绝缘层上剩余的所述第一光阻层；
填充所述源漏极孔及所述栅极沟槽并在所述部分暴露的多晶硅层、所述栅极绝缘层或/和所述间绝缘层上形成栅极层，再在所述栅极层上涂布第二光阻层，所述第二光阻层经过所述光罩曝光及显影液显影后，对所述栅极层进行蚀刻制程处理以在所述栅极沟槽下方对应的栅极绝缘层或间绝缘层上形成栅极线；
其中，所述栅极沟槽的深度小于所述栅极绝缘层和所述间绝缘层的厚度之和。
在其中一些实施例中，采用化学气相沉积一次形成所述栅极绝缘层和所述间绝缘层。
在其中一些实施例中，所述栅极绝缘层为氮化硅层、氧化硅层、氧化硅层及氮化硅层的复合层中的任意一种；所述间绝缘层为氮化硅层、氧化硅层、氧化硅层及氮化硅层的复合层中的任意一种。
在其中一些实施例中，所述在所述多晶硅层上依次形成至少一栅极绝缘层和至少一间绝缘层包括如下步骤：在所述多晶硅层上形成依次叠加的第一栅极绝缘层、第一间绝缘层、第二栅极绝缘层和第二间绝缘层，所述第一栅极绝缘层和第一间绝缘层都为氧化硅层，所述第二栅极绝缘层和第二间绝缘层都为氮化硅层。
在其中一些实施例中，所述栅极线的厚度与所述栅极沟槽的深度相同。
本发明的另一目的是提供一种低温多晶硅薄膜晶体管阵列基板。
一种低温多晶硅薄膜晶体管阵列基板，包括：
一基板，于所述基板上形成的多晶硅层；
至少一栅极绝缘层和至少一间绝缘层，所述栅极绝缘层和所述间绝缘层依次形成于所述多晶硅层上；
栅极沟槽，于所述栅极绝缘层或所述间绝缘层上形成；
栅极线，于所述栅极沟槽下方对应的所述栅极绝缘层或间绝缘层上形成；
其中，所述栅极沟槽的深度小于所述栅极绝缘层和所述间绝缘层的厚度之和。
在其中一些实施例中，采用化学气相沉积一次形成所述栅极绝缘层和所述间绝缘层。
在其中一些实施例中，所述栅极绝缘层为氮化硅层、氧化硅层、氧化硅层及氮化硅层的复合层中的任意一种；所述间绝缘层为氮化硅层、氧化硅层、氧化硅层及氮化硅层的复合层中的任意一种。
在其中一些实施例中，所述栅极绝缘层和所述间绝缘层依次形成于所述多晶硅层上包括如下步骤：在所述多晶硅层上形成依次叠加的第一栅极绝缘层、第一间绝缘层、第二栅极绝缘层和第二间绝缘层，所述第一栅极绝缘层和第一间绝缘层都为氧化硅层，所述第二栅极绝缘层和第二间绝缘层都为氮化硅层。
在其中一些实施例中，所述栅极线的厚度与所述栅极沟槽的深度相同。
与现有技术相比，本发明有以下有益效果：
本发明提供一种低温多晶硅薄膜晶体管阵列基板的制造方法，通过栅极绝缘层和间绝缘层的叠层制备，为栅极沟槽的形成提供条件。另外，栅极绝缘层和间绝缘层的叠层制备，配合在栅极绝缘层和间绝缘层上制备过孔以形成过孔图案(源漏极孔及栅极沟槽)以及填充栅极沟槽以制备栅极线等步骤，使得栅极线的形成和栅极绝缘层和间绝缘层上的过孔图案的形成可以采用相同的光罩即可完成。相对于传统的制造工艺，本发明低温多晶硅薄膜晶体管阵列基板的制造过程可以减少一块光罩的使用，即本发明的低温多晶硅薄膜晶体管阵列基板的制造方法相对传统的制造方法减少了所需的光罩数量，从而降低生产成本。
附图说明
图1为采用传统的LTPS工艺制造的TFT器件膜层结构示意图；
图2为制造图1所示TFT器件膜层结构的主要工艺流程图；
图3为本发明一实施例的低温多晶硅薄膜晶体管阵列基板的主要工艺流程图；
图4为本发明另一实施例的低温多晶硅薄膜晶体管阵列基板的主要工艺流程图；
图5A、5B、5C、5D、5E、5F、5G、5H、5I及5J为图4所示主要工艺流程图在各个工艺段的结构示意图。
附图中示出的部件标注如下：
100、200玻璃基板；101、201遮光层；102、202缓冲层；103、203多晶硅层；
104、204栅极绝缘层；105、205栅极线；106、206间绝缘层；
207源漏极孔；108、208源电极；109、209漏电极；
210栅极层；211栅极沟槽；
212、213、214光阻层；215数据线层；216数据线
具体实施方式
为了便于理解本发明，下面参照相关附图对本发明进行更全面的描述。附图中给出了本发明的较佳实施例。但是，本发明可以以许多不同的形式来实现，并不限于本文所描述的实施例。相反地，提供这些实施例的目的是使对本发明的公开内容的理解更加透彻全面。
请参阅图3，为本发明一实施例的低温多晶硅薄膜晶体管阵列基板的制造方法的主要流程图，包括以下步骤：
S20，提供一基板，在基板上形成多晶硅层；
S21，在多晶硅层上依次形成至少一栅极绝缘层和至少一间绝缘层，在栅极绝缘层或间绝缘层上涂布第一光阻层，第一光阻层经过一光罩曝光及显影液显影后，采用蚀刻制程处理栅极绝缘层和间绝缘层以形成源漏极孔并暴露部分的多晶硅层，同时于栅极绝缘层或间绝缘层上形成栅极沟槽，剥离栅极绝缘层或间绝缘层上剩余的第一光阻层；
S22，填充源漏极孔及栅极沟槽并在部分暴露的多晶硅层、栅极绝缘层或/和间绝缘层上形成栅极层，再在栅极层上涂布第二光阻层，第二光阻层经过光罩曝光及显影液显影后，对栅极层进行蚀刻制程处理以在栅极沟槽下方对应的栅极绝缘层或间绝缘层上形成栅极线；
其中，栅极沟槽的深度小于栅极绝缘层和间绝缘层的厚度之和。
本实施例提供的是低温多晶硅薄膜晶体管阵列基板的制造方法，通过栅极绝缘层和间绝缘层的叠层制备，为栅极沟槽的形成提供条件；传统的栅极绝缘层的厚度一般仅为0.1微米，而栅极线的厚度至少为0.1微米，通过在栅极绝缘层上形成栅极沟槽并填充栅极沟槽以恰好形成栅极线时，单层栅极绝缘层的厚度不能满足栅极沟槽的厚度需求。另外，栅极绝缘层和间绝缘层的叠层制备，配合在栅极绝缘层和间绝缘层上制备过孔以形成过孔图案(源漏极孔及栅极沟槽)以及填充栅极沟槽以制备栅极线等步骤，使得栅极线的形成和栅极绝缘层和间绝缘层上的过孔图案(源漏极孔及栅极沟槽)的形成可以采用相同的光罩(步骤S21和步骤S22中使用的光罩是相同的光罩)即可完成，从而减少光罩使用数量，降低生产成本。相对于传统的制造工艺，本发明低温多晶硅薄膜晶体管阵列基板的制造过程可以减少一块光罩的使用。
请参阅图4，为本发明另一实施例的低温多晶硅薄膜晶体管阵列基板的主要工艺流程图，包括：
S200，提供一基板，该基板为玻璃基板，可选地，在玻璃基板上形成遮光层；
具体地，提供一玻璃基板200，利用第一光罩在玻璃基板200上形成遮光层201。遮光层201由金属制成，主要作用是遮挡射向薄膜晶体管中半导体构件的光线，以避免该光线对半导体构件中的电子迁移过程产生影响。经过上述步骤，得到如图5A所示的结构。
S201，形成缓冲层和多晶硅层；
具体地，在形成多晶硅层203之前，可选地，利用第二光罩在遮光层201和玻璃基板200上形成缓冲层202。该缓冲层202可以是由绝缘材料形成的单层结构，也可以是由至少两种绝缘材料形成的叠层结构，例如缓冲层202可为通过等离子体增强化学气相沉积(PECVD)工艺在遮光层201和玻璃基板200上形成的SiNx/SiOx叠层结构，缓冲层202的作用是防止玻璃基板中的金属离子(铝、钡以及钠等)在热工艺中扩散到LTPS的有源区。
接着，再利用第二光罩在缓冲层202上形成多晶硅层，形成多晶硅层203的步骤包括：
通过化学气相沉积在缓冲层202上形成非晶硅层，通过准分子激光退火法将非晶硅层202进行晶化处理后，得到多晶硅层203；
经过此步骤得到如图5B所示的结构。
S202，离子植入；
具体地，在离子植入之前，需要对多晶硅层203进行图案化处理以得到有源层，再利用第三光罩对有源层进行离子植入。
S203，在多晶硅层上依次形成至少一栅极绝缘层和至少一间绝缘层，在栅极绝缘层或间绝缘层上涂布第一光阻层，第一光阻层经过一光罩曝光及显影液显影后，采用蚀刻制程处理栅极绝缘层和间绝缘层以形成源漏极孔并暴露部分的多晶硅层，同时于栅极绝缘层或间绝缘层上形成栅极沟槽，剥离栅极绝缘层或间绝缘层上剩余的第一光阻层；
具体地，采用化学气相沉积在多晶硅层203上依次形成栅极绝缘层204和间绝缘层206，栅极绝缘层204和间绝缘层206由依次叠加的第一栅极绝缘层、第一间绝缘层、第二栅极绝缘层以及第二间绝缘层组成，其中，第一栅极绝缘层和第二栅极绝缘层的厚度为0.1微米左右，第二间绝缘层和第二间绝缘的厚度为0.4-0.6微米，其中，栅极绝缘层是氮化硅层(SiNx)、氧化硅层(SiOx)以及氮化硅层与氧化硅层的复合层中的任意一种，间绝缘层也是氮化硅层(SiNx)、氧化硅层(SiOx)以及氮化硅层与氧化硅层的复合层中的中的任意一种，优选地，第一栅极绝缘层和第一间绝缘层都为氧化硅层，第二栅极绝缘层和第二间绝缘层为氮化硅层，第一栅极绝缘层和第一间绝缘层都为氧化硅层能够起到保温以及抗氧化作用，第二栅极绝缘层和第二间绝缘层为氮化硅层能够起到阻隔杂质并提高电性能和电学表现的作用，栅极绝缘层204和间绝缘层206的此种优选制备方法相互配合能够进一步地提高低温多晶硅薄膜晶体管阵列基板的综合性能。此外，由于栅极绝缘层和间绝缘层的叠层结构，使得栅极绝缘层和间绝缘层可以采用一次制程法制得，相较于传统方法(栅极绝缘层和间绝缘层是被间隔开且分两次制得的)，本实施例的一次制程法能够缩短整体的制程时间，从而提高生产效率；
接着，在第二间绝缘层上涂布第一负光阻层212，第一负光阻层212经过第四光罩曝光并经过显影液显影后，在第一负光阻层212上形成源漏极孔的定位孔和栅极沟槽的定位槽(如图5C所示)，再对栅极绝缘层和间绝缘层进行蚀刻制程处理，在源漏极孔的定位孔下方所对应的栅极绝缘层204和间绝缘层206上形成源漏极孔207并暴露部分的多晶硅层203，同时在栅极沟槽的定位槽下方所对应的第一间绝缘层上形成栅极沟槽211，剥离第二间绝缘层上剩余的第一负光阻层212，经过此步骤得到如图5D所示的结构。
S204，填充源漏极孔及栅极沟槽并在部分暴露的多晶硅层、栅极绝缘层或/和间绝缘层上形成栅极层，再在栅极层上涂布第二光阻层，第二光阻层经过光罩曝光及显影液显影后，对栅极层进行蚀刻制程处理以在栅极沟槽下方对应的栅极绝缘层或间绝缘层上形成栅极线；其中，栅极沟槽的深度小于栅极绝缘层和间绝缘层的厚度之和；
具体地，填充源漏极孔207及栅极沟槽211并在部分暴露的多晶硅层203、第二间绝缘层上形成栅极层210(如图5E所示)，在栅极层210上涂布第一正光阻层213，第一正光阻层213经过第四光罩曝光及显影液显影后，形成对源漏电极图案以及栅极线图案进行保护的第一正光阻层213(如图5F所示)，再对未被第一正光阻层213保护的栅极层210进行蚀刻制程处理，然后处理剩余的第一正光阻层213，在栅极沟槽211下方对应的第一间绝缘层上方形成栅极线205，同时在源漏极孔207中形成源漏电极(208，209)，经过此步骤得到如图5G所示的结构；
其中，栅极线的厚度与栅极沟槽的深度相同，如此，可以通过准确地设计栅极沟槽的深度从而提高栅极线的精确度，而且，栅极线的厚度高于栅极沟槽的深度，会提高蚀刻制程的控制难度，即栅极线的厚度与栅极沟槽的深度相同也有利于能够简化栅极层的形成并减少不必要的刻蚀制程。
S205，形成数据线；
具体地，采用物理沉积在源漏电极(208，209)、栅极线205以及第二间绝缘层上形成数据线层215，如图5H所示；
接着，在数据线层215上涂布第二正光阻层214，第二正光阻层214经过第五光罩曝光后及显影液显影后，剩下保护数据线图案的第二正光阻层214(如图5I所示)，通过蚀刻制程处理掉数据线图案之外的其他数据线层215，再剥离剩余的第二光阻层214，在源极上形成数据线216，如图5J所示。
此外，本发明还提供一种通过上述方法制造的低温多晶硅薄膜晶体管阵列基板。
以上实施方式仅用于说明本发明，而并非对本发明的限制，有关技术领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (3)

1.一种低温多晶硅薄膜晶体管阵列基板的制造方法，其特征在于，包括以下步骤：
提供一基板，在所述基板上形成多晶硅层；
在所述多晶硅层上依次形成至少一栅极绝缘层和至少一间绝缘层，包括在所述多晶硅层上形成依次叠加的第一栅极绝缘层、第一间绝缘层、第二栅极绝缘层和第二间绝缘层，所述第一栅极绝缘层和第一间绝缘层都为氧化硅层，所述第二栅极绝缘层和第二间绝缘层都为氮化硅层；
在所述栅极绝缘层或所述间绝缘层上涂布第一光阻层，所述第一光阻层经过一光罩曝光及显影液显影后，采用蚀刻制程处理所述栅极绝缘层和所述间绝缘层以形成源漏极孔并暴露部分的多晶硅层，同时于所述栅极绝缘层或所述间绝缘层上形成栅极沟槽，剥离所述栅极绝缘层或所述间绝缘层上剩余的所述第一光阻层；
填充所述源漏极孔及所述栅极沟槽并在所述部分暴露的多晶硅层、所述栅极绝缘层或/和所述间绝缘层上形成栅极层，再在所述栅极层上涂布第二光阻层，所述第二光阻层经过所述光罩曝光及显影液显影后，对所述栅极层进行蚀刻制程处理以在所述栅极沟槽下方对应的栅极绝缘层或间绝缘层上形成栅极线，同时在所述源漏极孔中形成源漏电极；
其中，所述栅极沟槽的深度小于所述栅极绝缘层和所述间绝缘层的厚度之和。
2.根据权利要求1所述的低温多晶硅薄膜晶体管阵列基板的制造方法，其特征在于，所述在所述多晶硅层上依次形成至少一栅极绝缘层和至少一间绝缘层的步骤包括：采用化学气相沉积一次形成所述栅极绝缘层和所述间绝缘层。
3.根据权利要求1所述的低温多晶硅薄膜晶体管阵列基板的制造方法，其特征在于，所述栅极线的厚度与所述栅极沟槽的深度相同。
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