CN109192790B - Silicon carbide Schottky diode and manufacturing method thereof - Google Patents
Silicon carbide Schottky diode and manufacturing method thereof Download PDFInfo
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- CN109192790B CN109192790B CN201811332649.8A CN201811332649A CN109192790B CN 109192790 B CN109192790 B CN 109192790B CN 201811332649 A CN201811332649 A CN 201811332649A CN 109192790 B CN109192790 B CN 109192790B
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 50
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 48
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 11
- 239000000758 substrate Substances 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 8
- 230000008569 process Effects 0.000 claims description 5
- 239000012535 impurity Substances 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 238000000151 deposition Methods 0.000 claims description 2
- 238000009826 distribution Methods 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 13
- 238000006243 chemical reaction Methods 0.000 description 6
- 230000015556 catabolic process Effects 0.000 description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
- 230000007547 defect Effects 0.000 description 2
- 230000002411 adverse Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000010276 construction Methods 0.000 description 1
- 230000007123 defense Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000036541 health Effects 0.000 description 1
- 238000009776 industrial production Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
Abstract
The invention relates to the technical field of semiconductors, and particularly discloses a silicon carbide Schottky diode and a manufacturing method thereof, wherein the silicon carbide Schottky diode comprises the following components: the epitaxial structure comprises an N-type silicon carbide substrate (2), an N-type epitaxial layer (3), an anode electrode and a cathode electrode, wherein a P-type well region is arranged on the epitaxial surface of the N-type epitaxial layer (3) and an N-type well region (5) is formed; the P-type well region comprises a second P-type well region (6), a first P-type well region (4) is connected to the periphery of the second P-type well region (6), and the first P-type well region (4) and the second P-type well region (6) have the same potential. According to the invention, the PN diode formed by the second P-type well region (6) and the N-type epitaxial layer (3) is started to drive the PN junction formed by the first P-type well region (4) and the N-type epitaxial layer (3) to be started, so that the surge current of the device is obviously increased.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to a silicon carbide Schottky diode with optimized heat distribution and a manufacturing method thereof.
Background
The power device and the module thereof provide an effective way for realizing the conversion between various forms of electric energy, and are widely applied in the fields of national defense construction, transportation, industrial production, medical treatment and health and the like. Since the first power device application in the 50 s of the last century, the push of each generation of power devices has led to more efficient conversion and use of energy.
The traditional power device and module are mainly composed of silicon-based power devices, mainly composed of thyristors, power PIN devices, power bipolar junction devices, power MOSFETs, insulated gate field effect transistors and the like, are widely applied in the full power range, and occupy the dominant market of power semiconductor devices by means of the design technology and process technology which are long in history and mature. However, as the power semiconductor technology is developed gradually, the characteristics of silicon-based power devices have gradually approached their theoretical limits. Researchers strive to find better parameters in the narrow optimization space of silicon-based power devices, and meanwhile, attention is paid to excellent material characteristics of third-generation wide band gap semiconductor materials such as SiC, gaN and the like in the fields of high power, high frequency, high temperature resistance, radiation resistance and the like.
Silicon carbide (SiC) materials have become a research hotspot for international power semiconductor devices due to their excellent properties. Compared with the traditional silicon material, the silicon carbide (SiC) has the advantages of large forbidden bandwidth, high breakdown field strength, high thermal conductivity and the like. The high forbidden bandwidth makes the intrinsic carrier concentration of silicon carbide low, thus reducing the reverse current of the device; the high breakdown field strength can greatly improve the reverse breakdown voltage of the power device and reduce the resistance of the device when the device is conducted; the high thermal conductivity can greatly improve the highest working temperature at which the device can work; and in numerous high power applications, such as: silicon carbide-based devices are highly expected in the fields of high-speed railways, hybrid electric vehicles, intelligent high-voltage direct-current transmission and the like. Meanwhile, the silicon carbide power device can effectively reduce power loss, so the silicon carbide power device is known as a green energy device for driving a new energy revolution.
Currently, silicon carbide power devices mainly include diodes and MOSFETs. For silicon carbide diodes, breakdown voltage, forward conduction voltage drop, and junction capacitance charge are their most important electrical parameters, and surge current capability is its most important reliability parameter. At present, a junction barrier schottky diode (JBS) is often adopted in a silicon carbide diode, as shown in fig. 17, which is a typical silicon carbide JBS structure, in a normal conduction working state (small current) of a device, only a schottky contact area is conducted, and a P-type well region does not participate in conduction, so that the larger the area of the P-type well region is, the larger the conduction voltage drop of the device is, and the larger the conduction loss is under the same area condition. Under the condition of large current (surge current comes to be temporary), the PN junction is conducted, minority carrier holes are injected into the drift region of the device, so that the surge current capacity of the device is improved, and the larger the area of the P-type well region is, the stronger the surge current capacity of the device is. However, because the PN junction diode of silicon carbide has higher starting voltage, surge current is difficult to effectively ensure that the PN junction is effectively started in time, even if the PN junction is started, the forward conduction voltage drop of the device is too high, so that the temperature of a chip rises faster, the chip is extremely easy to fail, and the power surge current capacity of the silicon carbide is poor. On the other hand, if the area of the P-type well region of the JBS diode is greatly increased, the surge current capacity of the device can be effectively improved, but the forward conduction loss of the device is larger, and the conversion efficiency of electric energy is adversely affected when the device is applied to a system.
Therefore, a silicon carbide JBS device with small forward conduction voltage drop and large surge current is needed to overcome the defects in the prior art.
Disclosure of Invention
In order to solve the defects existing in the prior art, the invention provides a silicon carbide Schottky diode and a manufacturing method thereof
As a first aspect of the present invention, there is provided a silicon carbide schottky diode, the silicon carbide schottky diode including an N-type silicon carbide substrate, an N-type epitaxial layer, an anode electrode, and a cathode electrode, wherein a P-type well region is provided on an epitaxial surface of the N-type epitaxial layer and an N-type well region is formed; the P-type well region comprises a second P-type well region, a first P-type well region is connected around the second P-type well region, and the first P-type well region and the second P-type well region have the same potential.
Further, the area of the second P-type well region accounts for 10-90% of the area of the epitaxial surface of the N-type epitaxial layer.
Further, the first P-type well regions are multiple, and the first P-type well regions and the N-type well regions are alternately distributed.
Further, one end of each first P-type well region is connected with the second P-type well region, and the other end of each first P-type well region extends outwards.
Further, the plurality of first P-type well regions are staggered with each other and distributed in a grid shape.
Further, the second P-type well region has a plurality of blocks, and the plurality of blocks of the second P-type well region are directly connected or connected through the first P-type well region.
As a second aspect of the present invention, there is provided a method for manufacturing a silicon carbide schottky diode, comprising the steps of:
s1: providing an N-type silicon carbide substrate;
s2: an epitaxial process is adopted to grow an N-type epitaxial layer on the first surface of the N-type silicon carbide substrate;
s3: injecting P-type impurities on the epitaxial surface of the N-type epitaxial layer, so that an N-type well region, a first P-type well region and a second P-type well region are formed inwards from the epitaxial surface of the N-type epitaxial layer;
s5: and depositing metal on the second surface of the N-type silicon carbide substrate and the surface of the well region to form an electrode.
Further, the plurality of first P-type well regions are arranged, the plurality of first P-type well regions are spaced, N-type well regions are arranged between adjacent first P-type well regions, and the first P-type well regions and the N-type well regions are alternately distributed.
Further, the second P-type well region has a plurality of blocks, and the plurality of blocks of the second P-type well region are directly connected or connected through the first P-type well region.
From the above, the silicon carbide schottky diode and the manufacturing method thereof provided by the invention have the following advantages compared with the prior art: the first P-type well region is connected with the second P-type well region, and the electric potentials are the same, so that the conduction voltage drop of the device is smaller under the condition of the same area, the conduction loss is reduced, and the conversion efficiency of electric energy in the application process of the system is improved. When the device is turned on, electron current flows under the second P-type well region and then flows into the Schottky junction. Because the area of the second P-type well region is larger, even if the current conducted by the device is small, the forward voltage drop of the PN junction formed by the second P-type well region and the N-type epitaxial layer can be quickly and stably increased to 3V (silicon carbide PN junction starting voltage), and because the second P-type well region is connected with the first P-type well region, the forward voltage drop of the PN junction formed by the first P-type well region and the N-type epitaxial layer can be quickly and stably increased to 3V, therefore, under the same conduction voltage drop condition, the PN junction diode of the device can be started earlier and more stably than the traditional device, and the conducted current is larger, and therefore, the surge current of the device is larger than that of the traditional device.
Drawings
Fig. 1 is a schematic diagram of layout morphology of the present invention, a chip layout is a square structure, a second P-type well region is cross-shaped, and first P-type well regions are distributed in a grid shape.
Fig. 2 is an enlarged image of the structure within the dashed box BCDE in fig. 1.
Fig. 3 is a schematic diagram of layout morphology of the present invention, the chip layout is a square structure, the second P-type well region is in an X-shape, and the first P-type well region is distributed in a grid shape.
Fig. 4 is a schematic diagram of layout morphology of the present invention, the chip layout is a square structure, the second P-type well region is square, and the first P-type well region is distributed in a grid shape.
Fig. 5 is a schematic diagram of layout morphology of the present invention, the chip layout is a square structure, the second P-type well region is circular, and the first P-type well region is distributed in a grid shape.
Fig. 6 is a schematic diagram of layout morphology of the present invention, the chip layout is a circular structure, the second P-type well region is circular, and the first P-type well region is distributed in a grid shape.
FIG. 7 is a schematic diagram of a layout of the present invention, wherein the chip layout is a circular structure, the second P-type well regions are in a plurality of blocks, the second P-type well regions are distributed in a crisscross manner, and the first P-type well regions are distributed in a grid manner.
Fig. 8 is a schematic diagram of layout morphology of the present invention, the chip layout is a circular structure, the second P-type well regions are five squares, the five second P-type well regions are not contacted with each other to form a cross shape, and the first P-type well regions are distributed in a grid shape.
Fig. 9 is a schematic diagram of layout morphology of the present invention, the chip layout is a circular structure, the second P-type well region is four triangles, the four second P-type well regions are square formed by mutually non-contact, and the first P-type well regions are distributed in a grid shape.
Fig. 10 is a schematic diagram of layout morphology of the present invention, the chip layout is a circular structure, the second P-type well region is a quarter circle, the four second P-type well regions are not contacted with each other to form a circle, and the first P-type well regions are distributed in a grid shape.
FIG. 11 is a schematic diagram of layout morphology of the present invention, in which a plurality of square second P-type well regions are uniformly distributed on the surface of a chip, and the first P-type well regions are distributed in a grid shape.
Fig. 12 is a schematic diagram of layout morphology of the present invention, the chip layout is a square structure, the second P-type well region is square, and the first P-type well region is distributed in a stripe shape.
Fig. 13 is a schematic diagram of layout morphology of the present invention, a chip layout is a square structure, a second P-type well region is rectangular, the first P-type well regions are distributed in a stripe shape, and one end of each first P-type well region is connected with the second P-type well region.
Fig. 14 is a schematic cross-sectional view of the silicon carbide N-type epitaxial layer obtained in step S2 according to the second aspect of the present invention.
Fig. 15 is a schematic cross-sectional structure diagram illustrating the formation of a second P-type well region, an N-type well region, and a first P-type well region in step S4 according to a second aspect of the present invention.
Fig. 16 is a schematic cross-sectional structure of the anode electrode and the cathode electrode at step S5 of the second aspect of the present invention, which is a schematic cross-sectional structure taken along AA' in fig. 3.
Fig. 17 is a motion path of electron current under the condition of conducting small current in the device of the present invention, wherein the PN junction formed by the N-type epitaxial layer and the second P-type well region is not conducted.
1. Cathode electrode, 2. N type silicon carbide substrate, 210. First surface, 220. Second surface, 3. N type epitaxial layer, 310. Epitaxial surface, 4. First P type well region, 5. N type well region, 6. Second P type well region, 7. Anode electrode, 8. Well region surface.
Description of the embodiments
The present invention will be further described in detail below with reference to specific embodiments and with reference to the accompanying drawings, in order to make the objects, technical solutions and advantages of the present invention more apparent. Wherein like parts are designated by like reference numerals. It should be noted that the words "front", "rear", "left", "right", "upper" and "lower" used in the following description refer to directions in the drawings. The words "inner" and "outer" are used to refer to directions toward or away from, respectively, the geometric center of a particular component.
As a first embodiment of the first aspect of the present invention, there is provided a silicon carbide schottky diode having a structure including: the cathode electrode 1, the N-type silicon carbide substrate 2, the N-type epitaxial layer 3 and the anode electrode 7 are sequentially arranged from bottom to top, a second P-type well region 6 is arranged in the middle of an epitaxial surface 310 of the N-type epitaxial layer 3, a first P-type well region 4 is arranged around the second P-type well region 6, and the first P-type well region 4 is connected with the second P-type well region 6 and has the same potential. The plurality of first P-type well regions 4 are arranged at intervals, and N-type well regions 5 are arranged between two adjacent first P-type well regions 4, so that the first P-type well regions 4 and the N-type well regions 5 are alternately distributed. The schottky contact between the anode electrode 7 and the N-type well region 5 forms a schottky junction, and the anode electrode 7 is in ohmic contact with the first P-type well region 4 and the second P-type well region 6.
And in order to effectively improve the surge current capability of the device, the area of the second P-type well region 6 occupies 50% of the area of the epitaxial surface 310 of the N-type epitaxial layer 3
As shown in fig. 17, it can be understood that the first P-type well region 4 is connected with the second P-type well region 6 and the electric potentials are the same, so that the on-voltage drop of the device is smaller under the condition of the same area, the on-loss is reduced, and the conversion efficiency of the device to electric energy is improved when the device is applied in the system. So that when the device is turned on, electron current flows under the second P-type well region 6 and then into the schottky junction. Because the area of the second P-type well region 6 is larger, even if the conducting current of the device is very small, the forward voltage drop of the PN junction formed by the second P-type well region 6 and the N-type epitaxial layer can be quickly and stably increased to 3V (silicon carbide PN junction starting voltage), and because the second P-type well region 6 is connected with the first P-type well region 4, the forward voltage drop of the PN junction formed by the first P-type well region 4 and the N-type epitaxial layer can be quickly and stably increased to 3V, therefore, under the same conducting voltage drop condition, the PN junction diode of the device can be started earlier and more stably than the traditional device, and the conducting current of the device is larger, and therefore, compared with the traditional device, the surge current of the device is larger.
As shown in fig. 8 to 11, the second P-type well region 6 has a plurality of blocks, and the plurality of blocks of the second P-type well region 6 are connected through the first P-type well region 4.
As shown in fig. 1 to 11, in order to further improve the conversion efficiency of the electric energy during the application in the system, the plurality of first P-type well regions 4 are staggered with each other and distributed in a grid shape.
As a second embodiment of the first aspect of the present invention, there is provided a silicon carbide schottky diode having a structure including: the cathode electrode 1, the N-type silicon carbide substrate 2, the N-type epitaxial layer 3 and the anode electrode 7 are sequentially arranged from bottom to top, a second P-type well region 6 is arranged in the middle of an epitaxial surface 310 of the N-type epitaxial layer 3, a first P-type well region 4 is arranged around the second P-type well region 6, and the first P-type well region 4 is connected with the second P-type well region 6 and has the same potential. As shown in fig. 2, the plurality of first P-type well regions 4 are arranged at intervals, and N-type well regions 5 are arranged between two adjacent first P-type well regions 4, so that the first P-type well regions 4 and the N-type well regions 5 are alternately distributed. The schottky contact between the anode electrode 7 and the N-type well region 5 forms a schottky junction, and the anode electrode 7 is in ohmic contact with the first P-type well region 4 and the second P-type well region 6.
And in order to effectively improve the surge current capability of the device, the area of the second P-type well region 6 occupies 10% of the area of the epitaxial surface 310 of the N-type epitaxial layer 3.
As shown in fig. 1, 3 and 7, the second P-type well region 6 has a plurality of blocks, and the plurality of blocks of the second P-type well region 6 are directly connected.
As shown in fig. 12 and 13, one end of each of the first P-type well regions 4 is connected to the second P-type well region 6, and the other end extends outwards.
As a second aspect of the present invention, there is provided a method for manufacturing a silicon carbide schottky diode, which specifically includes the steps of:
s1: providing an N-type silicon carbide substrate 2;
s2: an epitaxial process is adopted to grow an N-type epitaxial layer 3 on the first surface 210 of the N-type silicon carbide substrate 2, as shown in fig. 14;
s3: p-type impurities are injected on the epitaxial surface 310 of the N-type epitaxial layer 3, so that an N-type well region 5, a first P-type well region 4 and a second P-type well region 6 are formed inwards from the epitaxial surface 310 of the N-type epitaxial layer 3;
s4: metal is deposited on the second surface 220 of the N-type silicon carbide substrate 2 and the well region surface 8 to form a motor, as shown in fig. 16.
The plurality of first P-type well regions 4 are arranged, the plurality of first P-type well regions 4 are spaced, N-type well regions 5 are arranged between adjacent first P-type well regions 4, and the first P-type well regions 4 and the N-type well regions 5 are alternately distributed.
The second P-type well region 6 has a plurality of blocks, and the plurality of blocks of the second P-type well region 6 are directly connected or connected through the first P-type well region 4.
Those of ordinary skill in the art will appreciate that: the above embodiments are merely illustrative of the present invention and are not intended to limit the present invention, and any modifications, equivalent substitutions, improvements, etc. within the spirit of the present invention should be included in the scope of the present invention.
Claims (5)
1. A silicon carbide schottky diode, comprising an N-type silicon carbide substrate (2), an N-type epitaxial layer (3), an anode electrode (7) and a cathode electrode (1), characterized in that a P-type well region and an N-type well region (5) are formed on an epitaxial surface (310) of the N-type epitaxial layer (3); the P-type well region comprises a second P-type well region (6), a first P-type well region (4) is connected around the second P-type well region (6), and the first P-type well region (4) and the second P-type well region (6) have the same potential;
the area of the second P-type well region (6) accounts for 10-90% of the area of an epitaxial surface (310) of the N-type epitaxial layer (3);
the first P-type well regions (4) are arranged in a plurality, and the first P-type well regions (4) and the N-type well regions (5) are alternately distributed;
the second P-type well region (6) is provided with a plurality of blocks, and the plurality of blocks of the second P-type well region (6) are directly connected or connected through the first P-type well region (4);
a second P-type well region (6) is arranged in the middle of an epitaxial surface (310) of the N-type epitaxial layer (3), and a first P-type well region (4) is arranged around the second P-type well region (6);
one end of each first P-type well region (4) is connected with a second P-type well region (6), and the other end extends outwards;
the second P-type well region (6) is of a monolithic structure, and a plurality of the first P-type well regions (4) and a plurality of the N-type well regions (5) are arranged around the second P-type well region (6).
2. The silicon carbide schottky diode of claim 1 wherein a plurality of said first P-type well regions (4) are staggered with respect to each other in a grid-like distribution.
3. A method of manufacturing a silicon carbide schottky diode according to any of claims 1-2, comprising the steps of:
s1: providing an N-type silicon carbide substrate (2);
s2: an epitaxial process is adopted to grow an N-type epitaxial layer (3) on the first surface (210) of the N-type silicon carbide substrate (2);
s3: p-type impurities are injected into the epitaxial surface (310) of the N-type epitaxial layer (3), so that an N-type well region (5), a first P-type well region (4) and a second P-type well region (6) are formed inwards from the epitaxial surface (310) of the N-type epitaxial layer (3);
s4: and depositing metal on the second surface of the N-type silicon carbide substrate (2) and the well region surface (8) to form an electrode.
4. A method for manufacturing a silicon carbide schottky diode according to claim 3, wherein the plurality of first P-type well regions (4) are arranged, the plurality of first P-type well regions (4) are spaced apart, N-type well regions (5) are arranged between adjacent first P-type well regions (4), and the first P-type well regions (4) and the N-type well regions (5) are alternately distributed.
5. The method of manufacturing a silicon carbide schottky diode as described in claim 4 wherein said second P-type well region (6) has a plurality of blocks, and a plurality of said second P-type well regions (6) are connected directly or through said first P-type well region (4).
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Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002314098A (en) * | 2001-04-13 | 2002-10-25 | Sanken Electric Co Ltd | Semiconductor device |
| JP2005229070A (en) * | 2004-02-16 | 2005-08-25 | Matsushita Electric Ind Co Ltd | Schottky barrier diode and manufacturing method therefor |
| CN101097947A (en) * | 2006-06-30 | 2008-01-02 | 株式会社东芝 | Semiconductor device |
| CN203351612U (en) * | 2013-08-01 | 2013-12-18 | 泰科天润半导体科技（北京）有限公司 | Schottky diode |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP5175872B2 (en) * | 2010-01-21 | 2013-04-03 | 株式会社東芝 | Semiconductor rectifier |
| JP6168806B2 (en) * | 2013-03-22 | 2017-07-26 | 株式会社東芝 | Semiconductor device |
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Patent Citations (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002314098A (en) * | 2001-04-13 | 2002-10-25 | Sanken Electric Co Ltd | Semiconductor device |
| JP2005229070A (en) * | 2004-02-16 | 2005-08-25 | Matsushita Electric Ind Co Ltd | Schottky barrier diode and manufacturing method therefor |
| CN101097947A (en) * | 2006-06-30 | 2008-01-02 | 株式会社东芝 | Semiconductor device |
| CN203351612U (en) * | 2013-08-01 | 2013-12-18 | 泰科天润半导体科技（北京）有限公司 | Schottky diode |
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