CN109087940A - A kind of SiC power device terminal and preparation method thereof - Google Patents
A kind of SiC power device terminal and preparation method thereof Download PDFInfo
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- 238000002360 preparation method Methods 0.000 title description 2
- 230000000670 limiting effect Effects 0.000 claims abstract description 62
- 238000004519 manufacturing process Methods 0.000 claims abstract description 20
- 239000000758 substrate Substances 0.000 claims abstract description 17
- 239000002184 metal Substances 0.000 claims abstract description 14
- 238000002161 passivation Methods 0.000 claims abstract description 9
- 239000010410 layer Substances 0.000 claims description 66
- 238000001259 photo etching Methods 0.000 claims description 27
- 229920002120 photoresistant polymer Polymers 0.000 claims description 22
- 239000012535 impurity Substances 0.000 claims description 21
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- 238000002347 injection Methods 0.000 claims description 14
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- 238000005530 etching Methods 0.000 claims description 5
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- 230000026267 regulation of growth Effects 0.000 claims description 3
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- 238000012797 qualification Methods 0.000 abstract description 5
- 239000004065 semiconductor Substances 0.000 abstract description 5
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 67
- 229910010271 silicon carbide Inorganic materials 0.000 description 65
- 230000000694 effects Effects 0.000 description 12
- 230000005684 electric field Effects 0.000 description 7
- 238000009826 distribution Methods 0.000 description 6
- 150000002500 ions Chemical class 0.000 description 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000015556 catabolic process Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 238000010586 diagram Methods 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 230000002829 reductive effect Effects 0.000 description 3
- 238000000137 annealing Methods 0.000 description 2
- 230000015572 biosynthetic process Effects 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000407 epitaxy Methods 0.000 description 2
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 230000036961 partial effect Effects 0.000 description 2
- 230000002441 reversible effect Effects 0.000 description 2
- 206010044565 Tremor Diseases 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/8613—Mesa PN junction diodes
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Abstract
The present invention relates to technical field of semiconductors, specifically disclose a kind of SiC power device terminal, wherein, the SiC power device terminal includes: the cathode metal layer set gradually from bottom to top, first conductivity type substrate layer and the first conductive type epitaxial layer, the second discrete conduction type field limiting ring of multiple intervals is provided on first conductive type epitaxial layer, the second discrete conduction type well region of multiple intervals is provided on first conductive type epitaxial layer, the second conduction type well region is arranged alternately with the second conduction type field limiting ring, passivation layer is set on the second conduction type well region and the second conduction type field limiting ring.The invention also discloses a kind of production methods of SiC power device terminal.SiC power device terminal provided by the invention has high reliablity and can be improved the advantage of product qualification rate.
Description
Technical field
The present invention relates to technical field of semiconductors more particularly to a kind of SiC power device terminal and a kind of SiC power devices
The production method of terminal.
Background technique
Conversion provides effective approach between diversified forms electric energy to realize for power device and its module, builds in national defence
If, communications and transportation, industrial production, the fields such as health care are widely applied.From the first item power device fifties in last century
Since part is applied, the release of every generation power device all makes the energy more efficiently convert and use.Therefore, power device
Further to develop, must just be effectively reduced conducting resistance.
Conventional power devices and module are dominated by Si base power device, mainly double with thyristor, power P IN device, power
Based on the devices such as pole junction device, power MOSFET and isolated-gate field effect transistor (IGFET), obtained in full power range
It is widely applied, the master of power semiconductor has been captured with its long history, very mature designing technique and technology
Lead market.However, conducting resistance is limited by breakdown voltage and there are a limit --- be referred to as " the silicon limit " (Silicon
Limit), can not reduce again.Studies have shown that being led for ideal N-channel power MOS (i.e. Ron only considers drift layer resistance RD)
The relationship for resistance and the breakdown voltage of being powered are as follows:
As deep space exploration, Deep Oil And Gas Exploration exploration, extra-high voltage can be converted, express locomotive driving and nuclear energy exploitation etc. are extreme
Application demand under environment, Si base power device oneself be unable to satisfy high power, high frequency and high temperature etc. requirement.Using device it is in parallel or
Series Package can realize the demand of high voltage and high current, but thus bring device reliability be deteriorated meeting so that system failure
Rate increases.In addition, the biggish conducting resistance of Si base power device has been greatly reduced the energy conversion efficiency of system.
While researcher makes great efforts to seek more preferably parameter in the narrow optimization space of silicon-based power devices, it is also noted that
The third generations wide bandgap semiconductor materials such as SiC, GaN are excellent in the fields such as high-power, high-frequency, high temperature resistant, anti-radiation
Material property.
Silicon carbide (SiC) material becomes the research hotspot of power semiconductor in the world by its excellent performance.
Silicon carbide (SiC) has the advantages such as forbidden bandwidth is big, disruptive field intensity is high, thermal conductivity is high compared to traditional silicon materials.Forbidden bandwidth
The intrinsic carrier concentration of ambassador's silicon carbide is low, to reduce the reverse current of device；High disruptive field intensity can mention significantly
The breakdown reverse voltage of high-power component, and resistance when can reduce break-over of device；High heat conductance can greatly improve device
The maximum operating temperature that part can work；And in numerous high power applications occasions, such as: high-speed railway, hybrid vehicle,
The fields such as intelligent high-pressure direct current transportation, silicon carbidebased devices have been assigned very high expectation.Meanwhile silicon carbide power device energy
Power loss is enough effectively reduced, so being known as driving " green energy resource " device of " new energy revolution ".
Currently, silicon carbide power device mainly includes diode and MOSFET.For silicon carbide diode, breakdown voltage,
Reliability is its main measurement index.Silicon carbide diode terminal structure often uses field limiting ring technology at present, normal in device
Under artesian condition, depletion region increases, and when crossing field limiting ring, and field limiting ring will undertake the main voltage tied, and required pressure resistance is higher,
Field limiting ring quantity is more, and the area of occupancy is also bigger.Also, the injection to surface of SiC can generate the bad of injection ion diffusion
Effect leads to terminal structure effect sharp fall, it is difficult to meet the requirement of device.On this basis, the shakiness of current process
It is qualitative, so that injection effect deviation is occurred from reaching ideal situation, the qualification rate of actual production is caused to reduce.
Therefore, the SiC power device terminal of product qualification rate can be improved by needing a kind of high reliability, to overcome existing skill
Deficiency present in art.
Summary of the invention
The present invention is directed at least solve one of the technical problems existing in the prior art, it is whole to provide a kind of SiC power device
End and a kind of production method of SiC power device terminal, to solve the problems of the prior art.
As the first aspect of the invention, a kind of SiC power device terminal is provided, wherein the SiC power device is whole
End includes: the cathode metal layer set gradually from bottom to top, the first conductivity type substrate layer and the first conductive type epitaxial layer, institute
It states and is provided with the second discrete conduction type field limiting ring of multiple intervals, first conduction type on the first conductive type epitaxial layer
The second discrete conduction type well region of multiple intervals is provided on epitaxial layer, the second conduction type well region is led with described second
Electric type field limiting ring is arranged alternately, and passivation is arranged on the second conduction type well region and the second conduction type field limiting ring
Layer.
Preferably, the depth of the second conduction type well region is greater than the depth of the second conduction type field limiting ring.
Preferably, the impurity concentration of the second conduction type well region is lower than the impurity of the second conduction type field limiting ring
Concentration.
Preferably, the second conduction type well region and the second conduction type field limiting ring lap region are arranged.
Preferably, the second conduction type well region is separated and is disposed adjacent with the second conduction type field limiting ring.
Preferably, oxide protective layer is arranged in the upper surface of first conductive type epitaxial layer.
Preferably, SiC power device includes N-type SiC power device and p-type SiC power device, when the SiC power device
When part is N-type power device, first conduction type is N-type, and second conduction type is p-type, when the SiC power device
When part is p-type SiC power device, first conduction type is p-type, and second conduction type is N-type.
As the second aspect of the invention, a kind of production method of SiC power device terminal is provided, which is characterized in that
The production method of the SiC power device terminal includes:
The first conductivity type substrate is provided, one conductive type epitaxial layer of growth regulation in first conductivity type substrate；
One layer of protection oxide layer is deposited in the upper surface of first conductive type epitaxial layer；
The first photoresist is deposited in the upper surface of the protection oxide layer, then selectivity is outside first conduction type
Prolong and inject second the first concentration of impurities of conduction type in layer, the second conduction type well region is formed according to photoetching process；
The second photoresist is deposited in the upper surface of the protection oxide layer, then selectivity is outside first conduction type
Prolong and inject second the second concentration of impurities of conduction type in layer, the second conduction type field limiting ring is formed according to photoetching process；
Cathode metal layer is formed in the lower surface deposited metal of first conductivity type substrate；
In the upper surface of the protection oxide layer by etching deposit passivation layer, SiC power device terminal is made.
Preferably, the photoetching site portion of the photoetching position of second photoresist and first photoresist overlapping is set
It sets.
Preferably, it the photoetching position of second photoresist and the separation of the photoetching position of first photoresist and adjacent sets
It sets.
SiC power device terminal provided by the invention, in the second conduction type field limiting ring interval or the second conduction type field
Several the second conduction type well regions are increased in limit ring, in pressure-resistant situation, the second conduction type well region plays adjustment electric field
The effect of distribution, under same homalographic, the field limiting ring structure after adjusting electric field can share more voltages, also, first is miscellaneous
The injection of matter concentration and the second impurity concentration to surface of SiC, resulting injection ion spread ill effect, can adulterate mutually
To inside the second conduction type well region and the second conduction type field limiting ring, thus bring unstability is eliminated.Thus, this hair
The SiC power device terminal of bright offer has high reliablity and can be improved the advantage of product qualification rate.
Detailed description of the invention
The drawings are intended to provide a further understanding of the invention, and constitutes part of specification, with following tool
Body embodiment is used to explain the present invention together, but is not construed as limiting the invention.In the accompanying drawings:
Fig. 1 is a kind of structural schematic diagram of SiC power device terminal provided by the invention.
Fig. 2 is another structural schematic diagram of SiC power device terminal provided by the invention.
Fig. 3 is the first conductivity type substrate provided by the invention, the first conductivity type substrate epitaxial layer and oxide protective layer
Schematic cross-sectional view.
Fig. 4 is the schematic cross-sectional view of the second conduction type well region provided by the invention.
Fig. 5 is that the second conduction type well region provided by the invention and the second conduction type field limiting ring partly overlap the cuing open of setting
Depending on structural schematic diagram.
Fig. 6 the second conduction type well region provided by the invention and the second conduction type field limiting ring are separated and are disposed adjacent
Schematic cross-sectional view.
Fig. 7 is the production method flow chart of SiC power device terminal provided by the invention.
Specific embodiment
Below in conjunction with attached drawing, detailed description of the preferred embodiments.It should be understood that this place is retouched
The specific embodiment stated is merely to illustrate and explain the present invention, and is not intended to restrict the invention.
As the first aspect of the invention, a kind of SiC power device terminal is provided, wherein as shown in Figure 1, the SiC
Power device terminal includes: the cathode metal layer 1 set gradually from bottom to top, the first conductivity type substrate layer 2 and the first conduction
Type epitaxial layer 3 is provided with the second discrete conduction type field limiting ring 5 of multiple intervals on first conductive type epitaxial layer 3,
The second discrete conduction type well region 4 of multiple intervals, second conductive-type are provided on first conductive type epitaxial layer 3
Type well region 4 is arranged alternately with the second conduction type field limiting ring 5, the second conduction type well region 4 and second conduction
Passivation layer 7 is set on type field limiting ring 5.
SiC power device terminal provided by the invention, in the second conduction type field limiting ring interval or the second conduction type field
Several the second conduction type well regions are increased in limit ring, in pressure-resistant situation, the second conduction type well region plays adjustment electric field
The effect of distribution, under same homalographic, the field limiting ring structure after adjusting electric field can share more voltages, also, first is miscellaneous
The injection of matter concentration and the second impurity concentration to surface of SiC, resulting injection ion spread ill effect, can adulterate mutually
To inside the second conduction type well region and the second conduction type field limiting ring, thus bring unstability is eliminated.Thus, this hair
The SiC power device terminal of bright offer has high reliablity and can be improved the advantage of product qualification rate.
Specifically, as shown in Figure 1, the depth of the second conduction type well region 4 is limited greater than second conduction type field
The depth of ring 5.
Specifically, the impurity concentration of the second conduction type well region 4 is miscellaneous lower than the second conduction type field limiting ring 5
Matter concentration.
As a kind of specifically embodiment, as shown in Figure 1, the second conduction type well region 4 and second conduction
The setting of 5 lap region of type field limiting ring.
As another specifically embodiment, as shown in Fig. 2, the second conduction type well region 4 is led with described second
Electric type field limiting ring 5 is separated and is disposed adjacent.
It should be understood that Fig. 1 and Fig. 2 is two kinds of tools of the second conduction type well region 4 and the second conduction type field limiting ring 5
The embodiment of body, no matter the second conduction type well region 4 is overlapped or is separated with the second conduction type field limiting ring 5
And be disposed adjacent, the second conduction type well region 4 can play the role of adjusting field distribution.
Specifically, as shown in figure 3, oxide protective layer 6 is arranged in the upper surface of first conductive type epitaxial layer 3.
Preferably, SiC power device includes N-type SiC power device and p-type SiC power device, when the SiC power device
When part is N-type power device, first conduction type is N-type, and second conduction type is p-type, when the SiC power device
When part is p-type SiC power device, first conduction type is p-type, and second conduction type is N-type.
It should be noted that the specific embodiment of SiC power device provided by the invention is N with the first conduction type
Type, second conduction type are to illustrate for p-type.
As the second aspect of the invention, a kind of production method of SiC power device terminal is provided, wherein such as Fig. 7 institute
Show, the production method of the SiC power device terminal includes:
S110, the first conductivity type substrate is provided, in first conductivity type substrate outside one conduction type of growth regulation
Prolong layer；
S120, one layer of protection oxide layer is deposited in the upper surface of first conductive type epitaxial layer；
S130, the first photoresist is deposited in the upper surface of the protection oxide layer, then selectivity is conductive described first
Second the first concentration of impurities of conduction type is injected in type epitaxial layer, and the second conduction type well region is formed according to photoetching process；
S140, the second photoresist is deposited in the upper surface of the protection oxide layer, then selectivity is conductive described first
Second the second concentration of impurities of conduction type is injected in type epitaxial layer, and the second conduction type field limiting ring is formed according to photoetching process；
S150, the lower surface deposited metal formation cathode metal layer in first conductivity type substrate；
S160, pass through etching deposit passivation layer, obtained SiC power device terminal in the upper surface of the protection oxide layer.
The production method of SiC power device terminal provided by the invention, at the second conduction type field limiting ring interval or second
Several the second conduction type well regions are increased in conduction type field limiting ring, in pressure-resistant situation, the second conduction type well region is risen
To the effect of adjustment field distribution, under same homalographic, the field limiting ring structure after adjusting electric field can share more voltages, and
And first injection to surface of SiC of impurity concentration and the second impurity concentration, resulting injection ion spread ill effect,
It can be doped to mutually inside the second conduction type well region and the second conduction type field limiting ring, it is unstable to eliminate thus bring
Property.
Preferably, the photoetching site portion of the photoetching position of second photoresist and first photoresist overlapping is set
It sets.
Preferably, it the photoetching position of second photoresist and the separation of the photoetching position of first photoresist and adjacent sets
It sets.
Below with reference to Fig. 1 to Fig. 6 to the specific implementation process of the production method of SiC power device terminal provided by the invention
It is described in detail.The specific embodiment of the production method of SiC power device terminal is using the first conduction type as N-type, and second
Conduction type be p-type for illustrate.
As a kind of specifically embodiment, as shown in figure 3, using epitaxy technique, in the upper table of silicon carbide N type substrate 2
Wheat flour obtains silicon carbide N type epitaxial layer 3, and one layer of protection oxide layer 6 is then deposited on silicon carbide N type epitaxial layer 3；
As shown in figure 4, after using photoetching process, selective high-energy injecting p-type impurity, the step for be to form P
Type well region 4, specific width and spacing can be adjusted according to specific example, in this example, doping concentration be 2E17~
6E17, deep 0.5~1um；
As shown in figure 5, reuse photoetching process, selective low energy injecting p-type impurity, the step for be to be formed
P-type field limiting ring 5, the step for photoetching position and the P type trap zone 4 partly overlap, specific overlap length and duty length can
To be adjusted according to specific example, in this example, the overlap length used is 2um, and doping concentration is 3E17~8E17, so
After carry out high annealing, form P type trap zone 4 and p-type field limiting ring 5；
As shown in Figure 1, being thinned by back and forming cathodic metal 1 in device lower surface deposited metal, then in device
Part upper surface forms passivation layer 7 by the way that etching is redeposited, finally prepares SiC power diode terminal.
As another specifically embodiment, as shown in figure 3, using epitaxy technique, in the upper of silicon carbide N type substrate 2
Silicon carbide N type epitaxial layer 3 is made in surface, and one layer of protection oxide layer 6 is then deposited on silicon carbide N type epitaxial layer 3；
As shown in figure 4, after using photoetching process, selective high-energy injecting p-type impurity, the step for be to form P
Type well region 4, specific width and spacing can be adjusted according to specific example, in this example, doping concentration be 2E17~
6E17, deep 0.5~1um；
As shown in fig. 6, reuse photoetching process, selective low energy injecting p-type impurity, the step for be to be formed
P-type field limiting ring 5, the step for photoetching position and previous step be separated from each other, specific width can be adjusted according to specific example,
In this example, then the doping concentration used carries out high annealing for 2E17~8E17, forms P type trap zone 4 and p-type field
Limit ring 5；
As shown in Fig. 2, being thinned by back and forming cathodic metal 1 in device lower surface deposited metal, then in device
Part upper surface forms passivation layer 7 by the way that etching is redeposited, finally prepares SiC power diode terminal.
It should be noted that having used photoetching process to form P type trap zone 4 and p-type field limiting ring 5, it is possible to understand that
, as shown in Figure 4 and Figure 5, to form the first photoresist 8 that P type trap zone 4 uses, Fig. 6 is to form the use of p-type field limiting ring 5
The second photoresist 9 arrived, it will also be appreciated that not due to the P type trap zone 4 of formation and the position of p-type field limiting ring 5 and depth
Identical, therefore, the photoetching position and photoetching time etc. of the first photoresist 8 and the second photoresist 9 are had any different.
SiC power device terminal made from the production method of SiC power device terminal provided by the invention is carrying out pressure resistance
When, P type trap zone can effectively change surface electric field distribution, improve the utilization rate of field limiting ring, improve device under same homalographic
Pressure resistance；And P type trap zone can be adjusted effectively in p-type field limiting ring manufacturing process, spread feelings caused by injecting ion in SiC
Condition improves the reliability of terminal；The double implantation structure of P type trap zone and p-type field limiting ring, improves terminal to the fault-tolerant of technique
Rate.
Therefore, SiC power device terminal provided by the invention, by original p-type field limiting ring interval or p-type field limiting ring
Several P type trap zones are increased, in pressure-resistant situation, P type trap zone plays the role of adjusting field distribution, under same homalographic,
Field limiting ring structure after adjustment electric field can share more voltages.Also, the first impurity concentration and the second impurity concentration are to SiC
The injection on surface, resulting injection ion spread ill effect, can be doped to mutually inside P type trap zone and p-type field limiting ring,
Eliminate thus bring unstability.
The production method of SiC power device terminal provided by the invention, adjusts by using the mode injected twice, solves
In the prior art since the situation that deviation causes effect unstable, when P type trap zone implantation concentration is too low, P occurs in injection effect
The failure of type well region, has p-type field limiting ring to play partial pressure；When p-type field limiting ring implantation concentration is too low, p-type field limiting ring failure, by p-type
Well region plays the role of the partial pressure of field limiting ring.In addition, the structure of the SiC power device terminal as made from the production method can be used
In silicon carbide diode and MOSFET structure.
It is understood that the principle that embodiment of above is intended to be merely illustrative of the present and the exemplary implementation that uses
Mode, however the present invention is not limited thereto.For those skilled in the art, essence of the invention is not being departed from
In the case where mind and essence, various changes and modifications can be made therein, these variations and modifications are also considered as protection scope of the present invention.
Claims (10)
1. a kind of SiC power device terminal, which is characterized in that the SiC power device terminal includes: to set gradually from bottom to top
Cathode metal layer (1), the first conductivity type substrate layer (2) and the first conductive type epitaxial layer (3), first conduction type
The second discrete conduction type field limiting ring (5) of multiple intervals, first conductive type epitaxial layer are provided on epitaxial layer (3)
(3) it is provided with discrete the second conduction type well region (4) in multiple intervals on, the second conduction type well region (4) and described the
Two conduction type field limiting rings (5) are arranged alternately, the second conduction type well region (4) and the second conduction type field limiting ring
(5) passivation layer (7) are set on.
2. SiC power device terminal according to claim 1, which is characterized in that the second conduction type well region (4)
Depth is greater than the depth of the second conduction type field limiting ring (5).
3. SiC power device terminal according to claim 1, which is characterized in that the second conduction type well region (4)
Impurity concentration is lower than the impurity concentration of the second conduction type field limiting ring (5).
4. SiC power device terminal according to claim 1, which is characterized in that the second conduction type well region (4) with
Second conduction type field limiting ring (5) the lap region setting.
5. SiC power device terminal according to claim 1, which is characterized in that the second conduction type well region (4) with
The second conduction type field limiting ring (5) separates and is disposed adjacent.
6. SiC power device terminal as claimed in any of claims 1 to 5, which is characterized in that described first is conductive
Oxide protective layer (6) are arranged in the upper surface of type epitaxial layer (3).
7. SiC power device terminal as claimed in any of claims 1 to 5, which is characterized in that SiC power device
Including N-type SiC power device and p-type SiC power device, when the SiC power device is N-type power device, described first
Conduction type is N-type, and second conduction type is p-type, described when the SiC power device is p-type SiC power device
First conduction type is p-type, and second conduction type is N-type.
8. a kind of production method of SiC power device terminal, which is characterized in that the production method of the SiC power device terminal
Include:
The first conductivity type substrate is provided, one conductive type epitaxial layer of growth regulation in first conductivity type substrate；
One layer of protection oxide layer is deposited in the upper surface of first conductive type epitaxial layer；
The first photoresist is deposited in the upper surface of the protection oxide layer, then selectivity is in first conductive type epitaxial layer
Second the first concentration of impurities of conduction type of interior injection forms the second conduction type well region according to photoetching process；
The second photoresist is deposited in the upper surface of the protection oxide layer, then selectivity is in first conductive type epitaxial layer
Second the second concentration of impurities of conduction type of interior injection forms the second conduction type field limiting ring according to photoetching process；
Cathode metal layer is formed in the lower surface deposited metal of first conductivity type substrate；
In the upper surface of the protection oxide layer by etching deposit passivation layer, SiC power device terminal is made.
9. the production method of SiC power device terminal according to claim 8, which is characterized in that second photoresist
Photoetching position and the photoetching site portion of first photoresist overlap.
10. the production method of SiC power device terminal according to claim 8, which is characterized in that second photoresist
Photoetching position and first photoresist photoetching position separation and be disposed adjacent.
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| CN110098110A (en) * | 2019-05-10 | 2019-08-06 | 上海瞻芯电子科技有限公司 | Semiconductor devices and forming method thereof |
| WO2021007973A1 (en) * | 2019-07-18 | 2021-01-21 | 东南大学 | Terminal protection structure for trench-type semiconductor power device, and power device |
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| CN108288641A (en) * | 2018-04-08 | 2018-07-17 | 无锡新洁能股份有限公司 | A kind of power semiconductor terminal structure and its manufacturing method |
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| CN103824879A (en) * | 2014-01-30 | 2014-05-28 | 株洲南车时代电气股份有限公司 | Power device junction terminal structure and manufacturing method thereof |
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