CN108231866B - Silicon carbide Schottky diode structure capable of improving surge capacity and preparation method thereof - Google Patents
Silicon carbide Schottky diode structure capable of improving surge capacity and preparation method thereof Download PDFInfo
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 title claims abstract description 40
- 229910010271 silicon carbide Inorganic materials 0.000 title claims abstract description 40
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 238000002347 injection Methods 0.000 claims abstract description 27
- 239000007924 injection Substances 0.000 claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 11
- 238000002513 implantation Methods 0.000 claims description 38
- 238000005468 ion implantation Methods 0.000 claims description 17
- 238000000034 method Methods 0.000 claims description 16
- 238000004519 manufacturing process Methods 0.000 claims description 12
- 239000007943 implant Substances 0.000 claims description 8
- 230000000873 masking effect Effects 0.000 description 9
- 230000000903 blocking effect Effects 0.000 description 4
- 230000005684 electric field Effects 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 239000004065 semiconductor Substances 0.000 description 3
- 230000015556 catabolic process Effects 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000009826 distribution Methods 0.000 description 2
- 239000000969 carrier Substances 0.000 description 1
- 239000003989 dielectric material Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002955 isolation Methods 0.000 description 1
- 230000005855 radiation Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 238000004088 simulation Methods 0.000 description 1
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66053—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide
- H01L29/6606—Multistep manufacturing processes of devices having a semiconductor body comprising crystalline silicon carbide the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
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Abstract
The invention discloses a silicon carbide Schottky diode structure for improving surge capacity and a preparation method thereof, wherein the diode structure comprises a first conduction type silicon carbide substrate, a drift layer, an anode electrode and a cathode electrode, wherein the drift layer is positioned on the silicon carbide substrate, and the surface of the drift layer is provided with a second conduction type main junction; a second conductive type narrow active region, a second conductive type shallow doped region, a second conductive type narrow-deep doped region, a second conductive type wide-deep doped region and a second conductive type active injection region are arranged on one side of the main junction; a second conductive type terminal injection region is arranged on the other side of the main junction; the widths of the second conduction type narrow active region, the second conduction type shallow doped region, the second conduction type narrow-deep doped region and the second conduction type wide-deep doped region are increased in sequence. The structure can avoid the reduction of the surge capacity of the device caused by the concentration of surge current on the main junction, and improve the surge resistance of the device.
Description
Technical Field
The invention belongs to the field of semiconductors and power semiconductors, and particularly relates to a silicon carbide Schottky diode structure capable of improving surge capacity and a preparation method thereof.
Background
Compared with other semiconductor materials such as silicon, the silicon carbide material has the advantages of wider forbidden band width, higher critical breakdown electric field, higher saturation drift velocity and higher thermal conductivity. Due to the characteristics of the excellent materials, the SiC device has extremely wide application prospect in the fields of high frequency, high temperature resistance, radiation resistance and the like. The silicon carbide Schottky diode has high breakdown voltage, high current density, high working frequency and wide development prospect. One of the major bottlenecks faced by current silicon carbide schottky diodes is how to improve the surge and avalanche capabilities of the devices.
In order to realize higher blocking performance of the device, the silicon carbide Schottky diode realizes a P-type doped region on the surface of an active region by an ion implantation method, a surface electric field is reduced by a pinch-off effect, and meanwhile, forward voltage drop generated by surge current is reduced by conduction of the P-type implanted region, so that the anti-surge capacity of the device is improved, and the device is prevented from being burnt. Simulation proves that the larger the width of the P-type doped region is, the lower the PN junction starting voltage is; the lower the surface doping concentration of the P-type doping region is, the higher the PN junction turn-on voltage is.
In order to ensure that the electric field distribution conditions of the active region and the terminal protection region of the device are relatively independent, the width of the main junction is far larger than that of the P-type doped region in the active region. With the increase of forward voltage, the main junction part is firstly started, and as minority carriers are involved in the conduction, the conduction current of the device is rapidly increased, so that most surge current of the device is concentrated on the main junction part, and meanwhile, the main junction part is only partially metallized, and the over-concentrated surge current can cause the device to be burnt. The P-type region in the active region has too high PN junction conduction voltage due to small width, and cannot play a role in anti-surge.
Disclosure of Invention
The purpose of the invention is as follows: aiming at the problems in the prior art, the invention discloses a silicon carbide Schottky diode structure capable of improving surge capacity and a preparation method thereof, aiming at avoiding the reduction of the surge capacity of a device caused by the concentration of surge current on a main junction, simultaneously greatly improving the blocking effect of the main junction and the adjacent region on the current, further avoiding the reduction of avalanche tolerance caused by the over-concentration of avalanche current in the main junction region and improving the avalanche resistance of the device.
The technical scheme is as follows: the invention adopts the following technical scheme:
the invention discloses a silicon carbide Schottky diode structure capable of improving surge capacity, which comprises a first conduction type silicon carbide substrate (1), a drift layer (2) positioned on the silicon carbide substrate, an anode electrode (13) and a cathode electrode (14), wherein the surface of the drift layer is provided with a second conduction type main junction (11); a second conductive type narrow active region (5), a second conductive type shallow doped region (6), a second conductive type narrow-deep doped region (7), a second conductive type wide-deep doped region (8) and a second conductive type active injection region (9) are arranged on one side of the main junction (11); a second conductive type terminal injection region (10) is arranged on the other side of the main junction (11); the width of the second conduction type narrow active region (5) is smaller than that of the second conduction type shallow doped region (6); the depth of the second conduction type narrow active region (5) is equal to the depth of the second conduction type shallow doped region (6); the width of the second conduction type shallow doped region (6) is smaller than that of the second conduction type narrow-deep doped region (7); the depth of the second conduction type shallow doped region (6) is less than that of the second conduction type narrow-deep doped region (7); the width of the second conduction type narrow-deep doped region (7) is smaller than that of the second conduction type wide-deep doped region (8); the depth of the second conductivity type narrow-deep doped region (7) is equal to the depth of the second conductivity type wide-deep doped region (8).
The number of the second conduction type active injection regions (9) is multiple, and the widths and the intervals of the second conduction type active injection regions (9) are consistent.
The surface doping concentration of the second conduction type narrow active region (5), the second conduction type shallow doping region (6), the second conduction type narrow-deep doping region (7), the second conduction type wide-deep doping region (8) and the main junction (11) is higher than the internal doping concentration; the surface doping concentration of the second conduction type narrow active region (5), the second conduction type shallow doping region (6), the second conduction type narrow-deep doping region (7), the second conduction type wide-deep doping region (8) and the main junction (11) is lower than that of the second conduction type active injection region (9).
The second conduction type terminal injection region (10) is doped with low concentration; the second conductivity type active implantation region (9) is highly doped.
Preferably, an open slot is formed in the surface of the main node (11), and the bottom of the open slot is a concave surface; the depth of the open trench is less than 1/2 of the main junction implantation depth.
On the other hand, the invention discloses a preparation method of a silicon carbide Schottky diode for improving surge capacity, which comprises the following steps:
(S1) growing a first conductivity type drift layer (2) on the first conductivity type silicon carbide substrate (1);
(S2) manufacturing a first injection mask medium (3) on the surface of the drift layer (2);
(S3) manufacturing a second injection mask medium (4) on the surface of the drift layer (2);
(S4) forming a second conductive type main junction (11), a second conductive type narrow active region (5), a second conductive type shallow doped region (6), a second conductive type narrow-deep doped region (7), a second conductive type wide-deep doped region (8) by an ion implantation process;
(S5) removing the first implantation mask dielectric (3) and the second implantation mask dielectric (4);
(S6) manufacturing a third implantation mask medium (19) on the surface of the drift layer (2);
(S7) forming a second conductive type terminal implantation region (10) by an ion implantation process;
(S8) removing the implantation mask dielectric (19);
(S9) manufacturing a fourth injection mask medium (12) on the surface of the drift layer (2);
(S10) forming a second conductive type active implantation region (9) through an ion implantation process;
(S11) removing the implantation mask dielectric (12);
(S12) an anode electrode (13) and a cathode electrode (14) are produced.
The step (S11), after removing the implantation mask medium (12), further comprises the steps of:
a groove is dug and etched on the surface of the main joint (11) to form an open groove; the bottom of the open slot is a concave surface; the depth of the open trench is less than 1/2 of the main junction implantation depth.
The surface doping concentration of the second conduction type narrow active region (5), the second conduction type shallow doping region (6), the second conduction type narrow-deep doping region (7), the second conduction type wide-deep doping region (8) and the main junction (11) is higher than the internal doping concentration; the surface doping concentration of the second conduction type narrow active region (5), the second conduction type shallow doping region (6), the second conduction type narrow-deep doping region (7), the second conduction type wide-deep doping region (8) and the main junction (11) is lower than that of the second conduction type active injection region (9).
Has the advantages that: when the device is conducted in the forward direction, the surge capacity of the device is particularly important, and when a large amount of current is instantaneously injected into the device by an inductor, the voltage drop of the device cannot be too high. In the diode structure disclosed by the invention, the second conductive type terminal injection region 10 is low-doped, and the surface doping concentration of the main junction 11 is higher than the internal doping concentration thereof but lower than the doping concentration of the second conductive type active injection region 9. Therefore, the conduction voltage is higher, so that the surge current cannot pass through, and the main junction cannot bear the surge current. All surge current is completed by the P-type doped region in the active region; four regions 5, 6, 7 and 8 with low surface doping are designed simultaneously, similar to a main junction, the surface doping concentration of the regions 5, 6, 7 and 8 is higher than the internal doping concentration thereof but lower than the doping concentration of the second conductive type active injection region 9, the surge starting voltage of the regions 5, 6, 7 and 8 is higher than the second conductive type active injection region 9, so that the region 9 is firstly opened during surge so that surge current is mainly conducted by the region 9, and the uniformity of the surge current is improved. In addition, the doping concentration of the region 10 and the region 11 is set to make the resistance of the main junction and the nearby region larger, so that the avalanche current of the main junction region is prevented from concentrating on the edge of the anode 13, and meanwhile, the avalanche current is further moved to the inside of the active region by the setting of the region 5, so that the avalanche resistance of the device is improved.
Drawings
FIG. 1 is a schematic diagram of a device material structure;
FIG. 2 is a schematic view of a first implantation of a masking medium;
FIG. 3 is a schematic view of a second implantation of a masking medium;
fig. 4 is a schematic view of a first ion implantation;
FIG. 5 is a schematic view of the removal of the masking medium after the first ion implantation;
FIG. 6 is a schematic view of a third implantation of a masking medium;
FIG. 7 is a schematic diagram of a second ion implantation;
FIG. 8 is a schematic view of the removal of the masking medium after the second ion implantation;
FIG. 9 is a schematic view of a fourth implantation of a masking medium;
fig. 10 is a schematic view of a third ion implantation;
FIG. 11 is a schematic view of the third ion implantation followed by removal of the masking dielectric and fabrication of the cathode;
FIG. 12 is a schematic view of the structure after fabrication of the anode;
fig. 13 is a doping profile of the main junction and second conductivity type narrow active region (5), the second conductivity type shallow doped region (6), the second conductivity type narrow-deep doped region (7), the second conductivity type wide-deep doped region (8);
fig. 14 is a doping profile of a second conductivity type terminal implanted region;
fig. 15 is a doping profile of a second conductivity type active implant region;
FIG. 16 is a schematic view showing a structure of an open groove in embodiment 2;
FIG. 17 is a schematic view of a diode structure of embodiment 2;
FIG. 18 is a schematic sectional view of the bottom of an open groove in example 2.
Detailed Description
The invention is further elucidated with reference to the drawings and the detailed description.
Example 1:
in order to avoid the reduction of the surge capacity of the device caused by the concentration of surge current on a main junction, improve the blocking effect of the main junction and the area nearby the main junction on the current, avoid the reduction of avalanche tolerance of the main junction area caused by the over concentration of avalanche current and improve the avalanche resistance of the device, the invention discloses a silicon carbide Schottky diode structure, as shown in figure 12, comprising a first conductive type silicon carbide substrate 1, a drift layer 2 positioned on the silicon carbide substrate, an anode electrode 13 and a cathode electrode 14, wherein the surface of the drift layer is provided with a second conductive type main junction 11; a second conductive type narrow active region 5, a second conductive type shallow doped region 6, a second conductive type narrow-deep doped region 7, a second conductive type wide-deep doped region 8 and a second conductive type active injection region 9 are arranged on one side of the main junction 11; a second conductive-type terminal implant region 10 is disposed at the other side of the main junction 11.
When the device is conducted in the forward direction, the main junction part is firstly started along with the increase of forward voltage, and in order to ensure that the surge starting of the second conduction type doped region near the main junction is later than the inside of the active region, the width of the second conduction type narrow active region 5 is smaller than that of the second conduction type shallow doped region 6; the depth of the second conductive type narrow active region 5 is equal to the depth of the second conductive type shallow doped region 6; the width of the second conductive type shallow doped region 6 is smaller than that of the second conductive type narrow-deep doped region 7; the depth of the second conductive type shallow doped region 6 is less than that of the second conductive type narrow-deep doped region 7; the width of the second conductive type narrow-deep doped region 7 is smaller than that of the second conductive type wide-deep doped region 8; the depth of the second conductive-type narrow-deep doped region 7 is equal to the depth of the second conductive-type wide-deep doped region 8. Thus, the surge turn-on voltage of the second conductivity type narrow active region 5 is higher than that of the second conductivity type shallow doped region 6; the surge start voltage of the second conductivity type shallow doped region 6 is higher than that of the second conductivity type narrow-deep doped region 7; the surge turn-on voltage of the second conductivity type narrow-deep doped region 7 is higher than that of the second conductivity type wide-deep doped region 8. By the isolation of the doped regions 5, 6, 7 and 8, it is avoided that the main junction is opened due to excessive current below the main junction 11.
The optimal width of the region 5 is between 0.5 μm and 1.5 μm; the optimal width of the region 6 is between 1 μm and 2.5 μm; the optimal width of the region 7 is between 1 μm and 3 μm; the optimal width of the region 8 is between 1.5 μm and 4.5 μm; the optimum width of the region 9 is between 1.5 μm and 4.5 μm.
In order to reduce the on-resistance of the PN junction and improve the surge capability, the surface doping concentrations of the second conductivity type narrow active region 5, the second conductivity type shallow doped region 6, the second conductivity type narrow-deep doped region 7, the second conductivity type wide-deep doped region 8 and the main junction 11 are higher than the internal doping concentration thereof and lower than the doping concentration of the second conductivity type active implantation region (9), and the doping concentration curve is shown in fig. 13, wherein the ion implantation depth of the surface highly doped region 15 is less than 0.4 μm, and the doping concentration is higher than 5e18cm-3The doping concentration of the inner lowly doped region 16 is lower than 5e18cm-3。
The number of the second conductive type active injection regions 9 is multiple, and the widths and the intervals of the second conductive type active injection regions 9 are consistent; thus, the uniformity of the electric field intensity distribution on the surface of the device in the blocking state can be ensured.
The second conductivity type terminal implantation region 10 is doped with a low concentration, the profile of the doping concentration is shown in FIG. 14, and the doping concentration of the low doped region 17 is lower than that of 5e18cm-3(ii) a The second conductivity type active implant region 9 is heavily doped, the profile of the doping concentration is shown in fig. 15, and the doping concentration of the heavily doped region 18 is higher than the surface doping concentration of the regions 5-8 and the main junction 11.
The preparation method of the silicon carbide Schottky diode comprises the following steps:
(S1) growing a first conductive-type drift layer 2 on the first conductive-type silicon carbide substrate 1, as shown in fig. 1;
(S2) forming a first implantation mask dielectric 3 on the surface of the drift layer 2, as shown in fig. 2;
(S3) forming a second implantation mask dielectric 4 on the surface of the drift layer 2, as shown in fig. 3;
(S4) forming a second conductive type main junction 11, a second conductive type narrow active region 5, a second conductive type shallow doped region 6, a second conductive type narrow-deep doped region 7, a second conductive type wide-deep doped region 8 through an ion implantation process, as shown in fig. 4; the doping concentration profiles of the regions 5, 6, 7, 8, 11 are shown in fig. 13;
(S5) removing the first and second implantation mask dielectrics 3 and 4, as shown in fig. 5;
as can be seen from fig. 3 and 4, the regions 5, 6, 7, 8 are made together. Since the surfaces of regions 5, 6 have masking medium 3 and there is a removal step in step (S5), the highly doped portions of the surfaces of regions 5, 6 are removed, while the surfaces of regions 7, 8 are not implanted with masking medium and thus include highly doped, low doped portions. However, the surface doping concentration of the regions 7 and 8 is still lower than that of the region 9, so that the region 9 is turned on first in the event of a surge.
(S6) forming a third implantation mask dielectric 19 on the surface of the drift layer 2, as shown in fig. 6;
(S7) forming a second conductive-type terminal implantation region 10 by an ion implantation process, as shown in fig. 7, and a doping concentration profile of the region 10 as shown in fig. 14;
(S8) removing the implantation mask dielectric 19, as shown in fig. 8;
(S9) forming a fourth implantation mask medium 12 on the surface of the drift layer 2, as shown in fig. 9;
(S10) forming a second conductive type active implantation region 9 through an ion implantation process as shown in fig. 10, a doping concentration profile of the region 9 as shown in fig. 15;
(S11) removing the implantation mask medium 12, as shown in fig. 11;
(S12) the anode electrode 13 and the cathode electrode 14 were fabricated, and thus the surge capability enhanced silicon carbide schottky diode structure disclosed in the present invention was obtained, as shown in fig. 12.
Example 2:
although the silicon carbide schottky diode structure in example 1 can improve the surge and avalanche capabilities of the device, the avalanche current is still likely to be concentrated in the termination region at the edge of the anode 13. This embodiment further improves it so that the avalanche current moves inside the active region.
In the structure of the silicon carbide schottky diode disclosed in this embodiment, as shown in fig. 17, grooves are etched on the surface of the main junction 11, and then an anode 20 and a cathode 21 are fabricated. The anode electrode 20 also adopts a groove structure on the surface of the main junction 11, so that in an avalanche state, avalanche current is not easily concentrated on the edge of the anode, but moves to the inside of an active region, and uniform avalanche occurs in the active region.
As shown in fig. 16 for the structure of the open grooves 23 of the surface of the main structure 11, the depth 22 of the open grooves is less than 1/2 of the implantation depth D11 of the main structure 11. The bottom of the open channel is concave and the cross-section of the bottom is shown by curve 24 in figure 18. In fig. 18, the curves 25 and 26 are schematic cross-sectional views of a plane and a convex surface, respectively, and the bottom of the open groove 23 should be avoided in this embodiment.
In the method for manufacturing a silicon carbide schottky diode according to embodiment 1, the step (S11) of removing the implantation mask medium 12 further includes the steps of: a groove is dug and etched on the surface of the main joint (11) to form an open groove; the bottom of the open slot is a concave surface; the depth of the open groove is smaller than 1/2 of the main junction injection depth, and then the anode 20 and the cathode 21 are manufactured, namely the method for manufacturing the silicon carbide schottky diode disclosed by the embodiment.
Claims (10)
1. A SiC Schottky diode structure for improving surge capability comprises a first conduction type SiC substrate (1), a drift layer (2) on the SiC substrate, an anode electrode (13) and a cathode electrode (14), and is characterized in that the surface of the drift layer is provided with a second conduction type main junction (11); a second conductive type narrow active region (5), a second conductive type shallow doped region (6), a second conductive type narrow-deep doped region (7), a second conductive type wide-deep doped region (8) and a second conductive type active injection region (9) are arranged on one side of the main junction (11); a second conductive type terminal injection region (10) is arranged on the other side of the main junction (11); the width of the second conduction type narrow active region (5) is smaller than that of the second conduction type shallow doped region (6); the depth of the second conduction type narrow active region (5) is equal to the depth of the second conduction type shallow doped region (6); the width of the second conduction type shallow doped region (6) is smaller than that of the second conduction type narrow-deep doped region (7); the depth of the second conduction type shallow doped region (6) is less than that of the second conduction type narrow-deep doped region (7); the width of the second conduction type narrow-deep doped region (7) is smaller than that of the second conduction type wide-deep doped region (8); the depth of the second conductivity type narrow-deep doped region (7) is equal to the depth of the second conductivity type wide-deep doped region (8).
2. The improved surge-capability silicon carbide schottky diode structure of claim 1 wherein the second conductivity type active implant regions (9) are plural and the width and the pitch of each second conductivity type active implant region (9) are uniform.
3. The surge capability enhanced silicon carbide schottky diode structure according to claim 1 wherein the surface doping concentrations of the second conductivity type narrow active region (5), the second conductivity type shallow doped region (6), the second conductivity type narrow-deep doped region (7), the second conductivity type wide-deep doped region (8) and the main junction (11) are higher than the internal doping concentration thereof; the surface doping concentration of the second conduction type narrow active region (5), the second conduction type shallow doping region (6), the second conduction type narrow-deep doping region (7), the second conduction type wide-deep doping region (8) and the main junction (11) is lower than that of the second conduction type active injection region (9)) The doping concentration of (a); the internal doping concentration is lower than 5e18cm-3。
4. The surge-capability-improved silicon carbide schottky diode structure according to claim 3, wherein the doping concentration of the second-conductivity-type terminal implant region (10) is less than the doping concentration of the second-conductivity-type active implant region (9); the second conductivity type terminal implantation region (10) has a doping concentration lower than 5e18cm-3。
5. The SiC Schottky diode structure with improved surge capability according to claim 1, wherein the surface of the main junction (11) is provided with an open slot, and the bottom of the open slot is a concave surface.
6. The improved surge capability silicon carbide schottky diode structure of claim 5 wherein the depth of the open trench is less than 1/2 of the main junction implant depth.
7. A method for preparing a silicon carbide Schottky diode capable of improving surge capacity is characterized by comprising the following steps:
(S1) growing a first conductivity type drift layer (2) on the first conductivity type silicon carbide substrate (1);
(S2) manufacturing a first injection mask medium (3) on the surface of the drift layer (2);
(S3) manufacturing a second injection mask medium (4) on the surface of the drift layer (2);
(S4) forming a second conductive type main junction (11), a second conductive type narrow active region (5), a second conductive type shallow doped region (6), a second conductive type narrow-deep doped region (7), a second conductive type wide-deep doped region (8) by an ion implantation process;
(S5) removing the first implantation mask dielectric (3) and the second implantation mask dielectric (4);
(S6) manufacturing a third implantation mask medium (19) on the surface of the drift layer (2);
(S7) forming a second conductive type terminal implantation region (10) by an ion implantation process;
(S8) removing the implantation mask dielectric (19);
(S9) manufacturing a fourth injection mask medium (12) on the surface of the drift layer (2);
(S10) forming a second conductive type active implantation region (9) through an ion implantation process;
(S11) removing the implantation mask dielectric (12);
(S12) an anode electrode (13) and a cathode electrode (14) are produced.
8. The method for preparing a silicon carbide schottky diode with improved surge capability according to claim 7, wherein the step (S11) further comprises the following steps after removing the implantation mask medium (12):
a groove is dug and etched on the surface of the main joint (11) to form an open groove; the bottom of the open slot is a concave surface.
9. The method for preparing the SiC Schottky diode with the improved surge capacity of claim 8, wherein the depth of the open grooves is less than 1/2 of the depth of the main junction implantation.
10. The method for preparing the SiC Schottky diode according to claim 7, wherein the surface doping concentration of the second conduction type narrow active region (5), the second conduction type shallow doping region (6), the second conduction type narrow-deep doping region (7), the second conduction type wide-deep doping region (8) and the main junction (11) is higher than the internal doping concentration; the surface doping concentration of the second conduction type narrow active region (5), the second conduction type shallow doping region (6), the second conduction type narrow-deep doping region (7), the second conduction type wide-deep doping region (8) and the main junction (11) is lower than that of the second conduction type active injection region (9).
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| CN110676308B (en) * | 2019-10-12 | 2022-12-20 | 中国电子科技集团公司第十三研究所 | Preparation method of Schottky diode |
| CN111628007B (en) * | 2020-04-29 | 2023-09-05 | 株洲中车时代半导体有限公司 | Power diode and manufacturing method thereof |
| CN115172470B (en) * | 2022-06-20 | 2023-09-26 | 江苏新顺微电子股份有限公司 | Absorption diode device structure with reverse amplification function and manufacturing method |
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