CN108231866B - Structure and preparation method of silicon carbide Schottky diode with improved surge capability - Google Patents
Structure and preparation method of silicon carbide Schottky diode with improved surge capability Download PDFInfo
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Abstract
本发明公开了一种提高浪涌能力的碳化硅肖特基二极管结构及制备方法,其中二极管结构包括第一导电类型碳化硅衬底、位于碳化硅衬底上的漂移层、阳极电极和阴极电极,漂移层表面具有第二导电类型主结;在主结的一侧设置有第二导电类型窄有源区、第二导电类型浅掺杂区、第二导电类型窄‑深掺杂区、第二导电类型宽‑深掺杂区、第二导电类型有源注入区;在主结的另一侧设置有第二导电类型终端注入区;第二导电类型窄有源区、第二导电类型浅掺杂区、第二导电类型窄‑深掺杂区、第二导电类型宽‑深掺杂区的宽度依次增大。该结构可以避免浪涌电流集中于主结导致器件浪涌能力下降,提高器件抗浪涌能力。
The invention discloses a silicon carbide Schottky diode structure with improved surge capability and a preparation method, wherein the diode structure comprises a silicon carbide substrate of a first conductivity type, a drift layer on the silicon carbide substrate, an anode electrode and a cathode electrode , the surface of the drift layer has a main junction of the second conductivity type; a narrow active region of the second conductivity type, a shallowly doped region of the second conductivity type, a narrow-deeply doped region of the second conductivity type, a Two conductive type wide-deep doped regions and second conductive type active injection regions; a second conductive type terminal injection region is provided on the other side of the main junction; second conductive type narrow active regions, second conductive type shallow The widths of the doped region, the narrow-deep doped region of the second conductivity type, and the wide-deep doped region of the second conductivity type increase in sequence. The structure can prevent the surge current from concentrating on the main junction to reduce the surge capability of the device and improve the surge resistance capability of the device.
Description
技术领域technical field
本发明属于半导体和功率半导体领域,具体涉及一种提高浪涌能力的碳化硅肖特基二极管结构及制备方法。The invention belongs to the field of semiconductors and power semiconductors, and in particular relates to a silicon carbide Schottky diode structure and a preparation method for improving surge capability.
背景技术Background technique
碳化硅材料相比于硅等其他半导体材料,其禁带宽度更宽,临界击穿电场更高,饱和漂移速度和热导率更大。这些优越的材料的特性,使得SiC器件在高频、耐高温和抗辐射等领域具有极其广阔的应用前景。碳化硅肖特基二极管击穿电压高,电流密度大且工作频率高,发展前景十分广泛。目前碳化硅肖特基二极管面临的主要瓶颈之一就是如何提高器件的浪涌和雪崩能力。Compared with other semiconductor materials such as silicon, silicon carbide has a wider band gap, higher critical breakdown electric field, higher saturation drift velocity and thermal conductivity. The characteristics of these superior materials make SiC devices have extremely broad application prospects in the fields of high frequency, high temperature resistance and radiation resistance. Silicon carbide Schottky diodes have high breakdown voltage, high current density and high operating frequency, and have broad development prospects. One of the main bottlenecks facing SiC Schottky diodes is how to improve the surge and avalanche capability of the device.
为了实现较高的器件阻断性能,碳化硅肖特基二极管通过离子注入的方法在有源区表面实现了P型掺杂区,通过夹断作用降低表面电场,同时通过P型注入区的导通降低浪涌电流产生的正向压降,进而提高器件的抗浪涌能力,防止器件烧毁。仿真证明P型掺杂区的宽度越大,PN结开启电压越低;P型掺杂区的表面掺杂浓度越低,则PN结开启电压越高。In order to achieve higher device blocking performance, the SiC Schottky diode realizes a P-type doped region on the surface of the active region by ion implantation, and reduces the surface electric field through the pinch-off effect. By reducing the forward voltage drop generated by the inrush current, the anti-surge capability of the device is improved and the device is prevented from burning. Simulation proves that the larger the width of the P-type doped region, the lower the turn-on voltage of the PN junction; the lower the surface doping concentration of the P-type doped region, the higher the turn-on voltage of the PN junction.
为了保证器件有源区和终端保护区电场分布情况的相对独立,主结宽度远大于有源区内部P型掺杂区宽度。随着正向电压的提高,主结部分最先开启,由于少子参与导电,器件导通电流迅速增大,因此器件大部分的浪涌电流集中在主结部分,同时主结部分只有部分金属化,过于集中的浪涌电流将造成器件烧毁。有源区内部P型区由于宽度较小,PN结导通电压过高,无法起到抗浪涌作用。In order to ensure the relative independence of the electric field distribution between the active region and the terminal protection area of the device, the width of the main junction is much larger than the width of the P-type doped region inside the active region. With the increase of forward voltage, the main junction part is turned on first. Due to the participation of minority carriers in conduction, the on-current of the device increases rapidly, so most of the surge current of the device is concentrated in the main junction part, and the main junction part is only partially metallized , too concentrated inrush current will cause the device to burn out. Due to the small width of the P-type region inside the active region, the conduction voltage of the PN junction is too high, which cannot play a role in anti-surge.
发明内容SUMMARY OF THE INVENTION
发明目的:针对现有技术中的问题,本发明公开了一种提高浪涌能力的碳化硅肖特基二极管结构及制备方法,其目的是为了避免浪涌电流集中于主结导致器件浪涌能力下降,同时可以大幅度提高主结及其附近区域对电流的阻碍作用,进而避免了主结区域由于雪崩电流过于集中引起雪崩耐量下降,提高了器件抗雪崩能力。Purpose of the invention: In view of the problems in the prior art, the present invention discloses a structure and a preparation method of a silicon carbide Schottky diode with improved surge capability. At the same time, it can greatly improve the hindering effect of the main junction and its adjacent areas on the current, thereby avoiding the reduction of the avalanche resistance caused by the excessive concentration of avalanche current in the main junction area, and improving the avalanche resistance of the device.
技术方案:本发明采用如下技术方案:Technical scheme: the present invention adopts the following technical scheme:
本发明一方面公开了一种提高浪涌能力的碳化硅肖特基二极管结构,包括第一导电类型碳化硅衬底(1)、位于碳化硅衬底上的漂移层(2)、阳极电极(13)和阴极电极(14),漂移层表面具有第二导电类型主结(11);在所述主结(11)的一侧设置有第二导电类型窄有源区(5)、第二导电类型浅掺杂区(6)、第二导电类型窄-深掺杂区(7)、第二导电类型宽-深掺杂区(8)、第二导电类型有源注入区(9);在所述主结(11)的另一侧设置有第二导电类型终端注入区(10);所述第二导电类型窄有源区(5)的宽度小于第二导电类型浅掺杂区(6)的宽度;第二导电类型窄有源区(5)的深度等于第二导电类型浅掺杂区(6)的深度;第二导电类型浅掺杂区(6)的宽度小于第二导电类型窄-深掺杂区(7)的宽度;第二导电类型浅掺杂区(6)的深度小于第二导电类型窄-深掺杂区(7)的深度;第二导电类型窄-深掺杂区(7)的宽度小于第二导电类型宽-深掺杂区(8)的宽度;第二导电类型窄-深掺杂区(7)的深度等于第二导电类型宽-深掺杂区(8)的深度。One aspect of the present invention discloses a silicon carbide Schottky diode structure with improved surge capability, comprising a first conductivity type silicon carbide substrate (1), a drift layer (2) on the silicon carbide substrate, an anode electrode ( 13) and a cathode electrode (14), the surface of the drift layer has a second conductivity type main junction (11); on one side of the main junction (11) is provided a second conductivity type narrow active region (5), a second conductivity type A conductive type shallow doped region (6), a second conductive type narrow-deep doped region (7), a second conductive type wide-deep doped region (8), and a second conductive type active implant region (9); A second conductive type terminal implantation region (10) is provided on the other side of the main junction (11); the width of the second conductive type narrow active region (5) is smaller than that of the second conductive type shallowly doped region ( 6) width; the depth of the second conductivity type narrow active region (5) is equal to the depth of the second conductivity type shallowly doped region (6); the width of the second conductivity type shallowly doped region (6) is smaller than that of the second conductivity type The width of the type narrow-deep doped region (7); the depth of the second conductivity type shallowly doped region (6) is less than the depth of the second conductivity type narrow-deep doped region (7); the second conductivity type narrow-deep The width of the doped region (7) is smaller than the width of the second conductivity type wide-deeply doped region (8); the depth of the second conductivity type narrow-deeply doped region (7) is equal to the second conductivity type wide-deeply doped Depth of zone (8).
所述第二导电类型有源注入区(9)为多个,且各第二导电类型有源注入区(9)的宽度一致、间距一致。There are multiple active injection regions (9) of the second conductivity type, and each of the active injection regions (9) of the second conductivity type has a uniform width and a uniform spacing.
所述第二导电类型窄有源区(5)、第二导电类型浅掺杂区(6)、第二导电类型窄-深掺杂区(7)、第二导电类型宽-深掺杂区(8)和主结(11)的表面掺杂浓度高于其内部掺杂浓度;所述第二导电类型窄有源区(5)、第二导电类型浅掺杂区(6)、第二导电类型窄-深掺杂区(7)、第二导电类型宽-深掺杂区(8)和主结(11)的表面掺杂浓度低于第二导电类型有源注入区(9)的掺杂浓度。The second conductive type narrow active region (5), the second conductive type shallowly doped region (6), the second conductive type narrow-deep doped region (7), the second conductive type wide-deeply doped region (8) The surface doping concentration of the main junction (11) is higher than the inner doping concentration; the second conductive type narrow active region (5), the second conductive type shallow doping region (6), the second conductive type narrow active region (5), the second conductive type The conductive type narrow-deeply doped region (7), the second conductive type wide-deeply doped region (8) and the surface doping concentration of the main junction (11) are lower than that of the second conductive type active implant region (9) doping concentration.
所述第二导电类型终端注入区(10)的为低浓度掺杂;第二导电类型有源注入区(9)为高浓度掺杂。The second conductive type terminal implantation region (10) is doped with low concentration; the second conductive type active implantation region (9) is doped with high concentration.
作为一种优选,所述主结(11)表面设置有开口槽,所述开口槽的底部为凹面;所述开口槽的深度小于主结注入深度的1/2。As a preference, an open groove is provided on the surface of the main junction (11), and the bottom of the open groove is a concave surface; the depth of the open groove is less than 1/2 of the injection depth of the main junction.
本发明另一方面公开了一种提高浪涌能力的碳化硅肖特基二极管制备方法,包括如下步骤:Another aspect of the present invention discloses a preparation method of a silicon carbide Schottky diode with improved surge capability, comprising the following steps:
(S1)在第一导电类型碳化硅衬底(1)上生长第一导电类型漂移层(2);(S1) growing a first conductivity type drift layer (2) on the first conductivity type silicon carbide substrate (1);
(S2)在漂移层(2)表面制作第一注入掩膜介质(3);(S2) making a first implantation mask medium (3) on the surface of the drift layer (2);
(S3)在漂移层(2)表面制作第二注入掩膜介质(4);(S3) making a second implantation mask medium (4) on the surface of the drift layer (2);
(S4)通过离子注入工艺形成第二导电类型主结(11)、第二导电类型窄有源区(5)、第二导电类型浅掺杂区(6)、第二导电类型窄-深掺杂区(7)、第二导电类型宽-深掺杂区(8);(S4) forming a second conductive type main junction (11), a second conductive type narrow active region (5), a second conductive type shallowly doped region (6), and a second conductive type narrow-deep doping by an ion implantation process impurity region (7), second conductivity type wide-deeply doped region (8);
(S5)去除第一注入掩膜介质(3)和第二注入掩膜介质(4);(S5) removing the first implanted mask medium (3) and the second implanted mask medium (4);
(S6)在漂移层(2)表面制作第三注入掩膜介质(19);(S6) making a third implantation mask medium (19) on the surface of the drift layer (2);
(S7)通过离子注入工艺形成第二导电类型终端注入区(10);(S7) forming a second conductive type terminal implantation region (10) through an ion implantation process;
(S8)去除注入掩膜介质(19);(S8) removing the implantation mask medium (19);
(S9)在漂移层(2)表面制作第四注入掩膜介质(12);(S9) making a fourth implantation mask medium (12) on the surface of the drift layer (2);
(S10)通过离子注入工艺形成第二导电类型有源注入区(9);(S10) forming an active implantation region (9) of a second conductivity type by an ion implantation process;
(S11)去除注入掩膜介质(12);(S11) removing the implantation mask medium (12);
(S12)制作阳极电极(13)和阴极电极(14)。(S12) An anode electrode (13) and a cathode electrode (14) are fabricated.
步骤(S11)在去除注入掩膜介质(12)后,还包括如下步骤:The step (S11) further includes the following steps after removing the implanted mask medium (12):
在主结(11)的表面挖槽刻蚀,形成开口槽;所述开口槽的底部为凹面;所述开口槽的深度小于主结注入深度的1/2。The surface of the main junction (11) is grooved and etched to form an open groove; the bottom of the open groove is a concave surface; the depth of the open groove is less than 1/2 of the injection depth of the main junction.
所述第二导电类型窄有源区(5)、第二导电类型浅掺杂区(6)、第二导电类型窄-深掺杂区(7)、第二导电类型宽-深掺杂区(8)和主结(11)的表面掺杂浓度高于其内部掺杂浓度;所述第二导电类型窄有源区(5)、第二导电类型浅掺杂区(6)、第二导电类型窄-深掺杂区(7)、第二导电类型宽-深掺杂区(8)和主结(11)的表面掺杂浓度低于第二导电类型有源注入区(9)的掺杂浓度。The second conductive type narrow active region (5), the second conductive type shallowly doped region (6), the second conductive type narrow-deep doped region (7), the second conductive type wide-deeply doped region (8) The surface doping concentration of the main junction (11) is higher than the inner doping concentration; the second conductive type narrow active region (5), the second conductive type shallow doping region (6), the second conductive type narrow active region (5), the second conductive type The conductive type narrow-deeply doped region (7), the second conductive type wide-deeply doped region (8) and the surface doping concentration of the main junction (11) are lower than that of the second conductive type active implant region (9) doping concentration.
有益效果:器件正向导通时,其浪涌能力尤为重要,器件在被电感瞬间灌入大量电流时要求器件的压降不能够过高。本发明公开的二极管结构中,第二导电类型终端注入区10为低掺杂,主结11的表面掺杂浓度高于其内部掺杂浓度但低于第二导电类型有源注入区9的掺杂浓度。这样导通电压较高,使得浪涌电流无法通过,主结不会承担浪涌电流。全部的浪涌电流由有源区内部P型掺杂区完成;同时设计了四个表面低掺杂的区域5,6,7和8,同主结类似,区域5,6,7和8的表面掺杂浓度高于其内部掺杂浓度但低于第二导电类型有源注入区9的掺杂浓度,区域5,6,7和8的浪涌开启电压要高于第二导电类型有源注入区9,,所以浪涌时,区域9先打开从而使得浪涌电流主要依靠区域9来导通,提高了浪涌电流的均匀性。此外,区域10和区域11的掺杂浓度的设置使主结及附近区域的电阻较大,避免了主结区域雪崩电流集中于阳极13的边缘,同时区域5的设置将雪崩电流进一步移向有源区内部,提高了器件的抗雪崩能力。Beneficial effects: when the device is conducting in the forward direction, its surge capability is particularly important. When the device is instantaneously flooded with a large amount of current by the inductance, it is required that the voltage drop of the device should not be too high. In the diode structure disclosed in the present invention, the second conductive type
附图说明Description of drawings
图1为器件材料结构示意图;Figure 1 is a schematic diagram of the device material structure;
图2为第一次注入掩膜介质示意图;FIG. 2 is a schematic diagram of the first injection of the mask medium;
图3是第二次注入掩膜介质示意图;FIG. 3 is a schematic diagram of the second injection of the mask medium;
图4是第一次离子注入示意图;4 is a schematic diagram of the first ion implantation;
图5是第一次离子注入后去除掩膜介质示意图;5 is a schematic diagram of removing the mask dielectric after the first ion implantation;
图6是第三次注入掩膜介质示意图;FIG. 6 is a schematic diagram of the third injection of the mask medium;
图7是第二次离子注入示意图;7 is a schematic diagram of the second ion implantation;
图8是第二次离子注入后去除掩膜介质示意图;8 is a schematic diagram of removing the mask dielectric after the second ion implantation;
图9是第四次注入掩膜介质示意图;9 is a schematic diagram of the fourth injection of the mask medium;
图10是第三次离子注入示意图;10 is a schematic diagram of the third ion implantation;
图11是第三次离子注入后去除掩膜介质、并制作阴极示意图;11 is a schematic diagram of removing the mask dielectric and making a cathode after the third ion implantation;
图12是制作阳极后的结构示意图;Fig. 12 is the structural schematic diagram after making the anode;
图13是主结及第二导电类型窄有源区(5)、第二导电类型浅掺杂区(6)、第二导电类型窄-深掺杂区(7)、第二导电类型宽-深掺杂区(8)的掺杂曲线图;Figure 13 shows the main junction and the second conductive type narrow active region (5), the second conductive type shallowly doped region (6), the second conductive type narrow-deep doped region (7), the second conductive type wide- the doping profile of the deeply doped region (8);
图14是第二导电类型终端注入区的掺杂曲线图;FIG. 14 is a doping curve diagram of the second conductivity type terminal implantation region;
图15是第二导电类型有源注入区的掺杂曲线图;15 is a doping graph of the second conductivity type active implant region;
图16是实施例2中开口槽结构示意图;Figure 16 is a schematic view of the structure of the opening slot in Example 2;
图17是实施例2的二极管结构示意图;17 is a schematic diagram of the diode structure of
图18是实施例2中开口槽底部截面形状示意图。FIG. 18 is a schematic diagram of the cross-sectional shape of the bottom of the open groove in Example 2. FIG.
具体实施方式Detailed ways
下面结合附图和具体实施方式,进一步阐明本发明。The present invention will be further explained below in conjunction with the accompanying drawings and specific embodiments.
实施例1:Example 1:
为了避免浪涌电流集中于主结导致器件浪涌能力下降,同时提高主结及其附近区域对电流的阻碍作用,避免主结区域由于雪崩电流过于集中引起雪崩耐量下降,提高了器件抗雪崩能力,本发明公开了一种碳化硅肖特基二极管结构,如图12所示,包括第一导电类型碳化硅衬底1、位于碳化硅衬底上的漂移层2、阳极电极13和阴极电极14,漂移层表面具有第二导电类型主结11;在所述主结11的一侧设置有第二导电类型窄有源区5、第二导电类型浅掺杂区6、第二导电类型窄-深掺杂区7、第二导电类型宽-深掺杂区8、第二导电类型有源注入区9;在所述主结11的另一侧设置有第二导电类型终端注入区10。In order to prevent the surge current from concentrating on the main junction, which leads to the decrease of the surge capability of the device, and at the same time improve the blocking effect of the main junction and its surrounding areas on the current, avoid the avalanche tolerance of the main junction area caused by excessive concentration of avalanche current, and improve the device's avalanche resistance. , the present invention discloses a silicon carbide Schottky diode structure, as shown in FIG. 12 , comprising a
器件正向导通时,随着正向电压的提高,主结部分最先开启,为了保证主结附近的第二导电类型掺杂区浪涌开启晚于有源区的内部,第二导电类型窄有源区5的宽度小于第二导电类型浅掺杂区6的宽度;第二导电类型窄有源区5的深度等于第二导电类型浅掺杂区6的深度;第二导电类型浅掺杂区6的宽度小于第二导电类型窄-深掺杂区7的宽度;第二导电类型浅掺杂区6的深度小于第二导电类型窄-深掺杂区7的深度;第二导电类型窄-深掺杂区7的宽度小于第二导电类型宽-深掺杂区8的宽度;第二导电类型窄-深掺杂区7的深度等于第二导电类型宽-深掺杂区8的深度。这样,第二导电类型窄有源区5的浪涌开启电压高于第二导电类型浅掺杂区6的浪涌开启电压;第二导电类型浅掺杂区6的浪涌开启电压高于第二导电类型窄-深掺杂区7的浪涌开启电压;第二导电类型窄-深掺杂区7的浪涌开启电压高于第二导电类型宽-深掺杂区8的浪涌开启电压。通过掺杂区域5,6,7和8的隔离作用,避免了主结11下方电流过大引起主结开启。When the device is in forward conduction, with the increase of forward voltage, the main junction part is turned on first. The width of the
区域5的最优宽度在0.5μm到1.5μm之间;区域6的最优宽度在1μm到2.5μm之间;区域7的最优宽度在1μm到3μm之间;区域8的最优宽度在1.5μm到4.5μm之间;区域9的最优宽度在1.5μm到4.5μm之间。The optimal width of
为了降低PN结开启的导通电阻,提高浪涌能力,第二导电类型窄有源区5、第二导电类型浅掺杂区6、第二导电类型窄-深掺杂区7、第二导电类型宽-深掺杂区8和主结11的表面掺杂浓度高于其内部掺杂浓度且低于第二导电类型有源注入区(9)的掺杂浓度,掺杂浓度的曲线如图13所示,其中表面高掺杂区15的离子注入深度小于0.4μm,掺杂浓度高于5e18cm-3,内部低掺杂区16的掺杂浓度低于5e18cm-3。In order to reduce the on-resistance when the PN junction is turned on and improve the surge capability, the second conductive type narrow
第二导电类型有源注入区9为多个,且各第二导电类型有源注入区9的宽度一致、间距一致;这样可以保证阻断状态下器件表面电场强度分布的均匀性。There are multiple second conductivity type
第二导电类型终端注入区10的为低浓度掺杂,其掺杂浓度的曲线如图14所示,低掺杂区17的掺杂浓度要低于5e18cm-3;第二导电类型有源注入区9为高浓度掺杂,其掺杂浓度的曲线如图15所示,高掺杂区18的掺杂浓度要高于区域5-8以及主结11的表面掺杂浓度。The second conductivity type terminal implantation region 10 is doped with low concentration, and its doping concentration curve is shown in FIG. 14 .
上述碳化硅肖特基二极管的制备方法,包括如下步骤:The preparation method of the above-mentioned silicon carbide Schottky diode comprises the following steps:
(S1)在第一导电类型碳化硅衬底1上生长第一导电类型漂移层2,如图1所示;(S1) growing the first conductivity
(S2)在漂移层2表面制作第一注入掩膜介质3,如图2所示;(S2) making a first
(S3)在漂移层2表面制作第二注入掩膜介质4,如图3所示;(S3) making a second
(S4)通过离子注入工艺形成第二导电类型主结11、第二导电类型窄有源区5、第二导电类型浅掺杂区6、第二导电类型窄-深掺杂区7、第二导电类型宽-深掺杂区8,如图4所示;区域5、6、7、8、11的掺杂浓度曲线如图13所示;(S4) Forming the second conductive type
(S5)去除第一注入掩膜介质3和第二注入掩膜介质4,如图5所示;(S5) removing the first implanted
由图3和图4可以看出,区域5、6、7、8是一起制作的。由于5、6的表面有掩膜介质3,并且在步骤(S5)中有去除步骤,所以区域5、6表面的高掺部分被去除,而区域7、8表面没有注入掩膜介质,因此包括高掺和低掺部分。但是区域7、8的表面掺杂浓度还是要低于区域9的表面掺杂浓度,所以浪涌时,区域9先打开。As can be seen from Figures 3 and 4, the
(S6)在漂移层2表面制作第三注入掩膜介质19,如图6所示;(S6) making a third
(S7)通过离子注入工艺形成第二导电类型终端注入区10,如图7所示,区域10的掺杂浓度曲线如图14所示;(S7) forming the second conductive type
(S8)去除注入掩膜介质19,如图8所示;(S8) removing the
(S9)在漂移层2表面制作第四注入掩膜介质12,如图9所示;(S9) making a fourth implantation mask medium 12 on the surface of the
(S10)通过离子注入工艺形成第二导电类型有源注入区9,如图10所示,区域9的掺杂浓度曲线如图15所示;( S10 ) forming an
(S11)去除注入掩膜介质12,如图11所示;(S11) removing the
(S12)制作阳极电极13和阴极电极14,至此得到了本发明公开的提高浪涌能力的碳化硅肖特基二极管结构,如图12所示。(S12) The
实施例2:Example 2:
实施例1中的碳化硅肖特基二极管结构虽然可以提高器件的浪涌和雪崩能力,但是在阳极13的边缘,依然较容易引起终端区域雪崩电流的集中。本实施例对其进行进一步改进,使得雪崩电流移向有源区内部。Although the SiC Schottky diode structure in
本实施例公开的碳化硅肖特基二极管结构如图17所示,在主结11表面挖槽刻蚀,之后再制作阳极20和阴极21。阳极电极20在主结11表面同样采用挖槽结构,使得在雪崩状态下,雪崩电流不易集中在阳极的边缘,而是移向有源区内部,使得有源区发生均匀雪崩。The structure of the SiC Schottky diode disclosed in this embodiment is shown in FIG. 17 . The surface of the
如图16为主结11表面的开口槽23的结构,开口槽的深度22小于主结11注入深度D11的1/2。开口槽的底部为凹面,底部的截面为图18中曲线24所示。图18中曲线25和曲线26分别为平面和凸面的截面示意图,本实施例开口槽23的底部应避免这两种形状。As shown in FIG. 16 , the structure of the opening
实施例1中的碳化硅肖特基二极管的制备方法,步骤(S11)在去除注入掩膜介质12后,还包括如下步骤:在主结(11)的表面挖槽刻蚀,形成开口槽;所述开口槽的底部为凹面;所述开口槽的深度小于主结注入深度的1/2,之后再制作阳极20和阴极21,即为本实施例公开的碳化硅肖特基二极管制备方法。In the preparation method of the silicon carbide Schottky diode in
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