CN108461537A - A kind of trench gate charge storage type IGBT and preparation method thereof - Google Patents

A kind of trench gate charge storage type IGBT and preparation method thereof Download PDF

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CN108461537A
CN108461537A CN201810113819.7A CN201810113819A CN108461537A CN 108461537 A CN108461537 A CN 108461537A CN 201810113819 A CN201810113819 A CN 201810113819A CN 108461537 A CN108461537 A CN 108461537A
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type semiconductor
conductive type
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charge storage
electrode
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CN108461537B (en
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张金平
赵倩
王康
刘竞秀
李泽宏
张波
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University of Electronic Science and Technology of China
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
    • H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/402—Field plates
    • H01L29/407—Recessed field plates, e.g. trench field plates, buried field plates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42356—Disposition, e.g. buried gate electrode
    • H01L29/4236—Disposition, e.g. buried gate electrode within a trench, e.g. trench gate electrode, groove gate electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333—Vertical insulated gate bipolar transistors
    • H01L29/66348—Vertical insulated gate bipolar transistors with a recessed gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • H01L29/7398—Vertical transistors, e.g. vertical IGBT with both emitter and collector contacts in the same substrate side

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Abstract

A kind of trench gate charge storage type IGBT, belongs to semiconductor power device technology field.By widening conventional groove grid structure and forming table top (mesa) structure being located at below base area using side wall gate electrode structure, and introduce the shield trenches structure of shielded packaged food accumulation layer electric field, carrier injection enhancement effect is increased, forward conduction voltage drop V is improvedceonWith turn-off power loss EoffBetween compromise；The electric field concentration effect for alleviating channel bottom sharp corner, effectively increases the breakdown voltage of device；Reduce the gate capacitance especially Miller capacitance C of deviceGCAnd grid charge QG, improve the switching speed of device, reduce the switching loss of device and the requirement to gate drive circuit ability；Avoid the limitation of N-type charge storage layer doping concentration and thickness to device pressure resistance；Saturation current density is reduced, the short-circuit safety operation area (SCSOA) of device is improved；And effectively inhibit EMI effects when break-over of device.In addition, production method provided by the invention is compatible with conventional trench gate charge storage type IGBT production methods.

Description

A kind of trench gate charge storage type IGBT and preparation method thereof
Technical field
The invention belongs to power semiconductor device technology field, more particularly to a kind of trench gate charge storage type insulated gate is double Bipolar transistor (CSTBT).
Background technology
Insulated gate bipolar transistor (IGBT) is proposed on the Research foundation of power MOSFET, BJT and SCR/GTO etc. , it invents and realizes by introducing PN junction in the backing substrate of power MOSFET structure beginning of the eighties late 1970s Volume production.The conductivity modulation effect that back side PN junction introduces when break-over of device makes IGBT become by MOS field-effect transistors and double The mutually compound novel power transistor of pole junction transistor (BJT) can also be equivalent to bipolar junction transistor (BJT) driving MOSFET structure.IGBT combines the characteristics of both MOSFET and BJT：Not only the input impedance with power MOSFET it is high, Control power is small, is easy to driving, the advantage that switching frequency is high, and the conducting electric current with BJT is big, conduction loss is small, stablizes The good advantage of property.Because of its superior device performance and reliability, IGBT has become the mainstream work(of middle high power field of power electronics Rate switching device is widely used in the every field such as traffic, communication, household electrical appliance and aerospace.
Since IGBT inventions, people have been devoted to towards low-loss, and switching speed is fast, high reliability and low noise Direction improves the performance of IGBT, and by development in thirties years, industry released one after another number for IGBT products.Although each factory Quotient is upper totally different in the division of product algebraically, but the structure of latest generation product is essentially identical：Trench gate+field blocks/and light break-through/soft wears Logical (FS/LPT/SPT) structure+thin slice processing technology+emitter carrier concentration enhances technology.Initial non-break-through (NPT) type IGBT structure has symmetrical positive/negative to blocking characteristics, but its low-doped thick drift region causes break-over of device pressure drop very big, So that the on state characteristic of device is poor.Later, developed and introduced the higher field resistance of doping concentration between collecting zone and drift region Only (FS) layer, in the thickness for ensureing to be thinned drift region under the conditions of same pressure resistance, so as to improve the on state characteristic of IGBT device. But the shortcomings that FS layers of higher-doped concentration, is that the reverse BV of device can be reduced, and limits device in AC applications The range in field.Later, with the development of trench technique and maturation, industry is replaced flat using groove (Trench) grid IGBT structure Face grid IGBT structure to eliminate the areas the JFET resistance of planar gate IGBT structure, and then obtains better on state characteristic and more High MOS gully densities so that the characteristic of device is significantly improved.Further, people take different measure to improve drift The carrier concentration profile for moving area is closed so as to improve the compromise between forward conduction voltage drop (Vceon) and turn-off power loss (Eoff) System.Modern IGBT mainly improves the trade-off relation between forward conduction voltage drop and turn-off power loss using two methods：One is Front injection enhancing (IE) effect and back surface field prevent (FS) technology.In view of the requirement of short circuit, it is developed with wide ditch The IGBT structure in slot or the areas floating PXing Ti.However, on the one hand, wide raceway groove IGBT has big Muller capacitance (CGC) and grid charge (QG) value.Relatively low small CGC is for accelerating switching process, reducing switching loss and preventing the mistake of the grid under high dV/dt transient states It opens extremely important；QG determines the driving capability needed for gate driving circuit, reduces QG for reducing gate driving circuit Size and cost and gate drive loss are vital.And width raceway groove IGBT runs counter to above-mentioned performance requirement.Another party Face has excessively poor conducting EMI noise can though the IGBT with the areas floating PXing Ti can provide relatively low CGC Control property.In order to inhibit EMI noise, the IGBT structure with the areas independent floating PXing Ti or the areas WeiPXing Ti is developed, but this is To increase conduction loss Eon or higher CGC as cost.Remaining IGBT structure for providing low CGC can also be in N-channel IGBT The carrier that higher-doped concentration and larger thickness are introduced below the p-type base area of structure stores (CS) layer, and this structure is referred to as Trench gate charge storage type insulated gate bipolar transistor (CSTBT).In addition to providing low CGC, the N-type in N-channel CSTBT structures Charge storage layer can also introduce hole barrier below p-type base area so that device is big close to the hole concentration of emitter terminal It is big to be promoted, and required that electron concentration herein will be greatly increased according to electroneutral, the carrier of entire N-type drift region is improved with this Concentration distribution enhances the conductivity modulation effect of N-type drift region, and IGBT is made to obtain lower forward conduction voltage drop and more excellent Forward conduction voltage drop and turn-off power loss tradeoff.Also, it is got over the doping concentration and thickness of N-type charge storage layer Greatly, the conductivity modulation effect of CSTBT improves bigger, and the forward conduction characteristic of device is also better.But as N-type charge is deposited The continuous improvement of reservoir doping concentration can cause CSTBT device electric breakdown strengths to significantly reduce, and which has limited N-type charge storage layers Doping concentration and thickness；Simultaneously in order to avoid threshold voltage variation, the dopant profiles of charge storage layer must also obtain very well Control.It is obtained as shown in Figure 1 for tradition FS CSTBT device architectures in order to effectively shield the adverse effect of N-type charge storage layer Higher device pressure resistance is obtained, the following two kinds mode is mainly used：
(1) deep trench gate depth usually makes the depth of trench gate be more than the junction depth of N-type charge storage layer；
(2) small cellular width, that is, improving MOS structure gully density keeps trench gate spacing as small as possible；
Mode (1) can increase gate-emitter capacitance and grid-collector capacitance while implementation, and the switch of IGBT Process is substantially exactly the process to grid capacitance progress charge/discharge, so, when the increase of grid capacitance can make charge/discharge Between increase, in turn result in switching speed reduction.Thus, deep trench gate depth will reduce devices switch speed, increase device Switching loss influences the compromise characteristic of break-over of device pressure drop and switching loss；And the implementation of mode (2) is on the one hand by enhancer The grid capacitance of part causes devices switch speed to reduce, switching loss increase, influences the folding of break-over of device pressure drop and switching loss Middle characteristic, the big gully density of another aspect will also increase the saturation current density of device, make shorted devices safety operation area (SCSOA) it is deteriorated.In addition, the gate oxide in trench gate structure is formed in the trench by a thermal oxide, in order to ensure Certain threshold voltage, therefore it is required that the thickness of entire gate oxide is smaller, however the thickness of mos capacitance size and oxide layer It is inversely proportional, this grid capacitance allowed in traditional C/S TBT devices dramatically increases, while the electric field concentration effect meeting of channel bottom The breakdown voltage for reducing device, causes the reliability of device poor.
Invention content
In view of described above, it is an object of the invention to：In view of the deficienciess of the prior art, providing a kind of trench gate electricity Lotus storage-type IGBT and preparation method thereof is located at base by widening conventional groove grid structure and being formed using side wall gate electrode structure Table top (mesa) structure below area, and the shield trenches structure of shielded packaged food accumulation layer electric field is introduced, to avoid electricity While lotus accumulation layer doping concentration and thickness are to the limitation of device pressure resistance performance, raising device electric breakdown strength are reached, has improved Tradeoff between device forward conduction voltage drop Vceon and turn-off power loss Eoff improves the switch performance of device, improves device Short-circuit safety operation area；Further it is proposed that preparation method and conventional trench gate charge storage type IGBT production method It is compatible.
To achieve the goals above, the present invention provides the following technical solutions：
On the one hand, the present invention provides a kind of trench gate charge storage type IGBT, and a quarter structure cell includes：Under The collector electrode metal 14 that is cascading on and, the first conductive type semiconductor collecting zone 13, the second conductive type semiconductor Drift region 9 and emitter metal 1；Second conductive type semiconductor drift region, 9 top layer is respectively provided with the second conduction type half Conductor charge accumulation layer 6, the first conductive type semiconductor base area 5, the first conductive type semiconductor emitter region 4 and the second conductive-type Type semiconductor emission area 3；First conductive type semiconductor base area 5 is located at the second conductive type semiconductor charge storage layer 6 Top layer；First conductive type semiconductor emitter region 4 and the second conductive type semiconductor emitter region 3 are located at independently of each other and side by side The top layer of first conductive type semiconductor base area 5, it is characterised in that：The top layer of second conductive type semiconductor drift region 9 Also there is trench gate structure and shield trenches structure；The trench gate structure includes side wall gate electrode 71 and its gate medium of side Layer 72, the side wall gate electrode 71 is passed down through the second conductive type semiconductor emitter region 3 and the first conductive type semiconductor base Area 5 enters in the second conductive type semiconductor charge storage layer 6, i.e., the depth that side wall gate electrode 71 extends along device vertical direction Less than the junction depth of the second conductive type semiconductor charge storage layer 6, side wall gate electrode 71 and the second conductive type semiconductor emit Pass through gate dielectric layer 72 between area 3, the first conductive type semiconductor base area 5 and the second conductive type semiconductor charge storage layer 6 It is connected, the trench gate structure is more than the first conduction along the width that 6 top layer of the second conductive type semiconductor charge storage layer extends Both type semiconductor emitter region 4 and the second conductive type semiconductor emitter region 3 are in 5 top layer of the first conductive type semiconductor base area The surface of the width of extension, side wall gate electrode 71 has spacer medium layer 2；The shield trenches structure include bucking electrode 81 and The bucking electrode dielectric layer 82 of its side, the shield trenches structure is with the trench gate structure along the direction that device top layer extends Inconsistent, the bucking electrode 81 is passed down through the second conductive type semiconductor emitter region 3, the transmitting of the first conductive type semiconductor Area 4, the first conductive type semiconductor base area 5 and the second conductive type semiconductor charge storage layer 6 enter the second conduction type half In conductor drift region 9, i.e., bucking electrode 81 is more than the second conductive type semiconductor charge along the depth that device vertical direction extends The junction depth of accumulation layer 6, bucking electrode 81 and the second conductive type semiconductor emitter region 3, the first conductive type semiconductor emitter region 4, the first conductive type semiconductor base area 5, the second conductive type semiconductor charge storage layer 6 and the drift of the second conductive type semiconductor Move between area 9 and be connected by bucking electrode dielectric layer 82, bucking electrode 81 and side wall gate electrode 71 by gate dielectric layer 72 or Bucking electrode dielectric layer 82 is connected；Spacer medium layer 2, shield trenches structure, the second conductive type semiconductor emitter region 3 and first The upper surface of conductive type semiconductor emitter region 4 is connected with emitter metal 1, bucking electrode 81 and 1 equipotential of emitter metal.
Further, three-dimensional system of coordinate, the bottom of a quarter cellular are established by origin of any inflection point of a quarter cellular Face intersects at two sides of the inflection point respectively as x-axis and z-axis, the excessively described inflection point and the straight line conduct perpendicular to the bottom surface Y-axis, then side wall gate electrode 71 extend to the other end from device one end along x-axis or z-axis, bucking electrode 81 is along z-axis or x-axis from device Part one end extends to the gate dielectric layer 72 of 71 side of side wall gate electrode, and the extending direction of side wall gate electrode 71 and bucking electrode 81 is not Unanimously.
Further, three-dimensional system of coordinate, the bottom of a quarter cellular are established by origin of any inflection point of a quarter cellular Face intersects at two sides of the inflection point respectively as x-axis and z-axis, the excessively described inflection point and the straight line conduct perpendicular to the bottom surface Y-axis, then bucking electrode 81 extend to the other end from device one end along x-axis or z-axis, side wall gate electrode 71 is along z-axis or x-axis from device Part one end extends to the bucking electrode dielectric layer 82 of 81 side of bucking electrode, the extension side of bucking electrode 81 and side wall gate electrode 81 To inconsistent.
Further, the shape and ditch for the bucking electrode 81 being connected by bucking electrode dielectric layer 82 with side wall gate electrode 71 The shape of slot grid structure is close so that 81 surface of bucking electrode and the surface of the spacer medium layer 2 on 71 surface of side wall gate electrode are neat It is flat.
Further, to provide the electric field of more negative electrical charge shielded packaged food accumulation layers, with any inflection point of a quarter cellular Three-dimensional system of coordinate is established for origin, the bottom surface of a quarter cellular intersects at two sides of the inflection point respectively as x-axis and z Axis, the excessively described inflection point and perpendicular to the straight line of the bottom surface as y-axis, in order to enhance the second conduction type of shield trenches structure pair Pumping of the emitter to drift region excess minority carrier when the electric field shielding of semiconductor charge storage layer acts on, reduces forward conduction It takes area while reducing grid capacitance, improve the carrier concentration profile of drift region, it is preferable that bucking electrode 81 is along the z-axis direction Width be more than the width of side wall gate electrode 71 along the x-axis direction.
Further, the thickness of the bucking electrode dielectric layer 82 is more than the thickness of the gate dielectric layer 72.
Further, also there is the first conductive type semiconductor layer 10 below the shield trenches structure；As preferred side Formula, what the first conductive type semiconductor layer 10 extended laterally to the lower section of the second conductive type semiconductor charge storage layer 6 second leads In electric type semiconductor drift region 9.
Further, between the first conductive type semiconductor collecting zone 13 and the second conductive type semiconductor drift region 9 also With the second conductive type semiconductor field resistance layer 12, FS IGBT structures are formed.
Further, when device is FS IGBT structures, device back, which also has, runs through the first conductive type semiconductor collection Electric area 13 and the second conductive type semiconductor field stop layer 12 enter the groove current collection in the second conductive type semiconductor drift region 9 Pole structure.
Specifically, the groove collector structure includes groove collector 111 and its groove collector dielectric layer of side 112, the groove collector 111 and 14 equipotential of metal collector, the groove collector 111 pass through groove collector medium Layer 112 and the first conductive type semiconductor collecting zone 13, the second conductive type semiconductor field stop layer 12 and the second conduction type Drift semiconductor area 9 is connected；It is preferred that the thickness of groove collector dielectric layer 112 is more than the thickness of gate dielectric layer 72.
Further, semi-conducting material used in device is any one in Si, SiC, GaAs and GaN or a variety of, each to tie Semi-conducting material of the same race can be used in structure or semi-conducting material not of the same race is combined.
Further, the gate electrode in groove is any one in polysilicon, SiC, GaAs and GaN or a variety of, each portion Point same material can be used or non-same material is combined.
In above-mentioned all technical solutions, the first conductive type semiconductor is P-type semiconductor, and the second conductive type semiconductor is N-type semiconductor；Or first conductive type semiconductor be N-type semiconductor, the second conductive type semiconductor be P-type semiconductor.
On the other hand, the present invention provides a kind of production method of trench gate charge storage type IGBT, which is characterized in that including Following steps：
Step 1：Make the second conductive type semiconductor drift region 9；
Step 2：By pre-oxidation, photoetching, etching, ion implanting and high-temperature annealing process, partly led in the second conduction type The front of body drift region 9 makes the second conductive type semiconductor charge storage layer 6 and is located at the second conductive type semiconductor charge First conductive type semiconductor base area 5 of 6 top layer of accumulation layer；
Step 3：By photoetching, etching, thermal oxide, depositing technics, in the second conductive type semiconductor charge storage layer 6 Upper etching forms first groove, and the depth of the first groove is more than the junction depth of the second conductive type semiconductor charge storage layer 6 And extend along device top layer horizontal direction；Bucking electrode dielectric layer 82 is formed in first groove inner wall, is then deposited in the trench Bucking electrode material forms the formation shielding ditch of bucking electrode dielectric layer 82 of bucking electrode 81, the bucking electrode 81 and its side Slot structure；
Step 4：In 82 upper surface shape of the first conductive type semiconductor base area 5, bucking electrode 81 and bucking electrode dielectric layer At low stress nitride nitride layer；
Step 5：By photoetching, etching, thermal oxide, depositing technics, in the second conductive type semiconductor charge storage layer 6 Upper etching forms second groove, and the depth of the second groove is less than the junction depth of the second conductive type semiconductor charge storage layer 6 And extend along device top layer longitudinal direction, the second groove and the first groove are not connected；In second groove inner wall shape At gate dielectric layer 72, gate material is then deposited in second groove, and formed by anisotropy polysilicon etch back technique Side wall gate electrode 71, the side wall gate electrode 71 and the gate dielectric layer 72 of side form trench gate structure；
Step 6：By thermal oxidation technology, spacer medium layer 2 is formed on 71 surface of side wall gate electrode；
Step 7：The low stress nitride nitride layer for removing surface covering, passes through photoetching, etching, ion implanting and high annealing Technique, the top layer in the first conductive type semiconductor base area 5 make the first conduction type independently of each other and being set up in parallel and partly lead Body emitter region 4 and the second conductive type semiconductor emitter region 3,3 side of the second conductive type semiconductor emitter region is along device Top layer horizontal direction is connected by gate dielectric layer 72 with side wall gate electrode 71, and the other side passes through screen along device top layer longitudinal direction It covers electrode dielectric 82 with bucking electrode 81 to be connected, 4 side of the first conductive type semiconductor emitter region is vertical along device top layer It is connected to direction with bucking electrode 81 by bucking electrode dielectric layer 82；
Step 8：Surface deposition metal, by photoetching, etching technics in spacer medium layer 2, the second conductive type semiconductor Emitter gold is formed on emitter region 3, the first conductive type semiconductor emitter region 4, bucking electrode 81 and bucking electrode dielectric layer 82 Belong to 1；
Step 9：Semiconductor devices is overturn, the thickness of semiconductor is thinned, by ion implanting and high-temperature annealing process, The back side of second conductive type semiconductor drift region 9 injects the first conductive type impurity and forms the first conductive type semiconductor current collection Area 13；
Step 10：The back side deposits metal, and collector electrode metal 14 is formed on the first conductive type semiconductor collecting zone 13；Extremely Trench gate charge storage type IGBT device is made in this.
Further, the step of forming shield trenches structure is led with the first conductive type semiconductor base area 5 of formation and second In no particular order, the two can be interchanged the sequence of the step of electric type semiconductor charge storage layer 6, i.e., the present invention can also be initially formed Shield trenches structure re-forms the first conductive type semiconductor base area 5 and the second conductive type semiconductor charge storage layer 6.
Further, the step of forming low stress nitride nitride layer with form the second conductive type semiconductor emitter region 3 and the In no particular order, the two can be interchanged the sequence of the step of one conductive type semiconductor emitter region 4, i.e., the present invention can also be initially formed Second conductive type semiconductor emitter region 3 and the first conductive type semiconductor emitter region 4 re-form low stress nitride nitride layer in turn Form trench gate structure.
Further, by changing grooving mode so that trench gate structure extends to device along device top layer from device one end The part other end and block extension or shield trenches structure of the shield trenches structure along device top layer along device top layer from device one End extends to the device other end and blocks trench gate structure along the extension of device top layer.
Further, semi-conducting material used in device is any one in Si, SiC, GaAs and GaN or a variety of, each to tie Semi-conducting material of the same race can be used in structure or semi-conducting material not of the same race is combined.
Further, the gate electrode in groove is any one in polysilicon, SiC, GaAs and GaN or a variety of, each portion Point same material can be used or non-same material is combined.
In above-mentioned all technical solutions, the first conductive type semiconductor is P-type semiconductor, and the second conductive type semiconductor is N-type semiconductor；Or first conductive type semiconductor be N-type semiconductor, the second conductive type semiconductor be P-type semiconductor.
The comprehensive performance that device is improved with device architecture proposed by the present invention improves the reliability of device, below Elaborate the principle of device design of the present invention：
The present invention forms table top by introducing Fin-body structures and using wide trench gate structure below base area (mesa) structure, wide gate trench and narrow mesa structure can play good carrier injection humidification, so as to improve The carrier concentration profile of drift region improves forward conduction voltage drop VceonWith turn-off power loss EoffBetween compromise, while use side On the one hand wall gate electrode structure can ensure sufficiently small grid capacitance to maintain good switch performance, while but also grid The overlapping area of pole and collector significantly reduces, and significantly reduces Miller capacitance CGCWith grid charge QG, to reduce conducting E is lostonWith the requirement to gate drive circuit ability, on the other hand, the presence of side wall gate electrode so that wide gate trench interior energy Enough deposit metal forms field plate (FP) structure, and the introducing of field plate structure can reduce peak value electric field, alleviate gate trench bottom point Electric field concentration effect at angle, and then the breakdown voltage of device is effectively improved, improve the reliability of device, meanwhile, field plate (FP) The presence of structure can also effectively suppression device conducting when EMI effects；Present invention further introduces another deep groove structures (to shield Groove structure) carry out the electric field of shielded packaged food accumulation layer, the groove depth of shield trenches structure is more than charge storage layer and trench interiors Electrode and emitter equipotential, shield trenches structure have effective charge compensation to the charge storage layer of heavy doping below base area Effect, and then the electric field of charge storage layer is shielded, avoid the limit of charge storage layer doping concentration and thickness to device pressure resistance System；Meanwhile the presence of the shield trenches structure reduces the whole grid capacitance of device, to improve the switch speed of device Degree, reduces switching loss and the requirement to gate drive circuit ability, further improves device forward conduction voltage drop VceonWith Turn-off power loss EoffBetween compromise；Emitter is to drift when the presence of further shield trenches structure reduces forward conduction The extraction area of area's excess minority carrier, while reducing grid capacitance, improve the carrier concentration profile of drift region, Further improve the tradeoff between device forward conduction voltage drop Vceon and turn-off power loss Eoff；The present invention is by rationally setting It counts shield trenches structure and blocks the position relationship between trench gate structure so that shield trenches structure blocks trench gate structure, To reach the gully density for reducing MOS structure, the saturation current density of device is reduced, the short-circuit safety operation area of device is improved (SCSOA) purpose.
The beneficial effects of the invention are as follows：
Invention increases carriers to inject enhancement effect, improves drift region carrier concentration distribution, improves forward direction Conduction voltage drop VceonWith turn-off power loss EoffBetween compromise；Peak value electric field is reduced, the electric field of channel bottom sharp corner is alleviated Concentration effect effectively increases the breakdown voltage of device；Reduce the gate capacitance especially Miller capacitance C of deviceGCAnd grid electricity Lotus QG, improve the switching speed of device, reduce the switching loss of device and the requirement to gate drive circuit ability；It shields The electric field of N-type charge storage layer avoids the limitation of N-type charge storage layer doping concentration and thickness to device pressure resistance；It reduces The gully density of MOS structure, reduces saturation current density, improves the short-circuit safety operation area (SCSOA) of device；Effectively suppression EMI effects when break-over of device are made.In addition, production method provided by the invention need not increase additional processing step, with Conventional trench gate charge storage type IGBT production methods are compatible with.
Description of the drawings
Fig. 1 is a quarter structure cell schematic diagram of conventional trench gate charge storage type IGBT device；
Fig. 2 is that conventional trench gate charge storage type IGBT device forms spacer medium layer and transmitting when making Facad structure Structural schematic diagram before the metal of pole；
Fig. 3 is that a quarter structure cell of conventional trench gate charge storage type IGBT device is illustrated along the section of AB lines Figure；
Fig. 4 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides Structure schematic diagram；
Fig. 5 is a kind of trench gate charge storage type IGBT device of the offer of the embodiment of the present invention 1 when making Facad structure Form the structural schematic diagram before emitter metal；
Fig. 6 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides Diagrammatic cross-section of the structure along AB lines；
Fig. 7 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides Diagrammatic cross-section of the structure along CD lines；
Fig. 8 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 2 provides Structure schematic diagram；
Fig. 9 is a kind of trench gate charge storage type IGBT device of the offer of the embodiment of the present invention 2 when making Facad structure Form the structural schematic diagram before emitter metal；
Figure 10 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 2 provides Diagrammatic cross-section of the structure along AB lines；
Figure 11 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 2 provides Diagrammatic cross-section of the structure along CD lines；
Figure 12 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides Structure schematic diagram；
Figure 13 is a kind of trench gate charge storage type IGBT device of the offer of the embodiment of the present invention 3 when making Facad structure Form the structural schematic diagram before emitter metal；
Figure 14 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides Diagrammatic cross-section of the structure along AB lines；
Figure 15 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides Diagrammatic cross-section of the structure along CD lines；
Figure 16 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides Structure schematic diagram；
Figure 17 is a kind of trench gate charge storage type IGBT device of the offer of the embodiment of the present invention 4 when making Facad structure Form the structural schematic diagram before emitter metal；
Figure 18 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides Diagrammatic cross-section of the structure along AB lines；
Figure 19 is a kind of a quarter cellular knot for trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides Diagrammatic cross-section of the structure along CD lines；
Figure 20 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms shield trenches structure Groove after a quarter structure cell schematic diagram；
Figure 21 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms bucking electrode medium A quarter structure cell schematic diagram after layer；
Figure 22 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms bucking electrode and low A quarter structure cell schematic diagram after stress nitride object (Nitride) layer；
Figure 23 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms trench gate structure A quarter structure cell schematic diagram after groove；
Figure 24 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms gate dielectric layer A quarter structure cell schematic diagram；
Figure 25 is four after a kind of trench gate charge storage type IGBT device formation gate electrode that the embodiment of the present invention 1 provides / mono- cellular structural schematic diagram；
Figure 26 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms side wall gate electrode A quarter structure cell schematic diagram；
Figure 27 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms spacer medium layer A quarter structure cell schematic diagram；
Figure 28 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms N+ emitter region and P+ A quarter structure cell schematic diagram after emitter region；
Figure 29 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides forms emitter metal electricity A quarter structure cell schematic diagram after extremely；
Figure 30 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 1 provides completes whole processes A quarter structure cell schematic diagram；
Figure 31 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms trench gate structure A quarter structure cell schematic diagram after groove；
Figure 32 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms gate dielectric layer A quarter structure cell schematic diagram；
Figure 33 is four after a kind of trench gate charge storage type IGBT device formation gate electrode that the embodiment of the present invention 3 provides / mono- cellular structural schematic diagram；
Figure 34 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms side wall gate electrode A quarter structure cell schematic diagram；
Figure 35 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms spacer medium layer A quarter structure cell schematic diagram；
Figure 36 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms N+ emitter region and P+ A quarter structure cell schematic diagram after emitter region；
Figure 37 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 3 provides forms emitter metal electricity A quarter structure cell schematic diagram after extremely；
Figure 38 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms trench gate structure A quarter structure cell schematic diagram after groove；
Figure 39 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms gate dielectric layer A quarter structure cell schematic diagram；
Figure 40 is four after a kind of trench gate charge storage type IGBT device formation gate electrode that the embodiment of the present invention 4 provides / mono- cellular structural schematic diagram；
Figure 41 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms side wall gate electrode A quarter structure cell schematic diagram；
Figure 42 is a kind of trench gate charge storage type IGBT device of the offer of the embodiment of the present invention 4 when making Facad structure Form a quarter structure cell schematic diagram after spacer medium layer；
Figure 43 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms shield trenches structure Groove after a quarter structure cell schematic diagram；
Figure 44 is four after a kind of trench gate charge storage type IGBT device formation P-type layer that the embodiment of the present invention 4 provides / mono- cellular structural schematic diagram；
Figure 45 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms shield trenches structure Spacer medium layer after a quarter structure cell schematic diagram；
Figure 46 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms shield trenches electrode A quarter structure cell schematic diagram afterwards；
Figure 47 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms N+ emitter region and P+ A quarter structure cell schematic diagram after emitter region；
Figure 48 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides to form emitter gold Belong to a quarter structure cell schematic diagram after electrode；
Figure 49 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms groove collector junction A quarter structure cell schematic diagram after the groove of structure；
Figure 50 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms groove collector Jie A quarter structure cell schematic diagram after matter layer；
Figure 51 is that a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides forms groove collector electricity A quarter structure cell schematic diagram after extremely；
Figure 52 is after a kind of trench gate charge storage type IGBT device that the embodiment of the present invention 4 provides completes whole processes A quarter structure cell schematic diagram.
In figure：1 is emitter metal, and 2 be spacer medium layer, and 3 be N+ emitter region, and 4 be P+ emitter region, and 5 be p-type base area, 6 It is gate electrode for N-type charge storage layer, 71,72 be gate dielectric layer, and 81 be bucking electrode, and 82 be bucking electrode dielectric layer, and 9 be N Type drift region, 10 be P-type layer, and 111 be groove collector electrode, and 112 be groove collector dielectric layer, and 12 be N-type field stop layer, 13 be p-type collecting zone, and 14 be collector electrode metal.
Specific implementation mode
The principle of the present invention and characteristic are explained in detail with specific embodiment with reference to the accompanying drawings of the specification：
Identical label indicates same or similar component or element in the accompanying drawings.Trench gate electricity provided by the invention Lotus storage-type IGBT device can be N-channel device, can also be P-channel device, be said by taking N-channel device as an example below Bright, one of ordinary skill in the art can understand the structure and working principle of P-channel device on the basis of open N-channel device.
Embodiment 1：
The present invention provides a kind of trench gate charge storage type IGBT, and a quarter cellular is as shown in figure 4, along AB lines and A' The section of B' lines is as shown in Figure 6 and Figure 7, and three-dimensional system of coordinate, a quarter are established using any inflection point of a quarter cellular as origin The bottom surface of cellular intersects at two sides of the inflection point respectively as x-axis and z-axis, the excessively described inflection point and perpendicular to the bottom surface Straight line is as y-axis, and x, y, the direction of z-axis is referring to Fig. 4；
The a quarter cellular includes：The collector electrode metal 14 that is cascading from bottom to top, p-type collecting zone 13, N Type field stop layer 12, N-type drift region 9 and emitter metal 1；9 top layer of the N-type drift region is respectively provided with N-type charge storage layer 6, p-type base area 5, P+ emitter region 4 and N+ emitter region 3；The p-type base area 5 is located at the top layer of N-type charge storage layer 6；P+ emitter region 4 and N+ emitter region 3 is independently of each other and side by side positioned at the top layer of p-type base area 5, it is characterised in that：The top layer of the N-type drift region 9 Also there is trench gate structure and shield trenches structure；The shield trenches structure includes bucking electrode 81 and its shielding electricity of side Pole dielectric layer 82, the bucking electrode 81 extend along the x-axis direction, extend to the other end from device one end, bucking electrode 81 is downward Enter in N-type drift region 9 across N+ emitter region 3, P+ emitter region 4, p-type base area 5 and N-type charge storage layer 6, i.e. bucking electrode 81 The depth extended along the y-axis direction is more than the junction depth of N-type charge storage layer 6, bucking electrode 81 and N+ emitter region 3, P+ emitter region 4, P It is connected by bucking electrode dielectric layer 82 between type base area 5, N-type charge storage layer 6 and N-type drift region 9, bucking electrode 81 and side Wall gate electrode 71 is connected by gate dielectric layer 72 or bucking electrode dielectric layer 82；The trench gate structure and the shield trenches Structure is inconsistent along the extending direction of device top layer, and the trench gate structure includes side wall gate electrode 71 and its gate medium of side Layer 72, the side wall gate electrode 71 extends along the z-axis direction, and bucking electrode dielectric layer 82, side wall grid electricity are extended to from device one end Pole 71 is passed down through N+ emitter region 3 and p-type base area 5 enters in N-type charge storage layer 6, i.e., side wall gate electrode 71 prolongs along the y-axis direction The depth stretched is less than the junction depth of N-type charge storage layer 6, and side wall gate electrode 71 and N+ emitter region 3, p-type base area 5 and N-type charge are deposited It is connected by gate dielectric layer 72 between reservoir 6, and the width of trench gate structure along the x-axis direction is more than P+ emitter region 4 and N+ is sent out Penetrate the width that area 3 extends along the x-axis direction；The surface of side wall gate electrode 71 has spacer medium layer 2；Spacer medium layer 2, shielding ditch The upper surface of slot structure, N+ emitter region 3 and P+ emitter region 4 is connected with emitter metal 1, bucking electrode 81 and emitter metal 1 Equipotential.
In the present embodiment, the size of P+ emitter region 4 along the x-axis direction is 1~5 μm, and size, that is, junction depth along the y-axis direction is 0.1~0.3 μm；The size of the p-type base area 5 along the x-axis direction is 2~10 μm, and size, that is, junction depth along y-axis is 0.3~1 μm； The N-type charge storage layer 6 is 0.5~1 μm along size, that is, junction depth of y-axis；The groove depth of the trench gate structure is 0.6~1.8 μ m；The shield trenches structure is 4~8 μm along size, that is, groove depth of y-axis.
Embodiment 2：
The present invention provides a kind of trench gate charge storage type IGBT, and a quarter cellular is as shown in figure 8, along AB lines and A' The section of B' lines is as shown in Figure 10 and Figure 11, and three-dimensional system of coordinate is established using any inflection point of a quarter cellular as origin, four/ The bottom surface of one cellular intersects at two sides of the inflection point respectively as x-axis and z-axis, the excessively described inflection point and perpendicular to the bottom surface Straight line as y-axis, x, y, the direction of z-axis is referring to Fig. 8；
Compared with Example 1, this implementation the difference is that：P-type layer 10, P is introduced in the bottom of shield trenches structure Type layer 10 is connect with bucking electrode 81 by bucking electrode dielectric layer 82, and in addition to this remaining structure is same as Example 1, this In embodiment, the junction depth of P-type layer 10 is 0.5~1 μm.Preferably, the P-type layer 10 is extended laterally to both sides In the N-type drift region 9 of 6 lower section of N-type charge storage layer, the influence of negative electrical charge in N-type charge storage layer 6 is shielded with this, and Grid capacitance is further reduced, while also contributing to improve channel bottom electric field concentration, improves the breakdown voltage of device And reliability.
Embodiment 3：
The present invention provides a kind of trench gate charge storage type IGBT, and a quarter cellular is as shown in figure 12, along AB lines and The section of A'B' lines is as shown in Figure 14 and Figure 15, and three-dimensional system of coordinate is established using any inflection point of a quarter cellular as origin, four points One of the bottom surface of cellular intersect at two sides of the inflection point respectively as x-axis and z-axis, the excessively described inflection point and perpendicular to the bottom The straight line in face is as y-axis, and x, y, the direction of z-axis is referring to Figure 12；
Compared with Example 2, this implementation the difference is that：Side wall gate electrode 71 is extended to along z-axis from device one end The other end, i.e. shield trenches structure top half are blocked along the z-axis direction by trench gate structure, in addition to this remaining structure with reality It is identical to apply example 2.
The side wall gate electrode 71 of the present embodiment can be drawn from device both sides, reduced gate trace, posted to reduce It comes into force and answers.
Embodiment 4：
The present invention provides a kind of trench gate charge storage type IGBT, and a quarter cellular is as shown in figure 16, along AB lines and The section of A'B' lines is as shown in Figure 18 and Figure 19, and three-dimensional system of coordinate is established using any inflection point of a quarter cellular as origin, four points One of the bottom surface of cellular intersect at two sides of the inflection point respectively as x-axis and z-axis, the excessively described inflection point and perpendicular to the bottom The straight line in face is as y-axis, and x, y, the direction of z-axis is referring to Figure 16；
The present embodiment is in addition to making the extension depth of trench gate structure along the z-axis direction reduce and run through in device back introducing Except the groove collector structure of N-type field stop layer 12 and p-type collecting zone 13, remaining structure is same as Example 3.
The making that the present embodiment has exchanged trench gate structure and shield trenches structure with embodiment 3 on processing step is suitable Then sequence, the present embodiment make shield trenches structure and block trench gate structure along the x-axis direction using trench gate structure is first made, And make the shape of shield trenches structure close with the shape of trench gate structure by etching technics so that 81 surface of bucking electrode It is flushed with the surface of the spacer medium layer 2 on 71 surface of side wall gate electrode；In addition, the groove collector structure introduced includes groove collection Electrode 111 and its groove collector dielectric layer 112 of side, the groove collector 111 and 14 equipotential of metal collector, institute It states groove collector 111 and passes through groove collector dielectric layer 112 and p-type collecting zone 13, N-type field stop layer 12 and N-type drift region 9 It is isolated.Preferably, the thickness of groove collector dielectric layer 112 is more than the thickness of gate dielectric layer 72, makes in this way Obtain the reverse-biased PN that backward voltage of the device under reverse blocking state is not only formed by p-type collecting zone 13 and N-type field stop layer 12 12 surface of N-type field stop layer for tying to bear, while contacting with groove collector structure can form depletion layer can also receiving portion Divide backward voltage, groove that can also bear part backward voltage, so as to greatly improve the breakdown reverse voltage of device, improves device The reliability of part, the presence for solving traditional structure due to FS layers cause the breakdown reverse voltage of device to compare forward break down voltage It is low, in AC applications the problem of device resistance to drops.
Embodiment 5：
The present embodiment is illustrated by taking the trench gate charge storage type IGBT of 1200V voltage class as an example, according to this field Common sense can prepare the device of different performance parameter according to actual demand.
A kind of production method of trench gate charge storage type IGBT, which is characterized in that include the following steps：
Step 1：N-type drift region 9 of the monocrystalline silicon piece as device is lightly doped using N-type, the thickness of selected silicon chip is 300~ 600 μm, doping concentration 1013~1014A/cm3；
Step 2：One layer of field oxide is grown in silicon chip surface, is lithographically derived active area, one layer of pre-oxidation layer of regrowth leads to It crosses ion implanting N-type impurity and N-type charge storage layer 6 is made, the energy of ion implanting is 200~500keV, implantation dosage 1013 ~1014A/cm2；P-type base area 5 is made by ion implanting p type impurity and annealing above N-type charge storage layer 6 again, The energy of ion implanting is 60~120keV, implantation dosage 1013~1014A/cm2, annealing temperature is 1100~1150 DEG C, is moved back The fiery time is 10~30 minutes, and in p-type base area, 5 top layer by ion implanting p type impurity and makes annealing treatment obtained P+ body contact zones 4, the energy of ion implanting p type impurity is 60~80keV, implantation dosage 1015~1016A/cm2, annealing temperature is 900 DEG C, Annealing time is 20~30 minutes；
Step 3：In the TEOS protective layers that silicon chip surface deposition thickness is 700~1000nm, makes window by lithography and carry out groove Silicon etching, and then etching forms first groove in N-type drift region 9, as shown in Fig. 20, first groove extends from device right end To device left end, and the depth of first groove is more than the junction depth of N-type charge storage layer 6；
Step 4：In 1050 DEG C~1150 DEG C of O2Under atmosphere, dielectric layer is formed as shielding in the first groove inner wall Electrode dielectric 82, as shown in Fig. 21；Then at 750 DEG C~950 DEG C, the deposition of electrode material shape in the first groove At bucking electrode 81, the present embodiment using polycrystalline silicon material as bucking electrode material, bucking electrode 81 in first groove and The bucking electrode dielectric layer 82 of its side forms shield trenches structure；
Step 5：One layer of low stress nitride is covered in p-type base area 5, bucking electrode 81 and 82 upper surface of bucking electrode dielectric layer Object (Nitride), as shown in Fig. 22；
Step 6：In the TEOS protective layers that silicon chip surface deposition thickness is 700~1000nm, makes window by lithography and carry out groove Silicon etching, and then etching forms second groove in N-type drift region 9, as shown in Fig. 23, second groove is prolonged from the front end of device Bucking electrode dielectric layer 82 is extended to, second groove is spatially mutually perpendicular to first groove and is not connected to mutually, and the two passes through shielding Electrode dielectric 82 is connected；The depth of the second groove is less than the junction depth of N-type charge storage layer 6；
Step 7：In 1050 DEG C~1150 DEG C of O2Under atmosphere, forms dielectric layer in the second groove inner wall and be situated between as grid Matter layer 72, as shown in Fig. 24；Then at 750 DEG C~950 DEG C, deposition of electrode material is as grid electricity in the second groove Pole 71, the present embodiment use polycrystalline silicon material as gate material, as shown in Fig. 25；Pass through anisotropy polysilicon etch back Technique forms side wall gate electrode 71, and as shown in Fig. 26, the gate dielectric layer 72 of side wall gate electrode 71 and its side forms trench gate Structure；
Step 8：In device surface dielectric layer deposited, and using photoetching, etching technics, in side, 71 surface of gate electrode is formed Spacer medium layer 2, as shown in Fig. 27；
Step 9：Pass through H3PO4Wet etching removes low stress nitride object (Nitride) layer of surface covering；By photoetching, Ion implantation technology, in p-type base area, 5 top layer is injected separately into N-type impurity and p type impurity, and the energy of ion implanting N-type impurity is 30 ~60keV, implantation dosage 1015~1016A/cm2, the energy of ion implanting p type impurity is 60~80keV, and implantation dosage is 1015~1016A/cm2, annealing temperature is 900 DEG C, and the time is 20~30 minutes, and the N+ hairs for contacting with each other and being set up in parallel are made Penetrate area 3 and P+ emitter region 4；As shown in Fig. 28,3 right side of the N+ emitter region is along device top layer horizontal direction and gate dielectric layer 72 It is connected, back side is connected along device top layer longitudinal direction with bucking electrode dielectric layer 82；The back side of the P+ emitter region 4 is along device Part longitudinal direction is connected with bucking electrode dielectric layer 82；
Step 10：Metal is deposited in device surface, and using photoetching, etching technics, in spacer medium layer 2, N+ emitter region 3, P+ emitter region 4 and bucking electrode 81 and 82 upper surface of bucking electrode dielectric layer form emitter metal 1, as shown in Fig. 29；
Step 11：Silicon chip is overturn, silicon wafer thickness is thinned, injects the N-type of N-type impurity and making devices of annealing in silicon chip back side The thickness of field stop layer 12, N-type field stop layer 12 is 15~30 microns, and the energy of ion implanting is 1500~2000keV, injection Dosage is 1013~1014A/cm2, annealing temperature is 1200~1250 DEG C, and the time is 300~600 minutes；In N-type field stop layer 12 back side implanting p-type impurity form p-type collecting zone 13, and Implantation Energy is 40~60keV, implantation dosage 1012~1013A/ cm2, in H2With N2Back side annealing is carried out under mixed atmosphere, temperature is 400~450 DEG C, and the time is 20~30 minutes；It forms sediment at the back side Product metal forms collector electrode metal 14, so far completes the preparation of device as shown in Fig. 30.
It is possible to further the sequence of exchange step 2 and step 3, that is, shape again after the step of being initially formed shield trenches structure At the first conductive type semiconductor base area (5) and the second conductive type semiconductor charge storage layer (6).
It is possible to further which before step 9 is placed on step 5, i.e., ion implanting forms N+ emitter region 3 and P+ emitter region 4 It covers low stress nitride object (Nitride) again afterwards, then forms trench gate structure.
Further, increase p-type ion implantation technology in step 2, P-type layer 10 formed in shield trenches structural base, It can be formed described in embodiment 2 in the drift regions N- 9 that the P-type layer 10 is extended laterally to both sides below N-type charge storage layer 6 Structure.
Further, as shown in attached drawing 31~37, trench gate structure can be made along device top by changing grooving mode Layer extends to the device other end from device one end and blocks shield trenches structure along the extension of device top layer, i.e., in shield trenches structure Half part is blocked along the z-axis direction by trench gate structure, at this time shield trenches structure and trench gate structure by gate dielectric layer 72 every From, you can form structure described in embodiment 3.
Further, as shown in attached drawing 38~48, by adjusting making trench gate structure and making shield trenches structure Process sequence first makes trench gate structure and then makes the shield trenches structure for blocking trench gate structure, and passes through etching technics So that the shape of shield trenches structure is close with the shape of trench gate structure；In addition, as shown in attached drawing 49~52, increase in step 11 Add etching, oxidation and depositing technics, the groove current collection through N-type field stop layer 12 and p-type collecting zone 13 is formed at the device back side Pole structure, and make groove collector electrode 111 and 14 equipotential of collector electrode metal, the thickness of groove collector dielectric layer 112 More than the thickness of gate dielectric layer 72, you can formed and implement 4 structures.
Further, the preparation of N-type field stop layer 12 can be before preparing the Facad structure of device in step 11 of the present invention It is prepared；Or the two-layer epitaxial material with N-type field stop layer 12 and N-type drift region 9 can directly be selected to be originated as technique Silicon sheet material.
Further, the preparation of N-type field stop layer 12 can also omit in present invention process step 11.
Further, semi-conducting material used in device is any one in Si, SiC, GaAs and GaN or a variety of, each to tie Semi-conducting material of the same race can be used in structure or semi-conducting material not of the same race is combined.
Further, the gate electrode in groove is any one in polysilicon, SiC, GaAs and GaN or a variety of, each portion Point same material can be used or non-same material is combined.
Be above the preferred embodiment of the present invention, by above description content, those skilled in the art can without departing from In the range of technical thought of the invention, diversified change and modification are carried out.Therefore the technical scope of the present invention is not It is confined to the content of specification, it is all according to equivalent changes and modifications made by scope of the present invention patent, it should all belong to the present invention Covering scope.

Claims (10)

1. a kind of trench gate charge storage type IGBT, a quarter structure cell include：It is cascading from bottom to top Collector electrode metal (14), the first conductive type semiconductor collecting zone (13), the second conductive type semiconductor drift region (9) and transmitting Pole metal (1)；Second conductive type semiconductor drift region (9) top layer is respectively provided with the second conductive type semiconductor charge and deposits Reservoir (6), the first conductive type semiconductor base area (5), the first conductive type semiconductor emitter region (4) and the second conduction type half Conductor emitter region (3)；First conductive type semiconductor base area (5) is located at the second conductive type semiconductor charge storage layer (6) top layer；First conductive type semiconductor emitter region (4) and the second conductive type semiconductor emitter region (3) independently of each other and It is located at the top layer of the first conductive type semiconductor base area (5) side by side, it is characterised in that：The first conductive type semiconductor drift The top layer in area (9) also has trench gate structure and shield trenches structure；The trench gate structure include side wall gate electrode (71) and The gate dielectric layer (72) of its side, the side wall gate electrode (71) be passed down through the second conductive type semiconductor emitter region (3) and First conductive type semiconductor base area (5) enters in the second conductive type semiconductor charge storage layer (6), i.e. side wall gate electrode (71) it is less than the junction depth of the second conductive type semiconductor charge storage layer (6), side wall grid along the depth that device vertical direction extends Electrode (71) and the second conductive type semiconductor emitter region (3), the first conductive type semiconductor base area (5) and the second conduction type It is connected by gate dielectric layer (72) between semiconductor charge storage layer (6), the trench gate structure is partly led along the second conduction type The width that volume charge accumulation layer (6) top layer extends is more than the first conductive type semiconductor emitter region (4) and the second conduction type half The width that both conductor emitter region (3) extend in first conductive type semiconductor base area (5) top layer, the table of side wall gate electrode (71) Face has spacer medium layer (2)；The shield trenches structure includes bucking electrode (81) and its bucking electrode dielectric layer of side (82), the shield trenches structure and the trench gate structure along the direction that device top layer extends inconsistent, the bucking electrode (81) the second conductive type semiconductor emitter region (3), the first conductive type semiconductor emitter region (4), the first conduction are passed down through Type semiconductor base area (5) and the second conductive type semiconductor charge storage layer (6) drift about into the second conductive type semiconductor In area (9), i.e., bucking electrode (81) is more than the second conductive type semiconductor charge storage along the depth that device vertical direction extends The junction depth of layer (6), bucking electrode (81) emit with the second conductive type semiconductor emitter region (3), the first conductive type semiconductor Area (4), the first conductive type semiconductor base area (5), the second conductive type semiconductor charge storage layer (6) and the second conduction type It is connected by bucking electrode dielectric layer (82) between drift semiconductor area (9), bucking electrode (81) is logical with side wall gate electrode (71) It crosses gate dielectric layer (72) or bucking electrode dielectric layer (82) is connected；Spacer medium layer (2), shield trenches structure, the second conduction The upper surface of type semiconductor emitter region (3) and the first conductive type semiconductor emitter region (4) is connected with emitter metal (1), Bucking electrode (81) and emitter metal (1) equipotential.
2. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：Appointed with a quarter cellular One inflection point is that origin establishes three-dimensional system of coordinate, and the bottom surface of a quarter cellular intersects at two sides of the inflection point respectively as x Axis and z-axis, the excessively described inflection point and perpendicular to the straight line of the bottom surface as y-axis, then side wall gate electrode (71) along x-axis or z-axis from Device one end extends to the other end, and bucking electrode (81) extends to side wall gate electrode (71) side along z-axis or x-axis from device one end The gate dielectric layer (72) in face, side wall gate electrode (71) and the extending direction of bucking electrode (81) are inconsistent.
3. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：Appointed with a quarter cellular One inflection point is that origin establishes three-dimensional system of coordinate, and the bottom surface of a quarter cellular intersects at two sides of the inflection point respectively as x Axis and z-axis, the excessively described inflection point and perpendicular to the straight line of the bottom surface as y-axis, then bucking electrode (81) along x-axis or z-axis from device Part one end extends to the other end, and side wall gate electrode (71) extends to bucking electrode (81) side along z-axis or x-axis from device one end Bucking electrode dielectric layer (82), bucking electrode (81) and the extending direction of side wall gate electrode (71) are inconsistent.
4. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：Appointed with a quarter cellular One inflection point is that origin establishes three-dimensional system of coordinate, and the bottom surface of a quarter cellular intersects at two sides of the inflection point respectively as x Axis and z-axis, the excessively described inflection point and perpendicular to the straight line of the bottom surface as y-axis, the width of bucking electrode (81) along the z-axis direction is big In the width of gate electrode (71) along the x-axis direction.
5. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：The shield trenches structure Also there is the first conductive type semiconductor layer (10), the first conductive type semiconductor layer (10) to extend laterally to the second conduction for lower section In the second conductive type semiconductor drift region (9) below type semiconductor charge storage layer (6).
6. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：First conduction type is partly led Also there is the second conductive type semiconductor field resistance layer between body collecting zone (13) and the second conductive type semiconductor drift region (9) (12)。
7. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：Device back, which also has, passes through It wears the first conductive type semiconductor collecting zone (13) and the second conductive type semiconductor field stop layer (12) enters the second conductive-type Groove collector structure in type drift semiconductor area (9).
8. a kind of trench gate charge storage type IGBT according to claim 1, it is characterised in that：First conduction type is partly led Body is P-type semiconductor, and the second conductive type semiconductor is N-type semiconductor；Or first conductive type semiconductor be N-type partly lead Body, the second conductive type semiconductor are P-type semiconductor.
9. the production method of trench gate charge storage type IGBT according to claim 1 a kind of, it is characterised in that：Its feature It is, includes the following steps：
Step 1：Make the second conductive type semiconductor drift region (9)；
Step 2：By pre-oxidation, photoetching, etching, ion implanting and high-temperature annealing process, floated in the second conductive type semiconductor The front for moving area (9) makes the second conductive type semiconductor charge storage layer (6) and is located at the second conductive type semiconductor charge The first conductive type semiconductor base area (5) of accumulation layer (6) top layer；
Step 3：By photoetching, etching, thermal oxide, depositing technics, on the second conductive type semiconductor charge storage layer (6) Etching forms first groove, and the depth of the first groove is more than the junction depth of the second conductive type semiconductor charge storage layer (6) And extend along device top layer horizontal direction；Bucking electrode dielectric layer (82) is formed in first groove inner wall, is then formed sediment in the trench Product bucking electrode material forms bucking electrode dielectric layer (82) shape of bucking electrode (81), the bucking electrode (81) and its side At shield trenches structure；
Step 4：In the first conductive type semiconductor base area (5), bucking electrode (81) and bucking electrode dielectric layer (82) upper surface Form low stress nitride nitride layer；
Step 5：By photoetching, etching, thermal oxide, depositing technics, on the second conductive type semiconductor charge storage layer (6) Etching forms second groove, and the depth of the second groove is less than the junction depth of the second conductive type semiconductor charge storage layer (6) And extend along device top layer longitudinal direction, the second groove and the first groove are not connected；In second groove inner wall shape At gate dielectric layer (72), gate material is then deposited in second groove, and pass through anisotropy polysilicon etch back technique shape At side wall gate electrode (71), the side wall gate electrode (71) and the gate dielectric layer (72) of side form trench gate structure；
Step 6：By thermal oxidation technology, spacer medium layer (2) is formed on side wall gate electrode (71) surface；
Step 7：The low stress nitride nitride layer for removing surface covering, by photoetching, etching, ion implanting and high-temperature annealing process, Top layer in the first conductive type semiconductor base area (5) makes the first conductive type semiconductor hair independently of each other and being set up in parallel Area (4) and the second conductive type semiconductor emitter region (3) are penetrated, the second conductive type semiconductor emitter region (3) side is along device Part top layer horizontal direction is connected by gate dielectric layer (72) with side wall gate electrode (71), and the other side is along device top layer longitudinal direction It is connected with bucking electrode (81) by bucking electrode dielectric layer (82), the first conductive type semiconductor emitter region (4) side It is connected with bucking electrode (81) by bucking electrode dielectric layer (82) along device top layer longitudinal direction；
Step 8：Surface deposition metal is sent out by photoetching, etching technics in spacer medium layer (2), the second conductive type semiconductor It penetrates and forms hair on area (3), the first conductive type semiconductor emitter region (4), bucking electrode (81) and bucking electrode dielectric layer (82) Emitter-base bandgap grading metal (1)；
Step 9：Semiconductor devices is overturn, the thickness of semiconductor is thinned, by ion implanting and high-temperature annealing process, second The back side of conductive type semiconductor drift region (9) injects the first conductive type impurity and forms the first conductive type semiconductor collecting zone (13)；
Step 10：The back side deposits metal, and collector electrode metal (14) is formed on the first conductive type semiconductor collecting zone (13)；Extremely Trench gate charge storage type IGBT device is made in this.
10. the production method of trench gate charge storage type IGBT according to claim 1 a kind of, it is characterised in that：First Conductive type semiconductor is P-type semiconductor, and the second conductive type semiconductor is N-type semiconductor；Or first conduction type partly lead Body is N-type semiconductor, and the second conductive type semiconductor is P-type semiconductor.
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