CN109037324A - 在断态期间具有高应力顺应性的hemt晶体管及其制造方法 - Google Patents
在断态期间具有高应力顺应性的hemt晶体管及其制造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 13
- 239000004065 semiconductor Substances 0.000 claims abstract description 39
- 239000000463 material Substances 0.000 claims abstract description 23
- 230000004888 barrier function Effects 0.000 claims description 33
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical group [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 claims description 25
- 229910002601 GaN Inorganic materials 0.000 claims description 22
- 238000000034 method Methods 0.000 claims description 15
- 239000000758 substrate Substances 0.000 claims description 14
- 239000004020 conductor Substances 0.000 claims description 10
- 239000002019 doping agent Substances 0.000 claims description 8
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- 229910052799 carbon Inorganic materials 0.000 abstract description 4
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- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 9
- 229910052719 titanium Inorganic materials 0.000 description 7
- 229910052581 Si3N4 Inorganic materials 0.000 description 6
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- 229910052710 silicon Inorganic materials 0.000 description 3
- 239000010703 silicon Substances 0.000 description 3
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- 241000894007 species Species 0.000 description 3
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- 229910052733 gallium Inorganic materials 0.000 description 2
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- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 description 1
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- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
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- 229910052759 nickel Inorganic materials 0.000 description 1
- 231100000989 no adverse effect Toxicity 0.000 description 1
- 238000005457 optimization Methods 0.000 description 1
- GNRSAWUEBMWBQH-UHFFFAOYSA-N oxonickel Chemical compound [Ni]=O GNRSAWUEBMWBQH-UHFFFAOYSA-N 0.000 description 1
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- 238000004544 sputter deposition Methods 0.000 description 1
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- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- WQJQOUPTWCFRMM-UHFFFAOYSA-N tungsten disilicide Chemical compound [Si]#[W]#[Si] WQJQOUPTWCFRMM-UHFFFAOYSA-N 0.000 description 1
- 229910021342 tungsten silicide Inorganic materials 0.000 description 1
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Abstract
本公开涉及在断态期间具有高应力顺应性的HEMT晶体管及其制造方法。HEMT包括缓冲层、缓冲层上的空穴供应层、空穴供应层上的异质结构、以及源极电极。空穴供应层由P型掺杂半导体材料制成,缓冲层掺杂有碳,并且源极电极与空穴供应层直接电接触,使得空穴供应层可以被偏置以促进空穴从空穴供应层到缓冲层的传输。
Description
技术领域
本公开涉及高电子迁移率场效应晶体管(HEMT)和用于制造HEMT晶体管的方法。具体地,本公开涉及在断态期间具有高应力顺应性的HEMT晶体管。
背景技术
基于在异质结处(即具有不同带隙的半导体材料之间的界面处)形成高迁移率二维电子气(2DEG)层的高电子迁移率场效应晶体管(HEMT)是已知的。例如,基于氮化铝镓(AlGaN)层和氮化镓(GaN)层之间的异质结的HEMT晶体管是已知的。
基于AlGaN/GaN异质结的HEMT晶体管提供了各种优点,使得它们特别适合并被广泛用于一系列不同的应用中。例如,HEMT晶体管的高击穿阈值被高性能功率开关使用;导电沟道中电子的高迁移率使得构建高频放大器成为可能。此外,2DEG中的高浓度电子可以实现低通态电阻(RON)。
由于氮化镓衬底的高成本,基于AlGaN/GaN异质结的HEMT晶体管通常通过在硅衬底上生长GaN和AlGaN层来制造。因此,以这种方式构建的HEMT晶体管是平面的,即具有在平行于衬底的平面上排列的源极电极、栅极电极和漏极电极。
当用于功率应用时,取决于电源电压,在HEMT晶体管的断态条件下,源极电极和漏极电极之间的电位降VDS_OFF可能达到几百伏。因此,HEMT晶体管中的故障机制是由于在断态条件下在栅极电极和漏极电极之间的区域中形成高电场并因此导致击穿而引起的。因此,HEMT晶体管的击穿阈值是HEMT晶体管的重要品质因数。
HEMT晶体管的另一个重要品质因数是通态电阻RON,其应该被最小化以节省功耗。
此外,已知的HEMT晶体管中的已知问题涉及由于在断态下的高电压VDS_OFF引起的应力而导致的通态电阻RON的增加。所述RON的可逆增加可归因于一系列因素,包括HEMT晶体管的缓冲层中的陷阱状态内的发射/捕获现象。在已知的HEMT晶体管中,缓冲层根据陷阱状态的量发射空穴,继续在其内部形成负电荷层。该负电荷层导致2DEG的部分清空,从而增加通态电阻RON。
用于单独优化HEMT晶体管的上述品质因数的一系列不同解决方案是已知的。然而,优化一个品质因数通常会对一个或多个其他品质因数有负面影响。
例如,HEMT晶体管的击穿阈值可以通过增加HEMT晶体管的栅极电极和漏极电极之间的距离来增加,由此降低用于相同电源电压的电场。然而,这种解决方案也会导致通态电阻RON的不希望的增加。
另一种已知的解决方案被公开在Tanaka,K.等人的“Suppression of currentcollapse by hole injection from drain in a normally off GaN based hybriddrain embedded gate injection transistor”,Appl.Phys.Lett.,107,163502(2015)。所述文献涉及HEMT晶体管,其中P型掺杂氮化镓(p GaN)层通过在氮化铝镓的阻挡层上生长来形成,并且其被连接到漏极电极。该晶体管具有增加的RON,是由于断态下的应力基本可以忽略不计(VDS_OFF=800V)。尽管如此,无论应力如何,RON的增加在静态条件下仍可被观察到。
因此,提供一种对于击穿阈值没有负面影响的、防止RON由于HEMT晶体管中的断态下的应力而增加的方法是特别重要的。
发明内容
本公开的一个或多个实施例提供了解决现有技术中的缺点的HEMT晶体管及相关制造方法。
本公开的一个或多个实施例涉及包括源极电极和半导体本体的HEMT晶体管,该半导体本体包括缓冲层、布置在缓冲层上的空穴供应层以及布置在空穴供应层上的异质结构。空穴供应层由P型掺杂半导体材料制成,并且源极电极与空穴供应层直接电接触并且被配置为偏置空穴供应层并由此使得空穴供应层将空穴从空穴供应层传输到缓冲层。
本公开的一个或多个实施例涉及用于制造HEMT晶体管的方法,所述方法包括:在半导体衬底上形成半导体材料的缓冲层;在所述缓冲层上形成空穴供应层;在空穴供应层上形成半导体异质结构;以及形成源极电极。形成空穴供应层包括形成P型掺杂半导体材料层。形成源极电极包括形成与空穴供应层直接电接触的源极电极,使得空穴供应层被配置为被偏置以将空穴从空穴供应层传输到缓冲层。
附图说明
以下参考仅作为非限制性示例提供的优选实施例以及附图来进一步描述本公开,在附图中:
图1是根据本公开的一个实施例的HEMT晶体管的横向截面,
图2是根据本公开的另一个实施例的HEMT晶体管的横向截面,
图3是根据本公开的另一个实施例的HEMT晶体管的横向截面,
图4A至图4H示出了图1中的HEMT晶体管的制造步骤,以及
图5是根据本公开的另一个实施例的HEMT晶体管的横向截面。
具体实施方式
图1显示,在相互正交的三个轴X、Y、Z的系统中,在基于AlGaN/GaN异质结的HEMT器件1的平面XZ中的侧视图。
HEMT器件1包括衬底2、布置在衬底2上的缓冲层4、布置在缓冲层4上的空穴供应层6以及布置在空穴供应层6上的异质结或异质结构7。可选地,一个或多个由周期表的III-V族的化合物(包括镓)制成的附加缓冲层(或界面层)(未示出)被布置在衬底2和缓冲层4之间。上述一个或多个界面层被设计为当器件断电时维持漏极电压,并且降低穿透位错的密度并因此减小陷阱态的密度。
衬底2例如由硅或碳化硅(SiC)或蓝宝石(Al2O3)或GaN制成。缓冲层4由本征或N型掺杂氮化镓制成,并且具有高浓度的碳杂质,例如浓度在1016和1019cm-3之间,以便衰减朝向衬底2的垂直泄漏。
空穴供应层6由P型掺杂氮化镓制成,例如使用浓度在1017与3·1019cm-3之间的镁(Mg)。
异质结构7具体地包括布置在掩埋层6顶部上的沟道层10和布置在沟道层10顶部上的阻挡层9。沟道层10由本征氮化镓(GaN)制成。阻挡层9由厚度在10nm和30nm之间的氮化铝镓(AlGaN)制成。沟道层10和阻挡层9通常由如图1所示当耦合在一起时形成能够形成二维气体层(2DEG)的异质结的材料制成。
HEMT器件1还包括布置在异质结构7上的绝缘层12。绝缘层12由电介质材料制成,例如氮化硅(Si3N4)或二氧化硅(SiO2)并且具有5nm至100nm的厚度。
在下文中,衬底2、缓冲层4、空穴供应层6和异质结构7使用术语半导体本体15被称为整体。半导体本体15包含作为HEMT器件1的有源部分的有源区域15a。
HEMT器件1还包括布置在源极区域16和漏极区域18之间的栅极区域14。有源区域15a横向(即,沿着轴线X)布置在源极区域16和漏极区域18之间。有源区域15a在深度方向(即,沿着轴线Z)延伸到半导体本体15的层中,在有源区域15a中布置有中栅极区域14、源极区域16和漏极区域18。
栅极区域14通过绝缘层12的相应部分横向地与源极区域16和漏极区域18分离。栅极区域14在深度方向延伸穿过绝缘层12并进入异质结构7中,终止于阻挡层9和沟道层10之间的界面处。
栅极区域14形成于在半导体本体15的一部分中挖出的沟槽19中,沟槽19的深度与栅极区域14的深度相同。由绝缘材料(诸如二氧化硅)制成的电介质层11被布置在绝缘层12上并且在沟槽19内部,部分地填充沟槽19并且在沟槽19内部形成栅极电介质层14a。具体地,栅极电介质层14a被布置在沟槽19的底部和内侧壁上。栅极金属化层14b布置在栅极电介质层14a上的沟槽19中,完全填充沟槽19,并由此形成栅极电极。栅极电介质层14a和栅极金属化层14b形成HEMT器件1的栅极区域14。
由诸如钛(Ti)或铝(Al)的导电材料制成的源极区域16延伸穿过绝缘层12和异质结构7,终止于空穴供应层6内部。
由诸如钛(Ti)或铝(Al)之类的导电材料制成的漏极区域18延伸穿过绝缘层12,终止于绝缘层12与阻挡层9之间的界面处。根据未在附图中示出的另一个实施例,漏极区18可以是凹陷的,即穿透绝缘层12和阻挡层9之间的界面下方的半导体本体15的一部分。
HEMT器件1是常断器件,偏置并通过用大于阈值电压Vth的电压VG偏置栅极区域14而导通,以在源极区域16与漏极区域18之间产生导电沟道。在使用中,源极区域16与漏极区域18之间的电流IDS的值取决于阻挡层9与沟道层10之间的界面处2DEG中的电子浓度。缓冲层4具有陷阱态,是例如由于其中的杂质的高浓度。缓冲层4根据陷阱态的数量发射空穴,继续在缓冲层内部形成负电荷层。该负电荷层导致2DEG中电子浓度的降低。此外,当HEMT晶体管处于断态时,源极区域16与漏极区域18之间存在高电压VDS_OFF。由断态下的电压VDS_OFF引起的应力在缓冲层4内部产生进一步的陷阱态。空穴供应层6具有高浓度的P型杂质,并因此是空穴的来源,以替代由缓冲层4发射的空穴并中和其内部的负电荷层。根据本公开的一个方面,源极区域16延伸到空穴供应层6,并且偏置空穴供应层6,以促进空穴从空穴供应层6到缓冲层4的传输。因此,在断态下电压VDS_OFF引起的应力之后,HEMT晶体管1不受通态电阻RON的增加的影响。
通过适当选择空穴供应层6的厚度tp、沟道层10的厚度tu和空穴供应层6的掺杂物种的表面浓度NA,可以对缓冲层4内的负电荷层的中和机制进行优化。申请人已经证实,对于沟道层10的给定厚度tu和空穴供应层6的掺杂物种的给定表面浓度NA,空穴供应层6的厚度tp优选地使用以下方程式来确定:
其中q是元电荷(约1.6·10-19C);B是缓冲层4的材料的带隙;EA是能带图中陷阱态之间的距离,例如由碳原子的存在以及缓冲层(4)的价带产生的;并且ε是空穴供应层6的材料的介电常数。在该实施例中,缓冲层4是氮化镓的碳掺杂层,其中B=3.4eV,EA=0.9eV,ε=9ε0,其中ε0是空隙的介电常数。EA的值可以使用文献中提供的已知方法来确定,例如在A.Chini等人的“Experimental and Numerical Analysis of Hole Emission ProcessFrom Carbon-Related Traps in GaN Buffer Layers”,Trans.Elec.Dev.,63(9),3473–3478页,2016。
例如,对于空穴供应层6中的活性掺杂物种的浓度NA=1017cm-2以及沟道层10的厚度tu=100nm,优选的是选择空穴供应层6的厚度tp大于204nm。更一般地,空穴供应层6可具有10nm与1μm之间的厚度以及1017cm-2与1019cm-2之间的活性掺杂物种的浓度,而沟道层10可具有10nm与1μm之间的厚度。
图2示出了根据本公开的另一个实施例的常通HEMT晶体管21。图2中的HEMT晶体管21的与图1中的HEMT晶体管1共同的元件使用相同的附图标记标识,并且不再进一步描述。参考图2,栅极区域14在深度方向延伸到绝缘层12中,终止于绝缘层12和阻挡层9之间的界面处。因此,与图1中的HEMT晶体管1不同,栅极区域14没有延伸到阻挡层9中。
布置成与空穴供应层6直接电接触的源极区域16的存在使得可以获得与上述关于HEMT晶体管1相同的优点。
图3示出了根据本公开的另一实施例的常断HEMT晶体管31。图3中的HEMT晶体管31的与图1中的HEMT晶体管1共同的元件使用相同的附图标记标识,并且不再进一步描述。参考图3,栅极区域14延伸穿过绝缘层12、异质结构7、空穴供应层6和缓冲层4的一部分,终止于缓冲层4内部。
布置成与空穴供应层6直接电接触的源极区域16的存在使得可以获得与上述关于HEMT晶体管1相同的优点。
在使用期间,当栅极区域14以大于阈值电压Vth的电压VG被偏置时,导电沟道32(用箭头示意性示出)在栅极区域14下方在源极区域16和漏极区域18之间被创建,该导电沟道32穿过空穴供应层6沿着轴线Z并且穿过缓冲层4沿着轴线X延伸。这确保了通过p型GaN空穴供应层6的电流的路径被最小化,并且通态电阻RON被进一步优化。
图1中的HEMT器件1的制造步骤在下文参考图4A至图4H来描述。
图4A是根据本公开的一个实施例的在HEMT器件1的制造步骤期间晶片40的一部分的截面。与参照图1描述并且在图1中示出的主题相同的晶片40的元件使用相同的附图标记来指示。
具体地且如图4A所示,晶片40被布置,该晶片40包括:衬底2,该衬底2例如由硅(Si)或碳化硅(SiC)或氧化铝(Al 2O3)制成,其前侧2a和后侧2b在z方向上彼此相对布置;以及缓冲层4,其由本征或N型掺杂氮化镓(GaN)制成,缓冲层4的低侧4a被布置在衬底2的前侧2a上(附图中未示出的附加界面层也可以被包括)。
如图4B所示,由P型掺杂氮化镓(GaN)制成的空穴供应层6然后例如使用外延生长来形成。举例来说,空穴供应层6的厚度tp在10nm和1μm之间,基于上面给出的方程式(1)来确定。
如图4C所示,异质结构7然后被形成。在第一步骤中,由本征氮化镓(GaN)制成的沟道层10例如使用外延生长来形成。沟道层10的厚度tu在10nm和1μm之间,基于上面给出的方程式(1)来确定。由氮化铝镓(AlGaN)制成的阻挡层9然后例如使用外延生长来形成。阻挡层9的厚度在10nm和30nm之间。阻挡层9的暴露的上侧形成异质结构7的前侧7a。
如图4D所示,由诸如氮化硅(SiN)、氧化硅(SiO2)、氧化镍(NiO)或其他材料之类的绝缘或电介质材料制成的绝缘层12然后在异质结构7的正面7a上被形成。绝缘层12具有5nm至300nm之间的厚度,例如100nm,并且通过化学气相沉积(CVD)或原子层沉积(ALD)形成。
如图4E所示,绝缘层12然后例如使用光刻和蚀刻步骤选择性地去除,以便在晶片40的将要在连续的步骤中形成栅极区域14的区域(或者在有源区域15a的一部分中)中去除其中的选定部分。
蚀刻步骤然后在阻挡层9上被执行,使用与绝缘层12的蚀刻步骤相同的光刻掩模。一旦到达与沟道层10的界面,蚀刻就终止。这形成了沟槽19。备选地,以未在图中示出的方式,用于阻挡层9的蚀刻步骤不被执行,以制造图2中的HEMT晶体管21。备选地,以未在图中示出的方式,阻挡层9的蚀刻步骤之后是沟道层10的蚀刻步骤、空穴供应层6的蚀刻步骤和缓冲层4的蚀刻步骤,使用与绝缘层12的蚀刻步骤相同的光刻掩模,以制造图3中的HEMT晶体管31。在这种情况下,沟道层10和空穴供应层6在由绝缘层12的蚀刻步骤的光刻掩模限定的选定部分中被完全去除,在到达与衬底2的界面之前缓冲层4的蚀刻在缓冲层4内部终止。
如图4F所示,例如由选自氮化铝(AlN)、氮化硅(SiN)、氧化铝(Al2O3)和氧化硅(SiO2)的材料制成的栅极电介质层14a的沉积或生长步骤然后被执行。栅极电介质层14a的厚度被选择在5nm与50nm之间。
如图4G所示,一个或多个另外的掩模蚀刻步骤然后在电介质层14a、绝缘层12和半导体本体15上被执行,以去除布置在晶片40的如下区域中的选定部分,在这些区域中HEMT器件1的源极区域16和漏极区域18将被形成。具体地,第一孔60a和第二孔60b被形成在栅极区域14的沿着X的相对侧上并且远离栅极区域14。第一孔60a在深度方向上延伸穿过绝缘层12和异质结构7,终止于空穴供应层6内部。第二孔60b在深度方向上延伸穿过绝缘层12,终止于绝缘层12和阻挡层9之间的界面处。可选地,以未在附图中示出的方式,第二孔60b可以穿透绝缘层12和阻挡层9之间的界面下方的半导体本体15的一部分。
如图4H所示,欧姆接触形成步骤然后被执行以形成源极区域16和漏极区域18,使用溅射或蒸发器和用于剥离的光刻掩模在孔60a、60b内沉积导电材料,具体是诸如钛(Ti)或铝(Al)的金属,或其合金或化合物。导电材料完全填充孔60a、60b,分别形成源极区16和漏极区18。在沉积之后,快速热退火(RTA)步骤被执行,例如在约500℃与800℃之间的温度持续30秒至2分钟之间的时间。
晶片40上的导电材料的沉积步骤然后被执行以在栅极电介质层14a上形成栅极金属化层14b,具体是完全填充沟槽19。例如,栅极金属化层14b由诸如钽(Ta)、氮化钽(TaN)、氮化钛(TiN)、钯(Pa)、钨(W)、硅化钨(WSi2)、钛铝(Ti/Al)、镍金(Ni/Au)之类的金属材料制成。栅极金属化层14b使用本身已知的光刻步骤被选择性地沉积在沟槽19中并且在源极区域16和漏极区域18之间的一定距离处。栅极金属化层14b和栅极电介质层14a一起形成图1中的HEMT器件1的凹陷栅极区域14。
图1所示的HEMT器件1因此被形成。
图5示出了根据本公开的另一实施例的常断HEMT晶体管51。图5中的HEMT晶体管51的与图1中的HEMT晶体管1共同的元件使用相同的附图标记标识,并且不再进一步描述。
参考图5,HEMT晶体管51包括布置在源极区域16和漏极区域18之间的绝缘层12上的导电材料的栅极电极54,并且与上述区域分离。由诸如钛(Ti)或铝(Al)之类的导电材料制成的漏极区域18延伸穿过绝缘层12和阻挡层9,终止于阻挡层9和沟道层10之间的界面处。
HEMT晶体管51还包括P型掺杂氮化镓的掩埋区域56,其在栅极电极54下方且与栅极电极54直接接触地延伸,在深度方向穿过绝缘层12,终止于绝缘层12与阻挡层9之间的界面处。由栅极电极54和掩埋区域56形成的结构在现有技术中被称为“p-GaN栅极”,并且包含这种结构的HEMT晶体管被称为“p-GaN栅极晶体管”。
布置成与空穴供应层6直接电接触的源极区域16的存在使得可以获得与上述关于HEMT晶体管1相同的优点。
根据上述内容,根据本公开的公开内容的优点是显而易见的。具体地,本公开使得能够在不降低击穿阈值以及在应力之前不增加RON的值的情况下,消除应力对RON的影响。
最后,显而易见的是,可以对所描述和示出的主题进行修改和变化,而不超出如所附权利要求书所限定的本公开的保护范围。
例如,晶片正面上的触点(源极、漏极、栅极)的金属化可以使用文献中已知的任何变型(诸如使用AlSiCu/Ti、Al/Ti或W插塞等等形成触点)来执行。
此外,缓冲层4、空穴供应层6和异质结构7可以由选自III-Ⅴ族中的化合物材料的其它材料制成。
上文描述的各种实施例可以被组合以提供进一步的实施例。根据以上详细描述,对这些实施例的这些和其他改变可以被做出。通常,在下面的权利要求中,所使用的术语不应该被解释为将权利要求限制为说明书和权利要求书中公开的具体实施例,而是应该被解释为包括所有可能的实施例以及这些权利要求所赋予权利的等同物的全部范围。
Claims (20)
1.一种高电子迁移率晶体管(HEMT),包括:
半导体本体,所述半导体本体包括缓冲层、布置在所述缓冲层上的空穴供应层和布置在所述空穴供应层上的异质结构,以及
源极电极,其中所述空穴供应层由P型掺杂的半导体材料制成,并且所述源极电极与所述空穴供应层直接电接触,并且所述源极电极被配置为偏置所述空穴供应层并且由此引起所述空穴供应层将空穴从所述空穴供应层传输到所述缓冲层。
2.根据权利要求1所述的HEMT,其中所述异质结构包括布置在所述空穴供应层上的沟道层和布置在所述沟道层上的阻挡层,并且其中所述沟道层和所述阻挡层由包括III-V族元素的相应化合物材料制成。
3.根据权利要求2所述的HEMT,其中所述沟道层的厚度tu、所述空穴供应层的掺杂物种的表面浓度NA和所述空穴供应层的厚度tp中的至少一个使用以下方程式来确定:
其中q是元电荷;所述缓冲层的半导体材料具有带隙B;所述缓冲层具有价带和陷阱态距所述价带的距离EA;以及ε是所述空穴供应层的半导体材料的介电常数。
4.根据权利要求2所述的HEMT,其中所述沟道层具有在100nm与500nm之间的厚度tu,所述空穴供应层具有大于6·1016cm-2的掺杂物种的表面浓度NA,并且所述空穴供应层具有大于300nm的厚度tp。
5.根据权利要求2所述的HEMT,进一步包括:
漏极电极,所述漏极电极被布置为与所述源极电极相距一定距离并且与所述半导体本体直接电接触,以及
栅极,所述栅极被布置为与所述源极电极和所述漏极电极相距一定距离并且与所述半导体本体直接接触,所述栅极延伸到所述阻挡层和所述沟道层之间的界面,终止于所述空穴供应层的外部,所述栅极包括栅极电极和栅极电介质。
6.根据权利要求2所述的HEMT,进一步包括:
绝缘层,所述绝缘层被布置在所述异质结构上;
漏极电极,所述漏极电极被布置为与所述源极电极相距一定距离并与所述半导体本体直接电接触;以及
栅极,所述栅极包括栅极电极和栅极电介质,所述栅极被布置为与所述源极电极和所述漏极电极相距一定距离,所述栅极延伸到所述绝缘层和所述阻挡层之间的界面,终止于所述阻挡层的外部。
7.根据权利要求2所述的HEMT,进一步包括:
漏极电极,所述漏极电极被布置为与所述源极电极相距一定距离并且与所述半导体本体直接电接触,
栅极,所述栅极包括栅极电极和栅极电介质,所述栅极被布置为与所述源极电极和所述漏极电极相距一定距离并且与所述半导体本体直接电接触,所述栅极延伸到所述空穴供应层和所述缓冲层之间的界面,终止于所述缓冲层内部。
8.根据权利要求2所述的HEMT,还包括:
漏极电极,所述漏极电极延伸到所述阻挡层和所述沟道层之间的界面,以及
栅极电极,所述栅极电极包括金属区域和在所述金属区域与所述异质结构之间的P型掺杂氮化镓区域。
9.根据权利要求1所述的HEMT,其中所述缓冲层包括杂质,所述杂质被配置为产生促进空穴从所述缓冲层发射的陷阱态,从而在所述缓冲层内部形成负电荷层。
10.一种制造高电子迁移率晶体管(HEMT)的方法,所述方法包括:
在半导体衬底上形成半导体材料的缓冲层,
在所述缓冲层上形成空穴供应层,
在所述空穴供应层上形成半导体异质结构,以及
形成源极电极,
其中:
形成所述空穴供应层包括形成P型掺杂半导体材料层,以及
形成所述源极电极包括形成与所述空穴供应层直接电接触的所述源极电极,使得所述空穴供应层被配置为被偏置以将空穴从所述空穴供应层传输到所述缓冲层。
11.根据权利要求10所述的方法,其中形成所述异质结构包括:
在所述空穴供应层上形成III-V族半导体沟道层,以及
在所述沟道层上形成III-V族半导体阻挡层。
12.根据权利要求11所述的方法,其中形成所述沟道层包括形成具有厚度tu的所述沟道层,并且形成所述空穴供应层包括形成具有掺杂物种的表面浓度NA和厚度tp的所述空穴供应层,所述厚度tu、所述厚度tp和所述表面浓度NA中的至少一个使用以下方程式来确定:
其中q是元电荷;所述缓冲层的半导体材料具有带隙B;所述缓冲层具有价带和陷阱态距所述价带的距离EA;以及ε是所述空穴供应层的半导体材料的介电常数。
13.根据权利要求11所述的方法,其中:
形成所述沟道层包括形成具有在100nm和500nm之间的厚度的所述沟道层,以及
形成所述空穴供应层包括形成具有大于6·1016cm-2的掺杂物种的表面浓度和大于300nm的厚度的所述空穴供应层。
14.根据权利要求11所述的方法,进一步包括:
形成漏极电极,所述漏极电极与所述源极电极相距一定距离并且与所述异质结构直接电接触;
在所述半导体本体内部挖出沟槽至所述阻挡层和所述沟道层之间的界面,终止于所述空穴供应层的外部;以及
在距所述源极电极和所述漏极电极一定距离处并且在所述沟槽中形成栅极电极。
15.根据权利要求11所述的方法,进一步包括:
形成漏极电极,所述漏极电极与所述源极电极相距一定距离并且与所述异质结构直接电接触;
在所述异质结构上形成绝缘层;
在所述绝缘层内部挖出沟槽至所述绝缘层与所述阻挡层之间的界面,终止于所述阻挡层的外部;以及
在距所述源极电极和所述漏极电极一定距离处并且在所述沟槽中形成栅极电极。
16.根据权利要求11所述的方法,进一步包括:
形成漏极电极,所述漏极电极与所述源极电极相距一定距离并且与所述异质结构直接电接触;
在所述半导体本体内部挖出沟槽至所述空穴供应层和所述缓冲层之间的界面,终止于所述缓冲层的内部;以及
在所述沟槽中形成栅极电极。
17.根据权利要求11所述的方法,进一步包括:
形成漏极电极至所述阻挡层和所述沟道层之间的界面,以及
形成栅极电极,其中形成所述栅极电极包括:
形成金属区域,以及
在所述金属区域和所述异质结构之间形成P型掺杂氮化镓区域。
18.根据权利要求10所述的方法,其中形成所述缓冲层包括将杂质引入到所述缓冲层中,所述杂质被设计为产生促进空穴从所述缓冲层发射的陷阱态,由此在所述缓冲层内部形成负电荷层。
19.一种高电子迁移率晶体管(HEMT),包括:
半导体本体,所述半导体本体包括空穴供应层和布置在所述空穴供应层上的异质结构,所述空穴供应层由P型掺杂半导体材料制成;
源极电极,所述源极电极与所述空穴供应层直接电接触,并且所述源极电极被配置为偏置所述空穴供应层并且由此引起所述空穴供应层将空穴从所述空穴供应层传输到所述缓冲层;
漏极电极,所述漏极电极被布置为与所述源极电极相距一定距离并且与所述半导体本体直接电接触;以及
栅极,所述栅极被布置为与所述源极电极和所述漏极电极相距一定距离并且被耦合到所述半导体本体。
20.根据权利要求19所述的HEMT,其中:
所述异质结构包括布置在所述空穴供应层上的沟道层和布置在所述沟道层上的阻挡层,并且其中所述沟道层和所述阻挡层由包括III-V族元素的相应化合物材料制成;以及
所述栅极包括栅极电极和与所述半导体本体直接接触的栅极电介质,所述栅极延伸到所述阻挡层和所述沟道层之间的界面,终止于所述空穴供应层的外部。
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CN112771677A (zh) * | 2020-12-18 | 2021-05-07 | 英诺赛科(苏州)科技有限公司 | 半导体器件以及制造半导体器件的方法 |
US11888054B2 (en) | 2020-12-18 | 2024-01-30 | Innoscience (Suzhou) Technology Co., Ltd. | Semiconductor device and method for manufacturing the same |
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US10937873B2 (en) | 2019-01-03 | 2021-03-02 | Cree, Inc. | High electron mobility transistors having improved drain current drift and/or leakage current performance |
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US11658233B2 (en) | 2019-11-19 | 2023-05-23 | Wolfspeed, Inc. | Semiconductors with improved thermal budget and process of making semiconductors with improved thermal budget |
Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000174260A (ja) * | 1998-12-02 | 2000-06-23 | Fujitsu Ltd | 半導体装置 |
US20100117146A1 (en) * | 2008-11-13 | 2010-05-13 | Furukawa Electric Co., Ltd. | Semiconductor device and method for fabricating the same |
CN102237402A (zh) * | 2010-05-06 | 2011-11-09 | 株式会社东芝 | 氮化物半导体元件 |
US20150162428A1 (en) * | 2013-12-05 | 2015-06-11 | Seoul Semiconductor Co., Ltd. | Nitride-based transistors having structures for suppressing leakage current |
CN104716176A (zh) * | 2013-12-16 | 2015-06-17 | 瑞萨电子株式会社 | 半导体器件 |
CN104821340A (zh) * | 2014-02-05 | 2015-08-05 | 瑞萨电子株式会社 | 半导体器件 |
CN105261643A (zh) * | 2015-09-22 | 2016-01-20 | 宁波大学 | 一种高击穿电压氮化镓基高电子迁移率晶体管 |
CN208861994U (zh) * | 2017-06-09 | 2019-05-14 | 意法半导体股份有限公司 | 高电子迁移率晶体管 |
Family Cites Families (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4775859B2 (ja) * | 2007-08-24 | 2011-09-21 | シャープ株式会社 | 窒化物半導体装置とそれを含む電力変換装置 |
US8653559B2 (en) * | 2011-06-29 | 2014-02-18 | Hrl Laboratories, Llc | AlGaN/GaN hybrid MOS-HFET |
KR101922120B1 (ko) * | 2012-07-19 | 2018-11-26 | 삼성전자주식회사 | 고전자이동도 트랜지스터 및 그 제조방법 |
-
2017
- 2017-06-09 IT IT102017000064155A patent/IT201700064155A1/it unknown
-
2018
- 2018-06-08 EP EP18176875.5A patent/EP3413352A1/en not_active Withdrawn
- 2018-06-08 EP EP22184384.0A patent/EP4092756A3/en active Pending
- 2018-06-08 US US16/004,257 patent/US10516041B2/en active Active
- 2018-06-11 CN CN201820930797.9U patent/CN208861994U/zh active Active
- 2018-06-11 CN CN201810597967.0A patent/CN109037324B/zh active Active
Patent Citations (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2000174260A (ja) * | 1998-12-02 | 2000-06-23 | Fujitsu Ltd | 半導体装置 |
US20100117146A1 (en) * | 2008-11-13 | 2010-05-13 | Furukawa Electric Co., Ltd. | Semiconductor device and method for fabricating the same |
CN102237402A (zh) * | 2010-05-06 | 2011-11-09 | 株式会社东芝 | 氮化物半导体元件 |
US20150162428A1 (en) * | 2013-12-05 | 2015-06-11 | Seoul Semiconductor Co., Ltd. | Nitride-based transistors having structures for suppressing leakage current |
CN104716176A (zh) * | 2013-12-16 | 2015-06-17 | 瑞萨电子株式会社 | 半导体器件 |
CN104821340A (zh) * | 2014-02-05 | 2015-08-05 | 瑞萨电子株式会社 | 半导体器件 |
CN105261643A (zh) * | 2015-09-22 | 2016-01-20 | 宁波大学 | 一种高击穿电压氮化镓基高电子迁移率晶体管 |
CN208861994U (zh) * | 2017-06-09 | 2019-05-14 | 意法半导体股份有限公司 | 高电子迁移率晶体管 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN112771677A (zh) * | 2020-12-18 | 2021-05-07 | 英诺赛科(苏州)科技有限公司 | 半导体器件以及制造半导体器件的方法 |
WO2022126571A1 (en) * | 2020-12-18 | 2022-06-23 | Innoscience (Suzhou) Technology Co., Ltd. | Semiconductor device and method for manufacturing thereof |
US11888054B2 (en) | 2020-12-18 | 2024-01-30 | Innoscience (Suzhou) Technology Co., Ltd. | Semiconductor device and method for manufacturing the same |
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