CN108962767A - 半导体结构及其形成方法 - Google Patents
半导体结构及其形成方法 Download PDFInfo
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- CN108962767A CN108962767A CN201710363176.7A CN201710363176A CN108962767A CN 108962767 A CN108962767 A CN 108962767A CN 201710363176 A CN201710363176 A CN 201710363176A CN 108962767 A CN108962767 A CN 108962767A
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- plastic packaging
- semiconductor structure
- forming method
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- 238000000034 method Methods 0.000 title claims abstract description 74
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- 238000004806 packaging method and process Methods 0.000 claims abstract description 83
- 239000004033 plastic Substances 0.000 claims abstract description 82
- 230000009467 reduction Effects 0.000 claims abstract description 47
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- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 9
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- 229910052802 copper Inorganic materials 0.000 claims description 9
- 239000011521 glass Substances 0.000 claims description 9
- 238000004080 punching Methods 0.000 claims description 8
- 239000004411 aluminium Substances 0.000 claims description 6
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 6
- 229910052782 aluminium Inorganic materials 0.000 claims description 6
- 241000931526 Acer campestre Species 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 239000000919 ceramic Substances 0.000 claims description 3
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- 238000006116 polymerization reaction Methods 0.000 claims 1
- 238000002161 passivation Methods 0.000 description 11
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- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical group [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
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- 229910052710 silicon Inorganic materials 0.000 description 1
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- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 238000004528 spin coating Methods 0.000 description 1
- 229910052715 tantalum Inorganic materials 0.000 description 1
- GUVRBAGPIYLISA-UHFFFAOYSA-N tantalum atom Chemical compound [Ta] GUVRBAGPIYLISA-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
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- 229910052721 tungsten Inorganic materials 0.000 description 1
Classifications
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Abstract
本发明提供一种半导体结构及其形成方法,其中,所述形成方法包括:提供衬底,所述衬底包括相对的第一面和第二面,所述第一面为功能面;在所述衬底第一面上形成塑封层;形成所述塑封层之后,对所述衬底第二面进行减薄处理。其中,进行所述减薄处理之前,在所述衬底第一面上形成塑封层。所述塑封层能够在所述减薄处理过程中,对所述衬底进行支撑,抑制塑封层发生褶皱或破碎。所述塑封层还用作对所述衬底进行封装的材料,所述减薄处理之后,所述塑封层不需要去除,从而能够简化工艺流程,降低工艺成本。
Description
技术领域
本发明涉及半导体制造技术领域,尤其涉及一种半导体结构及其形成方法。
背景技术
随着集成电路集成度的提高,封装技术越来越成为了微电子行业关注的热点。晶圆减薄是先进封装技术的组成部分,在芯片封装中具有重要应用。
减薄后的晶圆厚度很小,为了防止晶圆发生褶皱或断裂。现有技术对晶圆进行减薄的步骤包括:提供载片;将晶圆与载片进行键合;将晶圆与载片进行键合之后,对所述载片暴露出的晶圆表面进行减薄处理;所述减薄处理之后,对所述载片进行解键合,从而去除所述载片。
然而,现有的半导体结构的形成方法工艺复杂,生产成本较高。
发明内容
本发明解决的问题是提供一种半导体结构及其形成方法,能够简化工艺流程,降低生产成本。
为解决上述问题,本发明提供一种半导体结构的形成方法,包括:提供衬底,所述衬底包括相对的第一面和第二面,所述第一面为功能面;在所述衬底第一面上形成塑封层;形成所述塑封层之后,对所述衬底第二面进行减薄处理。
可选的,所述塑封层的材料为聚合物。
可选的,形成所述塑封层的步骤包括:在所述衬底第一面上形成前驱体;对所述前驱体进行加热处理,使所述前驱体固化,形成所述塑封层。
可选的,所述塑封层的厚度为100μm~600μm。
可选的,所述减薄处理的工艺包括:化学机械抛光工艺或TAIKO工艺。
可选的,所述减薄处理之前,还包括:在所述塑封层上形成覆盖层;所述减薄处理之后,去除所述覆盖层。
可选的,所述覆盖层的材料为玻璃。
可选的,所述减薄处理之后,还包括:在所述塑封层上形成第一连接层和位于所述第一连接层上的第一散热板。
可选的,所述减薄处理之后,还包括:在所述衬底第二面上形成第二连接层和第二散热板,所述第二连接层位于所述衬底第二面和所述第二散热板之间。
可选的,所述减薄处理之后,还包括:在所述衬底第二面上形成第二连接层和第二散热板,所述第二连接层位于所述衬底第二面和所述第二散热板之间,所述第一散热板和第二散热板的材料为陶瓷。
可选的,所述衬底第一面上具有焊盘;形成所述塑封层之前,还包括:在所述焊盘上形成连接柱。
可选的,所述连接柱的材料为铜或铝。
可选的,形成所述连接柱的步骤包括:在所述衬底第一面上和所述焊盘表面形成种子层;在所述种子层上形成第一光刻胶,所述第一光刻胶暴露所述焊盘表面的种子层;在所述第一光刻胶暴露出的种子层上形成连接柱。
可选的,所述塑封层覆盖所述连接柱侧壁和顶部表面;所述减薄处理之后,还包括:对所述塑封层进行打孔处理,在所述塑封层中形成焊孔,所述焊孔底部暴露出所述连接柱顶部表面;在所述焊孔中形成焊料层。
可选的,所述连接柱的材料为铜,所述焊料层的材料为锡。
可选的,所述打孔处理的工艺包括激光打孔。
可选的,所述打孔处理的工艺参数包括:激光波长为532nm。
可选的,所述焊料层表面高于所述塑封层表面。
可选的,形成所述焊料层的步骤包括:在所述塑封层上形成第二光刻胶,所述第二光刻胶暴露出所述焊料孔底部的连接柱顶部表面;在所述焊料孔中形成焊料层。
相应的,本发明还提供一种由上述形成方法形成的半导体结构。
与现有技术相比,本发明的技术方案具有以下优点:
本发明技术方案提供的半导体结构的形成方法中,进行所述减薄处理之前,在所述衬底第一面上形成塑封层。所述塑封层能够在所述减薄处理过程中,对所述衬底进行支撑,抑制塑封层发生褶皱或破碎。所述塑封层还用作对所述衬底进行封装的材料,所述减薄处理之后,所述塑封层不需要去除,从而能够简化工艺流程,降低工艺成本。
进一步,所形成的半导体结构包括第一散热板和第二散热板,所述衬底可以通过第一散热板和第二散热板进行散热,从而有利于增加衬底的散热,提高所形成半导体结构的性能。
附图说明
图1至图4是一种半导体结构的形成方法各步骤的结构示意图;
图5至图14是本发明半导体结构的形成方法一实施例各步骤的结构示意图。
具体实施方式
半导体结构及其形成方法存在诸多问题,例如:半导体结构的形成方法工艺复杂,生产成本较高。
现结合现一种半导体结构的形成方法,分析所述形成方法形成的半导体结构性能较差的原因:
图1至图4是一种半导体结构的形成方法各步骤的结构示意图。
请参考图1,提供初始基底,所述初始基底包括:衬底100,所述衬底100包括相对的第一面101和第二面102;位于所述衬底100第一面101上的焊盘110;位于所述焊盘110和衬底100上的钝化层111,所述钝化层111暴露出部分焊盘110表面。
继续参考图1,提供载晶圆120;通过胶合剂121将所述载晶圆120与所述钝化层111和焊盘110进行键合。
请参考图2,所述键合之后,对所述衬底100第二面102进行减薄处理,形成主衬底103和位于所述主衬底103周围的支撑衬底104。
请参考图3,所述减薄处理之后,去除所述载晶圆120使所述初始基底形成基底10。
请参考图4,提供基板11,所述基板11上具有散热板12,所述散热板12上具有分立的第一导电层13和第二导电层14;使所述基底10第二面102通过焊层15与所述第二导电层14连接;通过导线16使所述基底10中的焊盘110与所述第一导电层13相连。
其中,在所述减薄处理过程中,所述主衬底103的厚度逐渐减小。为了防止所述主衬底103在减薄处理过程中发生褶皱或开裂,需要使所述初始基底与所述载晶圆键合。所述减薄处理之后,需要通过解键合去除所述载晶圆。所述工艺过程较复杂。
为解决所述技术问题,本发明提供了一种半导体结构的形成方法,包括:提供衬底,所述衬底包括相对的第一面和第二面,所述第一面为功能面;在所述衬底第一面上形成塑封层;形成所述塑封层之后,对所述衬底第二面进行减薄处理。
其中,进行所述减薄处理之前,在所述衬底第一面上形成塑封层。所述塑封层能够在所述减薄处理过程中,对所述衬底进行支撑,抑制塑封层发生褶皱或破碎。所述塑封层还用做对所述衬底进行封装的材料,所述减薄处理之后,所述塑封层不需要去除,从而能够简化工艺流程,降低工艺成本。
为使本发明的上述目的、特征和优点能够更为明显易懂,下面结合附图对本发明的具体实施例做详细的说明。
图5至图14是本发明半导体结构的形成方法一实施例各步骤的结构示意图。
请参考图5,提供衬底200,所述衬底200包括相对的第一面201和第二面202,所述第一面201为功能面。
本实施例中,所述衬底200为芯片或晶圆。
所述第一面201为功能面,所述功能面为具有半导体器件的面。
所述衬底200第一面201具有半导体器件。具体的,本实施例中,所述半导体器件包括IGBT。在其他实施例中,所述半导体器件还可包括MOS晶体管、二级管、三级管或电阻。
所述IGBT包括:位于所述衬底200中的漂移区;位于所述漂移区中的栅极结构,位于所述栅极结构两侧漂移区中的阱区;位于所述阱区中的发射区。
本实施例中,所述衬底200上具有焊盘210。在其他实施例中,所述衬底上还可以不具有所述焊盘。
本实施例中,所述焊盘210的个数为多个(图中示出一个),所述焊盘210分别连接所述发射区和栅极结构。
所述焊盘210的材料为铜或铝。
本实施例中,所述衬底200和所述焊盘210上还具有钝化层211。所述钝化层211用于保护所述衬底200,减小外界环境对所述衬底200的影响。
本实施例中,所述钝化层211的材料为氮化硅或聚酰胺。
后续在所述焊盘210上形成连接柱。
本实施例中,形成所述连接柱的步骤如图6和图7所示。
请参考图6,在所述钝化层211和所述焊盘210表面形成种子层212。
所述种子层212用于为后续形成连接柱220提供籽晶。
本实施例中,所述种子层212的材料为铜。
本实施例中,形成所述种子层212的工艺包括物理气相沉积工艺。
如果所述种子层212的厚度过小,不容易为后续形成的连接柱220提供完整的晶格结构;如果所述种子层212的厚度过大,容易加大工艺难度。具体的,所述种子层212的厚度为1000埃~6000埃。
本实施例中,形成所述种子层212之前,还包括:在所述钝化层211和焊盘210上形成阻挡层(图中未示出)。
所述阻挡层用于隔离所述钝化层211与所述种子层212,抑制所述种子层212材料原子向所述钝化层211扩散。
所述阻挡层的材料为氮化钛、氮化钽、钛或钽。
如果所述阻挡层的厚度过小,不利于阻挡种子层212材料原子向所述钝化层211扩散;如果所述阻挡层的厚度过大,容易加大工艺难度。具体的,所述阻挡层的材料为100埃~500埃。
继续参考图6,在所述种子层212上形成第一光刻胶221,所述第一光刻胶221暴露出所述焊盘210表面的种子层212。
所述第一光刻胶221用于定义后续形成的连接柱的尺寸和位置。
本实施例中,形成所述第一光刻胶221的工艺包括旋涂工艺。
请参考图7,在所述第一光刻胶221暴露出的种子层212上形成连接柱220。
所述连接柱220用于实现所述焊盘210与后续形成的第一连接层之间的电连接。
本实施例中,所述连接柱220的材料为铜。在其他实施例中,所述连接柱的材料还可以为铝或钨。
本实施例中,形成所述连接柱220的工艺包括电化学镀膜工艺。
在所述第一光刻胶221暴露出的种子层212上形成连接柱220之后,还包括:去除所述第一光刻胶221。
请参考图8,在所述衬底200第一面201上形成塑封层240。
所述塑封层240用于在后续减薄处理过程中支撑所述衬底200,防止所述衬底200破碎。所述塑封层240还可以用做封装材料,隔离所述衬底200与外界环境,从而防止外界环境对所述衬底200的影响。
本实施例中,所述塑封层240覆盖所述连接柱220顶部和侧壁表面。在其他实施例中,所述塑封层还可以暴露出所述连接柱顶部。
本实施例中,所述塑封层240的材料为聚合物。
本实施例中,形成所述塑封层240的步骤包括:在所述衬底200第一面201上形成前驱体;对所述前驱体进行加热处理,使所述前驱体固化形成所述塑封层240。
所述前驱体为流体对所述连接柱220的覆盖性好,能够充分隔离外界环境与所述衬底200;所述前驱体固化之后形成的塑性层具有较强的硬度,能够在后续减薄处理过程中对衬底200进行支撑。
如果所述塑封层240的厚度过小,不利于对所述衬底200进行支撑和保护;如果所述塑封层240的厚度过大,容易增加工艺难度。具体的,所述塑封层240的厚度为100μm~600μm。
请参考图9,在所述塑封层240上形成覆盖层230。
所述覆盖层230用于保护所述塑封层240,防止所述塑封层240被划伤。
本实施例中,所述塑封层240的材料为玻璃。在其他实施例中,所述塑封层的材料还可以为硅。
需要说明的是,在其他实施例中还可以不形成所述塑封层。
请参考图10,形成所述塑封层240之后,对所述衬底200第二面202进行减薄处理。
本实施例中,形成所述覆盖层230之后,对所述衬底200第二面202进行减薄处理。
本实施例中,所述减薄处理的工艺为化学机械抛光工艺。在其他实施例中,所述减薄处理的工艺还可以为TAIKO工艺。所述第二面包括中心区域和包围所述中心区域的外围区域;TAIKO工艺是指在所述减薄处理对所述第二面的中心区域的去除量大于所述外围区域的去除量,从而使所述外围区域的衬底厚度大于所述中心区域衬底厚度,因此所述外围区域衬底能够为中心区域衬底提供支撑。
需要说明的是,进行所述减薄处理之前,在所述衬底200第一面201上形成塑封层240。所述塑封层240能够在所述减薄处理过程中,对所述衬底200进行支撑,抑制塑封层240发生褶皱或破碎。所述塑封层240用作对所述衬底200进行封装的材料,所述减薄处理之后,所述塑封层240不需要去除,从而能够简化工艺流程,降低工艺成本。
请参考图11,所述减薄处理之后,在所述衬底200第二面202上形成第二连接层242。
所述第二连接层242用于实现衬底200第二面202与外部电路的电连接。
所述第二连接层242的材料为铜。在其他实施例中,所述第二连接层的材料还可以为铝。
形成所述第二连接层242的工艺包括电化学镀膜工艺。
本实施例中,所述衬底中具有IGBT,形成所述第二连接层242之前,还包括:对所述衬底200第二面202进行离子注入,形成集电区。所述第二连接层242用于实现所述集电区与外部电路的电连接。
所述减薄处理之后,形成所述第二连接层242之前,所述形成方法还包括:去除所述覆盖层230。
请参考图12,所述减薄处理之后,对所述塑封层240进行打孔处理,在所述塑封层240中形成焊孔231,所述焊孔231底部暴露出所述连接柱220顶部表面。
所述焊孔231用于后续容纳焊料层。
本实施例中,所述打孔处理的工艺包括激光打孔。
本实施例中,所述打孔工艺的参数包括:激光波长为532nm。
结合参考图13,在所述焊孔231中形成焊料层260。
所述焊料层260用于实现所述连接柱220与后续形成的第一连接层之间的连接。
本实施例中,所述焊料层260的材料为锡。
本实施例中,焊料层260表面高于所述塑封层240表面。焊料层260表面高于所述塑封层240表面有利于焊料层260与后续形成的第一连接层241良好接触。在其他实施例中,焊料层表面可以齐平于所述塑封层表面。
本实施例中,形成所述焊料层260的步骤包括:在所述塑封层240上形成第二光刻胶222,所述第二光刻胶222暴露出所述焊料孔231(如图12所示)底部的连接柱220顶部表面;在所述焊料孔231中形成焊料层260。
形成所述焊料层260之后,所述形成方法还包括:去除所述第二光刻胶222。
请参考图14,在所述塑封层240和焊料层260上形成第一连接层241和第一散热板251,所述第一连接层241位于所述第一散热板251和焊料层260之间、以及所述第一散热板251和塑封层240之间;在所述第二连接层242表面形成第二散热板252,所述第二连接层242位于所述第二散热板252与所述衬底200第二面202之间。
本实施例中,所述第二连接层242的材料为铜。在其他实施例中,所述第二连接层的材料还可以为铝。
本实施例中,所述第一散热板251和第二散热板252的材料为陶瓷。
需要说明的是,所形成的半导体结构包括第一散热板251和第二散热板252,所述衬底200可以通过第一散热板251和第二散热板252进行散热,从而有利于增加衬底200的散热,提高所形成半导体结构的性能。
综上,本发明实施例提供的半导体结构的形成方法中,进行所述减薄处理之前,在所述衬底第一面上形成塑封层。所述塑封层能够在所述减薄处理过程中,对所述衬底进行支撑,抑制塑封层发生褶皱或破碎。所述塑封层还用做对所述衬底进行封装的材料,所述减薄处理之后,所述塑封层不需要去除,从而能够简化工艺流程,降低工艺成本。
进一步,所形成的半导体结构包括第一散热板和第二散热板,所述衬底可以通过第一散热板和第二散热板进行散热,从而有利于增加衬底的散热,提高所形成半导体结构的性能。
本发明还提供一种由图5至图14所示的方法形成的半导体结构。
虽然本发明披露如上,但本发明并非限定于此。任何本领域技术人员,在不脱离本发明的精神和范围内,均可作各种更动与修改,因此本发明的保护范围应当以权利要求所限定的范围为准。
Claims (20)
1.一种半导体结构的形成方法,其特征在于,包括:
提供衬底,所述衬底包括相对的第一面和第二面,所述第一面为功能面;
在所述衬底第一面上形成塑封层;
形成所述塑封层之后,对所述衬底第二面进行减薄处理。
2.如权利要求1所述的半导体结构的形成方法,其特征在于,所述塑封层的材料为聚合物。
3.如权利要求2所述的半导体结构的形成方法,其特征在于,形成所述塑封层的步骤包括:在所述衬底第一面上形成前驱体;对所述前驱体进行加热处理,使所述前驱体固化,形成所述塑封层。
4.如权利要求1所述的半导体结构的形成方法,其特征在于,所述塑封层的厚度为100μm~600μm。
5.如权利要求1所述的半导体结构的形成方法,其特征在于,所述减薄处理的工艺包括:化学机械抛光工艺或TAIKO工艺。
6.如权利要求1所述的半导体结构的形成方法,其特征在于,所述减薄处理之前,还包括:在所述塑封层上形成覆盖层;所述减薄处理之后,去除所述覆盖层。
7.如权利要求1所述的半导体结构的形成方法,其特征在于,所述覆盖层的材料为玻璃。
8.如权利要求1所述的半导体结构的形成方法,其特征在于,所述减薄处理之后,还包括:在所述塑封层上形成第一连接层和位于所述第一连接层上的第一散热板。
9.如权利要求1或8所述的半导体结构的形成方法,其特征在于,所述减薄处理之后,还包括:在所述衬底第二面上形成第二连接层和第二散热板,所述第二连接层位于所述衬底第二面和所述第二散热板之间。
10.如权利要求9所述的半导体结构的形成方法,其特征在于,所述减薄处理之后,还包括:在所述衬底第二面上形成第二连接层和第二散热板,所述第二连接层位于所述衬底第二面和所述第二散热板之间,所述第一散热板和第二散热板的材料为陶瓷。
11.如权利要求1所述的半导体结构的形成方法,其特征在于,所述衬底第一面上具有焊盘;形成所述塑封层之前,还包括:在所述焊盘上形成连接柱。
12.如权利要求11所述的半导体结构的形成方法,其特征在于,所述连接柱的材料为铜或铝。
13.如权利要求11所述的半导体结构的形成方法,其特征在于,形成所述连接柱的步骤包括:在所述衬底第一面上和所述焊盘表面形成种子层;在所述种子层上形成第一光刻胶,所述第一光刻胶暴露出所述焊盘表面的种子层;在所述第一光刻胶暴露出的种子层上形成连接柱。
14.如权利要求11所述的半导体结构的形成方法,其特征在于,所述塑封层覆盖所述连接柱侧壁和顶部表面;
所述减薄处理之后,还包括:对所述塑封层进行打孔处理,在所述塑封层中形成焊孔,所述焊孔底部暴露出所述连接柱顶部表面;在所述焊孔中形成焊料层。
15.如权利要求14所述的半导体结构的形成方法,其特征在于,所述连接柱的材料为铜,所述焊料层的材料为锡。
16.如权利要求14所述的半导体结构的形成方法,其特征在于,所述打孔处理的工艺包括激光打孔。
17.如权利要求16所述的半导体结构的形成方法,其特征在于,所述打孔处理的工艺参数包括:激光波长为532nm。
18.如权利要求14所述的半导体结构的形成方法,其特征在于,所述焊料层表面高于所述塑封层表面。
19.如权利要求18所述的半导体结构的形成方法,其特征在于,形成所述焊料层的步骤包括:在所述塑封层上形成第二光刻胶,所述第二光刻胶暴露出所述焊料孔底部的连接柱顶部表面;在所述焊料孔中形成焊料层。
20.一种由权利要求1至19任意一项权利要求所述的形成方法形成的半导体结构。
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