CN1089492C - 功率半导体模块 - Google Patents
功率半导体模块 Download PDFInfo
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Abstract
本发明提出一种功率半导体模块,其中功率接头平行于基板。这样,控制单元可以直接安装在外壳上并且由于短的连接导线可以获得低的电感结构。
Description
技术领域
本发明涉及功率电子学领域。
背景技术
本发明是以功率半导体模块作为基础的。
这类功率半导体模块例如在德国专利公开文献DE-A1-39 31 634和DE-A1 43 30070中已有所述。
这类功率半导体模块,有一个装有至少一个功率半导体开关器件的基板,该模块的功率接头与基板垂直(见DE 39 31 634中图4和第5列第24行及以后诸行和DE 43 30 070的图8)。功率接头垂直于基板从模块外壳中引出。因此,控制单元必须离开一定的距离,例如在模块的上部或在其一旁安装。模块与控制该模块的控制单元之间具有较长的连接导线。长的连接导线给装置带来不希望的大电感,这种大电感尤其是对高开关频率起限制作用。
发明内容
因此,本发明的目的是,提出一种功率半导体模块,其中,通向控制单元的连接导线尽可能短,从而使装置的电感尽可能小。
此目的以下所述特征在本文开始所述类型的功率半导体模块中得以解决:
功率半导体模块包括一个外壳和一个基板,在该基板上安装至少一个功率半导体开关器件,其中,功率半导体开关器件具有至少两个功率电极,这两个电极与相应的功率接头连接,这些功率接头与基板平行地安装在几个叠在一起的平面内,并且与基板平行地从外壳中引出,以及用连接引线与功率半导体开关器件的相应的功率电极相连接,其特征在于,从外壳引出若干个垂直于基板的控制极和辅助接头,并且把它们制成可插入对模块进行控制的控制单元的结构以及在外壳上设置了固定控制单元的固定装置。
本发明的核心是,功率接头沿基板平行延伸,并沿基板平行伸出外壳。因此,有可能把控制单元直接安装在模块外壳背向基板一侧的表面上。这样有可能使用短的连接导线,从而实现低电感结构。
此外,如果那些与控制单元之间只有很少的、在理想情况下甚至没有电位差的控制极接头安排在距基板最远处,那么这些与控制单元连接的功率连接线还正好能够用作电磁场的屏蔽,这些电磁场是开关模块时所引起的。
为了在模块上固定控制单元,在模决外壳背向基板一侧设置了固定零件例如螺孔和螺钉。控制极和辅助接头可以引向外壳的上侧。于是控制单元可以插在这些接头上,并且模块的控制极和辅助接头与相应的控制单元接头的连接例如可以借助简单的螺钉接触或插头接触来实现。这样,就实现了控制极和辅助接头与控制单元的直接连接。于是省掉了通常较长的、从而带有电感的连接线。
因此,用本发明的模块可以制造电路装置,在这些电路装置中模块的控制单元直接安装在模块上并且模块与控制单元间可以以良好的方式制成低电感的连接,所以这种模块特别适用于较高频率。
附图说明
下面结合附图借助几个实施例进一步简述本发明。
这些附图是:
图1.本发明无外壳模块截面图;
图2.本发明打开的模块俯视图;
图3.本发明组装控制单元的模块俯视图;
图4.IGBT半桥等效电路;
图5.半桥模块截面图。
原则上图中相同部分用相同符号表示。
实施例说明
图3示出具有一个功率半导体模块1和一个控制单元12的电路装置。控制单元12例如借助穿过相应螺孔11的螺钉10固定在外壳2上。模块外壳2同样还可以具有用于固定到一个设备上的螺孔8。功率半导体模块1具有若干控制极和辅助接头13,这些接头与控制单元12连接,尤其是用插头连接。控制极和辅助接头一方面用于模块1的开启和关断,另一方面用于模块的监控。此外,模块1具有至少两个从外壳2侧面引出的功率接头5和6。在半桥模块的情况下还设置了一个负载接头7。因为控制单元12直接安装在模块外壳2上,所以在控制极和辅助接头13与控制单元之间的连接导线可选用的很短,从而电感可以很小。
这种情况是这样实现的,即基本上如图1所示,功率接头5和6与基板3平行,在基板上安装功率半导体开关器件4。这里的功率半导体开关器件涉及的主要是一种IGBT-芯片,就是说一种具有绝缘控制极的双极型晶体管芯片。如图2的俯视图和图1的截面图所示,在功率电极与相应的功率接头5或6之间的连接例如可以借助若干根键合引线9来实现。
就是说,根据本发明功率半导体模块1原则上可以按如下所述方法制造:在一个基板3上焊接上陶瓷衬底15,该基板例如是一块8mm厚的铜板,该铜板在某些情况下还可以用作散热器。这些陶瓷衬底各对应一个开关器件4。这种开关器件例如至少包括一个具有相关联的自由运行二极管的IGBT芯片。衬底15的整个表面是金属化的。功率接头5、6有时还有负载接头7从侧面借助连接导线9、主要是借助键合金属丝(“Wirebonds”金属丝键合)或焊接金属带(“Solderclips”焊片)通向芯片。连接线9引向相应的功率接头5和6,有时还引向负载接头7和引向控制极和辅助接头13,这些接头均安置在不同的平面内并与基板平行。
功率接头5、6有时还有负载接头7平行于基板3从外壳2侧面引出。与功率接头5、6和有时还有负载接头7不同,辅助和控制极接头13垂直于基板3引出。借助这些接头控制单元12可以简单地插入相应的接头实现连接。
现在,如果安装的距基板3最远的那个功率接头,例如功率接头6,离控制单元12最近,就电位而言,该接头与控制单元12对应的接头的电位差最少,那么这个功率接头还可以作为电磁屏蔽。该屏蔽保护控制单元12以防止开关模块时所激发的电磁场的影响。这些电磁场是由模块在尽可能短的时间内切换大电流和高电压所引起的。如果没有特殊的屏蔽这种电磁场可能导致功率电子电路装置的严重失效,并且除其它的影响因素外还阻碍着向更高开关频率的继续发展。
用本发明的结构也有可能制造全半桥模块或者甚至范围更广泛的功率电子电路,例如三相模块。图4示出一个半桥模块的等效电路。其中,在正接头和负接头之间串联了两个开关器件4。这些开关器件涉及的是各至少一个开关器件芯片,此处指IGBT(IGBT1、IGBT2)类型的芯片,这些芯片具有相关联的自由运行二极管D1、D2。这里的公共节点相当于负载接头7,正和负接头相当于功率接头5和6。这两个IGBT各由一个控制栅-或控制极接头13所控制。
图5示出一个这种模块的截面图:在基板3上安装了开关器件4、就是说IGBT(IGBT1、IGBT2)的衬底15。功率接头5和6以及公共负载接头7安装在不同平面内,并且经连接引线9与相应的半导体开关的电极连接。在所示实例中IGBT的两个控制极接头13安装在同一个接头平面上。在这种情况下相应的接头平面具有一定的结构,例如借助若干导带使这些接头电气上是隔离的。在两个相邻的平面或接头之间必须插入绝缘层14。当然可以设想,在基板3的两侧都可以安装衬底和开关器件。
如果在一种如图3所示结构中集成一种这样的半桥模块,那么在图中负载接头7被引出到模块的一侧,而在不同平面的功率接头5和6则被引出到与其相反的一侧。从图中也可以清楚地看到控制单元12如何插入控制极和辅助接头13。与控制单元12的连接例如可以借助简单的插入或螺钉连接来实现。
用本发明功率半导体模块的结构还可以制造低电感的、从而高速度的、且还能很好承受电磁干扰的电路装置。就较高开关频率而言这一点具有重要意义。
Claims (4)
1.一种功率半导体模块,包括:
具有基板的外壳,在基板上安装至少一个功率半导体开关器件,该功率半导体开关器件具有至少两个功率电极,这两个电极与相应的功率接头连接,所述功率接头与基板平行地延伸,并与基板平行地从外壳中引出,从而在多个平面内相互重叠地延伸,且通过连接引线与功率半导体开关器件的相应的功率电极相连,该功率半导体模块包括多个控制和辅助接头,其中控制和辅助接头与基板垂直地从外壳中引出,控制和辅助接头可插入驱动模块的控制单元,功率半导体模块包括形成在外壳上的固定机构,用于将控制单元固定在模块的外壳上。
2.根据权利要求1的模块,其特征在于对控制单元具有最小的电位差的控制接头的一个接头离基板最远和离控制单元最近。
3.一种具有至少一个功率半导体开关模块的电路结构,该功率半导体开关模块与驱动该模块的控制单元相连,其中功率半导体模块包括:
具有基板的外壳,在基板上安装至少一个功率半导体开关器件,该功率半导体开关器件具有至少两个功率电极,这两个电极与相应的功率接头连接,所述功率接头与基板平行地延伸,并与基板平行地从外壳中引出,从而在多个平面内相互重叠地延伸,且通过连接引线与功率半导体开关器件的相应的功率电极相连,该功率半导体模块包括多个控制和辅助接头,其中控制和辅助接头与基板垂直地从外壳中引出,控制和辅助接头可插入驱动模块的控制单元,功率半导体模块包括形成在外壳上的固定机构,用于将控制单元固定在模块的外壳上;并且
其中控制单元与模块外壳上的基板平行。
4.根据权利要求3的电路结构,其特征在于对控制单元具有最小的电位差的控制接头的一个接头离基板最远和离控制单元最近。
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US422169 | 1995-04-14 | ||
US422,169 | 1995-04-14 | ||
US08/422,169 US5541453A (en) | 1995-04-14 | 1995-04-14 | Power semiconductor module |
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CN1142687A CN1142687A (zh) | 1997-02-12 |
CN1089492C true CN1089492C (zh) | 2002-08-21 |
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US (1) | US5541453A (zh) |
EP (1) | EP0738008B1 (zh) |
JP (1) | JPH08288456A (zh) |
CN (1) | CN1089492C (zh) |
DE (2) | DE19529785A1 (zh) |
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Publication number | Priority date | Publication date | Assignee | Title |
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JPH09148523A (ja) * | 1995-11-21 | 1997-06-06 | Toshiba Corp | 半導体装置 |
US5748456A (en) * | 1995-11-24 | 1998-05-05 | Asea Brown Boveri Ag | Power semiconductor module system |
US5811878A (en) * | 1996-07-09 | 1998-09-22 | Asea Brown Boveri Ag | High-power semiconductor module |
US6954368B1 (en) | 1996-07-22 | 2005-10-11 | HYDRO-QUéBEC | Low stray interconnection inductance power converting molecule for converting a DC voltage into an AC voltage, and a method therefor |
EP1028520A4 (en) * | 1996-09-06 | 2000-08-16 | Hitachi Ltd | SEMICONDUCTOR ARRANGEMENT |
DE19726534A1 (de) * | 1997-06-23 | 1998-12-24 | Asea Brown Boveri | Leistungshalbleitermodul mit geschlossenen Submodulen |
EP0971412B1 (en) * | 1998-07-10 | 2013-03-13 | Kabushiki Kaisha Toyota Jidoshokki | Power Semiconductor with Attachable Protection Circuit |
JP2001308265A (ja) * | 2000-04-21 | 2001-11-02 | Toyota Industries Corp | 半導体装置 |
JP2001308264A (ja) * | 2000-04-21 | 2001-11-02 | Toyota Industries Corp | 半導体装置 |
US6845017B2 (en) * | 2000-09-20 | 2005-01-18 | Ballard Power Systems Corporation | Substrate-level DC bus design to reduce module inductance |
US7012810B2 (en) * | 2000-09-20 | 2006-03-14 | Ballard Power Systems Corporation | Leadframe-based module DC bus design to reduce module inductance |
EP1263045A1 (en) * | 2001-06-01 | 2002-12-04 | ABB Schweiz AG | High power semiconductor module |
JP4363190B2 (ja) * | 2004-01-08 | 2009-11-11 | 株式会社豊田自動織機 | 半導体装置及びその製造方法 |
US7791208B2 (en) * | 2007-09-27 | 2010-09-07 | Infineon Technologies Ag | Power semiconductor arrangement |
EP3113223A1 (en) * | 2015-07-02 | 2017-01-04 | ABB Technology AG | Power semiconductor module |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920405A (en) * | 1986-11-28 | 1990-04-24 | Fuji Electric Co., Ltd. | Overcurrent limiting semiconductor device |
US5291065A (en) * | 1991-12-16 | 1994-03-01 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method of fabricating semiconductor device |
Family Cites Families (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
FR2503932A1 (fr) * | 1981-04-08 | 1982-10-15 | Thomson Csf | Boitiers a cosses plates pour composants semi-conducteurs de moyenne puissance et procede de fabrication |
DE3930858C2 (de) * | 1988-09-20 | 2002-01-03 | Peter H Maier | Modulaufbau |
JPH0671061B2 (ja) * | 1989-05-22 | 1994-09-07 | 株式会社東芝 | 樹脂封止型半導体装置 |
US5089878A (en) * | 1989-06-09 | 1992-02-18 | Lee Jaesup N | Low impedance packaging |
DE3931634A1 (de) * | 1989-09-22 | 1991-04-04 | Telefunken Electronic Gmbh | Halbleiterbauelement |
DE3937045A1 (de) * | 1989-11-07 | 1991-05-08 | Abb Ixys Semiconductor Gmbh | Leistungshalbleitermodul |
DE4031051C2 (de) * | 1989-11-14 | 1997-05-07 | Siemens Ag | Modul mit mindestens einem Halbleiterschaltelement und einer Ansteuerschaltung |
JPH04180401A (ja) * | 1990-11-15 | 1992-06-26 | Hitachi Ltd | 高周波伝送線路 |
US5126827A (en) * | 1991-01-17 | 1992-06-30 | Avantek, Inc. | Semiconductor chip header having particular surface metallization |
DE9202583U1 (zh) * | 1992-02-28 | 1992-04-23 | Ludwig, Peter, 8502 Zirndorf, De | |
US5376909A (en) * | 1992-05-29 | 1994-12-27 | Texas Instruments Incorporated | Device packaging |
JP2838625B2 (ja) * | 1992-09-08 | 1998-12-16 | 株式会社日立製作所 | 半導体モジュール |
US5347160A (en) * | 1992-09-28 | 1994-09-13 | Sundstrand Corporation | Power semiconductor integrated circuit package |
EP0597144A1 (de) * | 1992-11-12 | 1994-05-18 | IXYS Semiconductor GmbH | Hybride leistungselektronische Anordnung |
-
1995
- 1995-04-14 US US08/422,169 patent/US5541453A/en not_active Expired - Fee Related
- 1995-08-12 DE DE19529785A patent/DE19529785A1/de not_active Withdrawn
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1996
- 1996-03-26 DE DE59610548T patent/DE59610548D1/de not_active Expired - Fee Related
- 1996-03-26 EP EP96810191A patent/EP0738008B1/de not_active Expired - Lifetime
- 1996-04-08 JP JP8085407A patent/JPH08288456A/ja not_active Abandoned
- 1996-04-12 CN CN96104547A patent/CN1089492C/zh not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4920405A (en) * | 1986-11-28 | 1990-04-24 | Fuji Electric Co., Ltd. | Overcurrent limiting semiconductor device |
US5291065A (en) * | 1991-12-16 | 1994-03-01 | Mitsubishi Denki Kabushiki Kaisha | Semiconductor device and method of fabricating semiconductor device |
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US5541453A (en) | 1996-07-30 |
DE59610548D1 (de) | 2003-07-31 |
EP0738008A2 (de) | 1996-10-16 |
DE19529785A1 (de) | 1996-10-17 |
EP0738008A3 (de) | 1998-12-09 |
JPH08288456A (ja) | 1996-11-01 |
EP0738008B1 (de) | 2003-06-25 |
CN1142687A (zh) | 1997-02-12 |
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