CN108806757A - High-speed boosting type signal sampling transmitting switch - Google Patents
High-speed boosting type signal sampling transmitting switch Download PDFInfo
- Publication number
- CN108806757A CN108806757A CN201810627128.9A CN201810627128A CN108806757A CN 108806757 A CN108806757 A CN 108806757A CN 201810627128 A CN201810627128 A CN 201810627128A CN 108806757 A CN108806757 A CN 108806757A
- Authority
- CN
- China
- Prior art keywords
- charge
- voltage
- switch
- transmission
- boosting type
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/18—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages
- G11C19/182—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes
- G11C19/184—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes with field-effect transistors, e.g. MOS-FET
- G11C19/186—Digital stores in which the information is moved stepwise, e.g. shift registers using capacitors as main elements of the stages in combination with semiconductor elements, e.g. bipolar transistors, diodes with field-effect transistors, e.g. MOS-FET using only one transistor per capacitor, e.g. bucket brigade shift register
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C19/00—Digital stores in which the information is moved stepwise, e.g. shift registers
- G11C19/28—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements
- G11C19/282—Digital stores in which the information is moved stepwise, e.g. shift registers using semiconductor elements with charge storage in a depletion layer, i.e. charge coupled devices [CCD]
- G11C19/285—Peripheral circuits, e.g. for writing into the first stage; for reading-out of the last stage
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/124—Sampling or signal conditioning arrangements specially adapted for A/D converters
- H03M1/1245—Details of sampling arrangements or methods
Abstract
The invention belongs to IC design technical field, specially a kind of high-speed boosting type signal sampling transmitting switch, which includes：Boot-strapped switch Ss1, sampling capacitance Cp, high-speed boosting type signal transmission switch, 2 voltage transmitting switches and transmission driving circuit.Its advantage is that：High-speed boosting type signal sampling transmitting switch provided by the present invention overcomes the problem that signal swing is limited in existing charge-domain pipelined ADC, can be widely applied in the charge-domain sampling hold circuit of all kinds of charge-domain pipelined ADC.
Description
Technical field
The present invention relates to a kind of high-speed boosting type signal sampling transmitting switch for charge-domain pipelined analog-digital converter,
Belong to technical field of integrated circuits.
Background technology
With the continuous development of Digital Signal Processing, the digitlization of electronic system and it is integrated be inexorable trend.So
And the signal in reality is mostly the analog quantity of consecutive variations, need to become digital signal by analog-to-digital conversion can be input to number
It is handled and is controlled in system, thus analog-digital converter is indispensable composition portion in following Design of Digital System
Point.In application fields such as broadband connections, digital high-definition television and radars, system requirements analog-digital converter has very high simultaneously
Sampling rate and resolution ratio.High sampling is not only wanted in requirement of the portable terminal product of these application fields for analog-digital converter
Rate and high-resolution, power consumption should also minimize.
Currently, can be achieved at the same time high sampling rate and high-resolution analog-digital converter structure is pipeline organization modulus
Converter.Pipeline organization is a kind of transformational structure of multistage, and the analog-digital converter of the basic structure of low precision is used per level-one,
Input signal is by processing step by step, finally by every grade of the high-precision output of result combination producing.Its basic thought is exactly handle
The conversion accuracy generally required is evenly distributed to every level-one, per level-one transformation result merge can obtain it is final
Transformation result.Since pipeline organization analog-digital converter can realize best trade-off on speed, power consumption and chip area, because
This still can keep higher speed and lower power consumption when realizing the analog-to-digital conversion of degree of precision.
The mode of the realization pipeline organization analog-digital converter of existing comparative maturity is the flowing water based on switched capacitor technique
Cable architecture.The work of sampling hold circuit and each height grade circuit is also all necessary in production line analog-digital converter based on the technology
Use the operational amplifier of high-gain and wide bandwidth.The speed and processing accuracy of analog-digital converter depend on used high-gain with
Speed and precision are established in the operational amplifier negative-feedback of ultra wide bandwidth.Therefore such pipeline organization Design of A/D Converter
Core is the design of the operational amplifier of used high-gain and ultra wide bandwidth.These high-gains and wide bandwidth operational amplifier
Using the speed and precision for limiting switched-capacitor pipelines analog-digital converter, become the master of such performance of analog-to-digital convertor raising
Limit bottleneck, and in the case that precision is constant analog-digital converter power consumption levels with speed the linear ascendant trend of raising.
The power consumption levels of the production line analog-digital converter based on switched-capacitor circuit are reduced, most straightforward approach is exactly to reduce or disappear
Go the use of the operational amplifier of high-gain and ultra wide bandwidth.
Charge-domain pipelined analog-digital converter is exactly a kind of mould without using high-gain and the operational amplifier of ultra wide bandwidth
There is low power consumption characteristic can realize high speed and high-precision again simultaneously for number converter, the structural module converter.Charge-domain flowing water
Line analog-digital converter uses charge-domain signal processing technology.In circuit, signal is indicated in the form of charge packet, the size of charge packet
Represent different size of semaphore, storage, transmission, plus/minus, comparison etc. of the different size of charge packet between different memory nodes
Signal processing function is realized in processing.Carry out the different size of charge packet of drive control in different storages by using periodic clock
Signal processing between node can realize analog-digital conversion function.
In charge-domain pipelined analog-digital converter, charge-domain pipelined sub- grade circuits at different levels are by this grade of charge transmission control
It is switch, multiple charge physical store nodes, multiple charge storage cells for being connected to charge-storage node, multiple comparators, more
A reference charge selection circuit that output control is exported by comparator is constituted under the control of control clock.Each level production line grade
In the course of work of circuit, the transmission of charge, compares the charge physical store section that the functions such as quantization surround each sub- grade at plus/minus
Point carries out.
Sampling hold circuit is the front-end circuit of charge-domain pipelined ADC, is primarily served in entire charge-domain pipelined ADC
Two effects：First, sampling input analog quantity substantially reduces comparator and recalcitrates second is that playing effectively circuit buffer action
Influence of the noise (kick-back noise) to circuit, and can eliminate between sub- ADC and subtracter input since clock skew draws
The error risen.It provides entire ADC relatively lossless noise, therefore is the highest mould of performance requirement in entire ADC designs
Block.For charge-domain pipelined ADC, it is traditional can not be straight based on high performance amplifier and switching capacity sampling hold circuit
It connects applicable.Especially under the conditions of low voltage operating, existing sampling hold circuit cannot be satisfied demand.High speed signal sampling passes
Defeated switch is the core unit module of charge-domain sampling hold circuit, therefore to realize the charge for being suitable for low voltage operating condition
Domain sampling hold circuit, it is necessary to which a kind of high speed signal sampling transmitting switch suitable for low voltage operating condition is provided.
Invention content
The purpose of the present invention is overcoming the deficiencies in the prior art, a kind of high-speed boosting type signal transmission is provided and is opened
It closes, specifically a kind of high-precision sample charge transmission circuit suitable for common CMOS process.
According to a kind of high-speed boosting type signal sampling transmitting switch technical solution provided by the invention, it is characterized in that：Including
Boot-strapped switch Ss1, sampling capacitance Cp, high-speed boosting type signal transmission switch, 2 voltage transmitting switches and transmission driving electricity
Road；The high-speed boosting type signal sampling transmitting switch is correspondingly connected with relationship and is：Input voltage VipIt is connected to boot-strapped switch
The left end of Ss1；The right end of boot-strapped switch Ss1 is connected to the left end and the 2nd voltage transmitting switch S2 of sampling capacitance Cp simultaneously
Upper end；The output voltage of transmission driving circuit is connected to the lower end of the 2nd voltage transmitting switch S2；The right end of sampling capacitance Cp is same
When be connected to high-speed boosting type signal transmission switch charge input terminal and the 1st voltage transmitting switch S1 upper end；Common-mode voltage
VcmIt is connected to the lower end of the 1st voltage transmitting switch S1；The charge output end of high-speed boosting type signal transmission switch is that high speed increases
The charge output end of die mould signal sampling transmitting switch；The charge of high-speed boosting type signal transmission switch transmits suspension control signal
Ck2 is controlled, the 1st voltage transmitting switch S1 suspension control signals Ck1p controls, the 2nd voltage transmitting switch S2 suspension control signals Ck2 controls
System, the Ck1 controls of boot-strapped switch Ss1 suspension control signals.
The high-speed boosting type signal sampling transmitting switch, it is further characterized in that the working method suspension control signal of the circuit
Ck1p, Ck1 and Ck2 are controlled, and it is the mutually non-overlapping control signal of high level to control signal Ck1 with Ck2, and Ck1p is high level
The control signal of shutdown is slightly opened effectively and delayed in advance compared with Ck1.
The high-speed boosting type signal sampling transmitting switch, it is further characterized in that the high-speed boosting type signal transmission switchs
Including：One charge transmission MOSFET pipes S, a Bootstrap boost pressure circuit, the first NMOS tube M1, the second NMOS tube M2, the
One PMOS tube M3, the first capacitance C1 and the second capacitance C2；The high-speed boosting type signal transmission switch is correspondingly connected with relationship and is：The
The grid end of one NMOS tube M1 is connected to charge node Ni to be transmitted, the i.e. source electrode of charge transmission MOSFET pipes S, is also connected to grid voltage
The voltage input end of bootstrapping boost pressure circuit；The source and substrate of first NMOS tube M1 is connected to ground level, the first NMOS tube M1's
Drain terminal is connected to the source of the second NMOS tube M2；The drain terminal of second NMOS tube M2 is connected to the drain terminal and charge of the first PMOS tube M3
The grid end of MOSFET pipes S is transmitted, the grid end of the second NMOS tube M2 is connected to the first bias voltage, and the substrate of the second NMOS tube M2 connects
Ground level；The grid end of first PMOS tube M3 is connected to the second bias voltage, and the source and substrate of the first PMOS tube M3 are connected to grid
The voltage output end of pressure bootstrapping boost pressure circuit；Charge transmission objectives node No, i.e. charge transmit the drain electrode of MOSFET pipes S, pass through
Second capacitance C2 meets control signal Ck1n；Charge node Ni to be transmitted meets control signal Ck1 by the first capacitance C1；Charge transmits
The substrate of MOSFET pipes S is connected to ground level；The input end of clock connection control signal Ck1 of Bootstrap boost pressure circuit.
The high-speed boosting type signal sampling transmitting switch, it is further characterized in that：When carrying out charge transmission, Bootstrap
Boost pressure circuit is in pressurized state, and the grid of the charge transmission MOSFET pipes is high level VDD+VNi, charge voltage transmission
MOSFET pipes are in the conduction state；After the charge end of transmission, Bootstrap boost pressure circuit is in charged state, and the charge passes
The grounded-grid level of defeated MOSFET pipes, the charge transmission MOSFET pipes are off state；Wherein, VDDFor supply voltage,
VNiFor the source voltage of MOSFET pipes.
It is an advantage of the invention that：High-speed boosting type signal transmission provided by the present invention suitable for common CMOS process is opened
It closes, overcomes the problem that signal swing is limited in existing signal transmission switch, can be widely applied to charge-domain pipelined modulus
In the charge-domain sampling hold circuit of converter.
Below with reference to drawings and examples, the present invention is described in detail.
Description of the drawings
Fig. 1 is high-speed boosting type signal sampling transmitting switch structure of the present invention.
Fig. 2 is existing signal transmission on-off principle figure.
Fig. 3 is that existing signal transmission switchs operating voltage waveform diagram.
Fig. 4 is high-speed boosting type signal transmission construction of switch schematic diagram of the present invention.
Fig. 5 is that high-speed boosting type signal transmission of the present invention switchs operating voltage waveform diagram.
Fig. 6 is a kind of realization circuit diagram of Bootstrap boost pressure circuit of the present invention.
Specific implementation mode
Embodiment is below in conjunction with the accompanying drawings described in more detail the present invention with example.
High-speed boosting type signal sampling transmitting switch structure of the present invention is as shown in Figure 1.The high-speed boosting type signal sampling
Transmitting switch includes：Boot-strapped switch Ss1, sampling capacitance Cp, high-speed boosting type signal transmission switch, 2 voltage transmission are opened
Close and transmit driving circuit.
The high-speed boosting type signal sampling transmitting switch is correspondingly connected with relationship and is：Input voltage VipIt is connected to Bootstrap
The left end of switch Ss1；The right end of boot-strapped switch Ss1 is connected to the left end of sampling capacitance Cp simultaneously and the transmission of the 2nd voltage is opened
Close the upper end of S2；The output voltage of transmission driving circuit is connected to the lower end of the 2nd voltage transmitting switch S2；The right side of sampling capacitance Cp
End while the upper end for being connected to charge input terminal and the 1st voltage transmitting switch S1 that high-speed boosting type signal transmission switchs；Common mode
Voltage VcmIt is connected to the lower end of the 1st voltage transmitting switch S1；The charge output end of high-speed boosting type signal transmission switch is height
The charge output end of fast boosting type signal sampling transmitting switch；The charge transmission of high-speed boosting type signal transmission switch is believed by control
Number Ck2 control, the 1st voltage transmitting switch S1 suspension control signals Ck1p controls, the 2nd voltage transmitting switch S2 suspension control signals Ck2
Control, the Ck1 controls of boot-strapped switch Ss1 suspension control signals.
The working method of high-speed boosting type signal sampling transmitting switch shown in Fig. 1 can be with sampling and hold phases to
Description, 2 phase difference suspension control signal Ck1 and Ck2 controls, and it is that high level is mutually non-overlapping to control signal Ck1 with Ck2
Clock control signal, Ck1p are the clock control signal that high level slightly opened effectively and delayed in advance shutdown compared with Ck1.
High-speed boosting type signal sampling transmitting switch shown in Fig. 1, in Ck1 with respect to input voltage signal VipIt is adopted
Sample, the voltage V that Ck2 phases obtain samplingipBe converted to corresponding charge signal Qip, and it is transmitted to late-class circuit.Ck1p,Ck1
As shown in the figure with the phase precedence of Ck2, wherein high level indicates switch conduction.At the t0 moment, Ck1p is effective, starts to sample
Phase, charge-storage node Nop are switched on and off S1 and reset to common-mode voltage Vcm；T1 moment, Ck1 start effectively, charge-storage node Nip
It is connected to input analog voltage signal V by switch Ss1ip；T2 moment, Ck1 are turned off first, V at this timeipSignal is sampled simultaneously
It is stored in CpOn；T3 moment, Ck1p shutdowns, entire sampling mutually terminate；At the t4 moment, Ck2 is effective, starts to transmit phase, charge storage
Node Nip is connected to voltage V by switch S2s, while high-speed boosting type signal transmission switch is opened, the charge that sampling is obtained
QipIt is transferred to late-class circuit.
During above-mentioned voltage sample to charge converting transmission, the charge of high-speed boosting type signal sampling transmitting switch output
QipAnd QinSampling capacitance C can be usedpAnd CnBoth end voltage variable quantity indicates.Therefore following formula can be obtained：
Qip=Cp×(ΔVNip-ΔVNop)(1)
In formula, Δ VNip=Vs-Vip, Δ VNop=Vcm-Vr；VsAnd VcmIt is fixed voltage.From formula (1) it will be seen that
Input voltage VipIt is charge signal Q to be sampled by high-speed boosting type signal sampling transmitting switch and be converted to sizeip。
For the transmission driving circuit described in Fig. 1, using the unity gain buffer that can be worked under low voltage condition
It can be realized.For high-speed boosting type signal transmission switching circuit, existing charge transmitting switch circuit mode cannot be satisfied
It is required that.
Existing charge transmitting switch circuit implementations typically have patent：US2007/0279507A1 enhanced signals
Transmitting switch, exemplary circuit configuration are as shown in Figure 2.Charge signal transmits the grid V of MOSFET pipes SGIt is connected to by metal-oxide-semiconductor
The output end for the operational amplifier 1 that M1, M2 and M3 are constituted.Before the output end operation charge transmission of operational amplifier 1, S is in
Off state, charge to be transmitted are stored in C1On.Fig. 3 is the operating voltage waveform diagram of the circuit.T0 moment, Ck1 hairs
Raw negative rank more changes, and Ck1n occurs positive exponent and more changes, and leads to Ni voltages VNiIt is mutated to a low potential and the voltage V of NoNoMutation
To a high potential, operational amplifier 1 will respond the variation and drive MOSFET pipe S grids VGVoltage is high level so that S
It begins to turn on；Due to the reason of potential difference, stored charge will be shifted electronically to No on Ni, cause VNiRise and
VNoDecline, operational amplifier 1 can will equally respond the variation and drive MOSFET pipe S grids VGVoltage continuously decreases；The t1 moment,
Work as VNiRise to voltage VRWhen, VGVoltage is gradually lowered to blanking voltage VthWhen, S is turned off again, and charge transfer process terminates,
Middle VRIt is determined by the quiescent point of cascade operational amplifier.
Signal transmission shown in Fig. 2 is switched, faced under low voltage condition a outstanding problem, which is them, to be handled
The input analog signal amplitude of oscillation it is limited, be unable to reach general ADC to inputting the demand of the analog signals difference amplitude of oscillation.Such as institute in Fig. 3
Show, when a maximum difference of charge transmission and voltage transmission is the charge end of transmission, the source and leakage both ends of MOSFET pipes S are kept
One pressure difference VDS, to ensure safe and reliable, this V of MOSFET pipes S of charge transfer processDSPressure difference is typically provided at
20% VDD supply voltages or so.Under the 1.8V voltage conditions of early period, MSVDSPressure difference is typically provided at 0.35~
0.4V, this just significantly reduces the input analog signal swing range that charge-domain ADC assembly line grade circuits can be handled.
Mainly relevant signal node is charge transfer tube with the input signal amplitude of oscillation of the switch of signal transmission shown in Fig. 2
The grid of MOSFET pipes S, four end of leakage, source and substrate.Since source is belonging respectively to front and back two to be connected with drain terminal in actual circuit
Height grade circuit, therefore the capacitance of source is the 2 of drain terminal capacitanceN(N is the digit of sub- grade circuit where source) again, leads to charge
Drain terminal voltage fall is the 2 of source when transmissionNTimes, therefore the useful signal amplitude of oscillation of circuit is mainly shown as under drain terminal voltage
Range of decrease degree, i.e.,：VA=VCK1n-VDS-VR, VCK1nThe high level voltage of signal CK1n in order to control.Under low voltage condition, VDSIt is shared
20%VDDThe pressure difference of voltage does not optimize space；VCK1nVoltage is the reference voltage of overall importance of chip, theoretical maximum
Can be VDD, but its maximum value is also limited by G terminal voltages in practice, and G terminal voltage maximum values are only supply voltage VDD, have bright
Aobvious limitation.Therefore, to increase the signal swing of BCT, it is necessary to overcome VCK1nThe V of voltageDDLimitation.In the present invention, to overcome VCK1n
The V of voltageDDLimitation, using Bootstrap technology, a V is raised when charge is transmitted by G terminal voltagesDDVoltage, such VCK1nElectricity
The upper limit of pressure can be increased to VDDVoltage, to increase the signal swing of BCT.
Fig. 4 show the high-speed boosting that the input signal amplitude of oscillation is improved using Bootstrap supercharging technology that the present invention designs
Type signal transmission construction of switch schematic diagram, the source electrode and power vd D of the MOSFET pipes S in signal transmission shown in Fig. 2 switch
Between increase a Bootstrap boost pressure circuit.The high-speed boosting type signal transmission switch includes a charge transmission
MOSFET pipes S, a Bootstrap boost pressure circuit, the first NMOS tube M1, the second NMOS tube M2, the first PMOS tube M3, the first electricity
Hold C1 and the second capacitance C2.
The high-speed boosting type signal transmission switch is correspondingly connected with relationship and is：The grid end of first NMOS tube M1 is connected to charge
Node Ni to be transmitted, i.e. charge transmit the source electrode of MOSFET pipes S, are also connected to the voltage input end of Bootstrap boost pressure circuit；
The source and substrate of first NMOS tube M1 is connected to ground level, and the drain terminal of the first NMOS tube M1 is connected to the source of the second NMOS tube M2
End；The drain terminal of second NMOS tube M2 is connected to the grid end of the drain terminal and charge transmission MOSFET pipes S of the first PMOS tube M3, and second
The grid end of NMOS tube M2 is connected to the first bias voltage, the Substrate ground level of the second NMOS tube M2；The grid of first PMOS tube M3
End is connected to the second bias voltage, and the source and substrate of the first PMOS tube M3 are connected to the voltage output of Bootstrap boost pressure circuit
Hold Vboost；Charge transmission objectives node No, i.e. charge transmit the drain electrode of MOSFET pipes S, and control signal is connect by the second capacitance C2
Ck1n；Charge node Ni to be transmitted meets control signal Ck1 by the first capacitance C1；Charge transmits the substrate connection of MOSFET pipes S
To ground level；The input end of clock connection control signal Ck1 of Bootstrap boost pressure circuit.
Fig. 5 provides the operating voltage waveform diagram of high-speed boosting type signal transmission switch, by using grid Bootstrap
G terminal voltages are raised a V by technology when charge transmitsDDVoltage, such VCK1nThe upper limit of voltage can be increased to VDDVoltage,
To achieve the purpose that increase BCT signal swings.VCK1nVoltage is raised to V 'CK1n, the theoretic upper limit can be increased to VDD,
It can be seen that the signal swing V ' of BCT circuitsAIncrease (V 'CK1n-VCK1n)。
Fig. 6 show a kind of schematic diagram for the Bootstrap boost pressure circuit can be used for the present invention.Its principle is as follows：Clock
When Ck1 is high level, metal-oxide-semiconductor Mb2, Mb6 conducting, metal-oxide-semiconductor Mb7 is by Mb4 conductings so that metal-oxide-semiconductor Mb1 is also switched on；Circuit is logical
It crosses metal-oxide-semiconductor Mb1 and Mb2 to charge to capacitance Cb1 so that the voltage at the both ends capacitance Cb1 is close to supply voltage VDD, in capacitance
V is stored on CblDD* the electricity of Cb1, Bootstrap boost pressure circuit are in charged state.When clock Ck1 is lower from height, MOS
Pipe Mb2, Mb6 cut-off, metal-oxide-semiconductor Mb7 conductings, Mb4 conductings；Power supply is by metal-oxide-semiconductor Mb4, Mb7 to node VboostElectricity parasitic over the ground
Capacity charge so that node VboostVoltage increases, metal-oxide-semiconductor Mb1 cut-offs, Mb5, Mb3 conducting；Input signal is lifted by metal-oxide-semiconductor Mb3
Capacitance Cb1 bottom crowns voltage is equal to input voltage V until its valueNi；Since the charge stored on capacitance Cb1 changed in clock CK
There is no discharge loop in journey, the charge being stored thereon remains unchanged, and the voltage of capacitance Cbl top crowns will synchronize rising, directly
It is equal to V to its valueDD+VNi, Bootstrap function is realized, Bootstrap boost pressure circuit is in pressurized state.
It is known that in conjunction with the waveform diagram of Fig. 5.When carrying out charge transmission, Bootstrap boost pressure circuit is in supercharging
The grid of state, the charge transmission MOSFET pipes is high level VDD+VNi, it is in the conduction state that charge transmits MOSFET pipes S；
After the charge end of transmission, Bootstrap boost pressure circuit is in charged state, the grounded-grid of the charge transmission MOSFET pipes S
Level, the charge transmission MOSFET pipes are off state.Wherein, VDDFor supply voltage, VNiMOSFET pipes are transmitted for charge
The source voltage of S.
The foregoing is merely presently preferred embodiments of the present invention, is not intended to limit the invention, it is all the present invention spirit and
Within principle, any modification, equivalent replacement, improvement and so on should all be included in the protection scope of the present invention.
Claims (3)
1. a kind of high-speed boosting type signal sampling transmitting switch, it is characterized in that：Including boot-strapped switch Ss1, sampling capacitance Cp,
High-speed boosting type signal transmission switch, 2 voltage transmitting switches and transmission driving circuit；
The high-speed boosting type signal sampling transmitting switch is correspondingly connected with relationship and is：Input voltage VipIt is connected to boot-strapped switch
The left end of Ss1；The right end of boot-strapped switch Ss1 is connected to the left end and the 2nd voltage transmitting switch S2 of sampling capacitance Cp simultaneously
Upper end；The output voltage of transmission driving circuit is connected to the lower end of the 2nd voltage transmitting switch S2；The right end of sampling capacitance Cp is same
When be connected to high-speed boosting type signal transmission switch charge input terminal and the 1st voltage transmitting switch S1 upper end；Common-mode voltage
VcmIt is connected to the lower end of the 1st voltage transmitting switch S1；The charge output end of high-speed boosting type signal transmission switch is that high speed increases
The charge output end of die mould signal sampling transmitting switch；The charge of high-speed boosting type signal transmission switch transmits suspension control signal
Ck2 is controlled, the 1st voltage transmitting switch S1 suspension control signals Ck1p controls, the 2nd voltage transmitting switch S2 suspension control signals Ck2 controls
System, the Ck1 controls of boot-strapped switch Ss1 suspension control signals；Wherein, when control signal Ck1 and Ck2 mutually non-overlapping for high level
Clock signal, Ck1p are the clock control signal that high level slightly opened effectively and delayed in advance shutdown compared with Ck1.
2. high-speed boosting type signal sampling transmitting switch according to claim 1, it is characterised in that the high-speed boosting type letter
Number transmitting switch includes：One charge transmission MOSFET pipes S, a Bootstrap boost pressure circuit, the first NMOS tube M1, second
NMOS tube M2, the first PMOS tube M3, the first capacitance C1 and the second capacitance C2；
The high-speed boosting type signal transmission switch is correspondingly connected with relationship and is：It is to be passed that the grid end of first NMOS tube M1 is connected to charge
Defeated node Ni, i.e. charge transmit the source electrode of MOSFET pipes S, are also connected to the voltage input end of Bootstrap boost pressure circuit；First
The source and substrate of NMOS tube M1 is connected to ground level, and the drain terminal of the first NMOS tube M1 is connected to the source of the second NMOS tube M2；
The drain terminal of second NMOS tube M2 is connected to the grid end of the drain terminal and charge transmission MOSFET pipes S of the first PMOS tube M3, the 2nd NMOS
The grid end of pipe M2 is connected to the first bias voltage, the Substrate ground level of the second NMOS tube M2；The grid end of first PMOS tube M3 connects
It is connected to the second bias voltage, the source and substrate of the first PMOS tube M3 are connected to the voltage output end of Bootstrap boost pressure circuit；
Charge transmission objectives node No, i.e. charge transmit the drain electrode of MOSFET pipes S, and control signal Ck1n is met by the second capacitance C2；Electricity
Lotus node Ni to be transmitted meets control signal Ck1 by the first capacitance C1；The substrate of charge transmission MOSFET pipes S is connected to ground electricity
It is flat；The input end of clock connection control signal Ck1 of Bootstrap boost pressure circuit.
3. high-speed boosting type signal sampling transmitting switch according to claim 2, it is characterised in that：When progress charge transmission
When, Bootstrap boost pressure circuit is in pressurized state, and the grid of the charge transmission MOSFET pipes is high level VDD+VNi, charge
It is in the conduction state that voltage transmits MOSFET pipes；After the charge end of transmission, Bootstrap boost pressure circuit is in charged state, institute
The grounded-grid level of charge transmission MOSFET pipes is stated, the charge transmission MOSFET pipes are off state；Wherein, VDDFor electricity
Source voltage, VNiFor the source voltage of MOSFET pipes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810627128.9A CN108806757A (en) | 2018-06-19 | 2018-06-19 | High-speed boosting type signal sampling transmitting switch |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201810627128.9A CN108806757A (en) | 2018-06-19 | 2018-06-19 | High-speed boosting type signal sampling transmitting switch |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN108806757A true CN108806757A (en) | 2018-11-13 |
Family
ID=64083314
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201810627128.9A Pending CN108806757A (en) | 2018-06-19 | 2018-06-19 | High-speed boosting type signal sampling transmitting switch |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN108806757A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019242396A1 (en) * | 2018-06-19 | 2019-12-26 | 黄山学院 | Low voltage charge transfer circuit using negative voltage and gate voltage bootstrapping |
Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7064599B1 (en) * | 2003-11-19 | 2006-06-20 | National Semiconductor Corporation | Apparatus and method for signal transmission |
| CN201887738U (en) * | 2010-10-09 | 2011-06-29 | 中国电子科技集团公司第五十八研究所 | High-linearity-degree CMOS bootstrap sampling switch |
| US20160173086A1 (en) * | 2014-12-12 | 2016-06-16 | Realtek Semiconductor Corporation | Sampling circuit and sampling method |
| CN105846801A (en) * | 2015-01-29 | 2016-08-10 | 株式会社索思未来 | Switch circuit, analog-to-digital converter, and integrated circuit |
| CN106160743A (en) * | 2016-07-06 | 2016-11-23 | 电子科技大学 | A kind of boot-strapped switch circuit for sampling hold circuit |
| CN106330189A (en) * | 2016-08-24 | 2017-01-11 | 黄山学院 | Charge domain capacitance digital conversion circuit |
| CN206364778U (en) * | 2016-12-14 | 2017-07-28 | 无锡芯响电子科技有限公司 | A kind of electric capacity based on latch is to difference dynamic comparer |
| CN107276589A (en) * | 2017-05-11 | 2017-10-20 | 成都华微电子科技有限公司 | Cold standby system high-impedance state High Linear sampling hold circuit |
| CN107370487A (en) * | 2017-07-18 | 2017-11-21 | 中国电子科技集团公司第二十四研究所 | A kind of boot-strapped switch circuit based on NMOS tube |
| US9866237B1 (en) * | 2017-05-12 | 2018-01-09 | Texas Instruments Incorporated | Low power switched capacitor integrator, analog-to-digital converter and switched capacitor amplifier |
| CN107565955A (en) * | 2017-08-29 | 2018-01-09 | 黄山市祁门新飞电子科技发展有限公司 | Input signal amplitude of oscillation enhanced signal transmission circuit |
-
2018
- 2018-06-19 CN CN201810627128.9A patent/CN108806757A/en active Pending
Patent Citations (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7064599B1 (en) * | 2003-11-19 | 2006-06-20 | National Semiconductor Corporation | Apparatus and method for signal transmission |
| CN201887738U (en) * | 2010-10-09 | 2011-06-29 | 中国电子科技集团公司第五十八研究所 | High-linearity-degree CMOS bootstrap sampling switch |
| US20160173086A1 (en) * | 2014-12-12 | 2016-06-16 | Realtek Semiconductor Corporation | Sampling circuit and sampling method |
| CN105846801A (en) * | 2015-01-29 | 2016-08-10 | 株式会社索思未来 | Switch circuit, analog-to-digital converter, and integrated circuit |
| CN106160743A (en) * | 2016-07-06 | 2016-11-23 | 电子科技大学 | A kind of boot-strapped switch circuit for sampling hold circuit |
| CN106330189A (en) * | 2016-08-24 | 2017-01-11 | 黄山学院 | Charge domain capacitance digital conversion circuit |
| CN206364778U (en) * | 2016-12-14 | 2017-07-28 | 无锡芯响电子科技有限公司 | A kind of electric capacity based on latch is to difference dynamic comparer |
| CN107276589A (en) * | 2017-05-11 | 2017-10-20 | 成都华微电子科技有限公司 | Cold standby system high-impedance state High Linear sampling hold circuit |
| US9866237B1 (en) * | 2017-05-12 | 2018-01-09 | Texas Instruments Incorporated | Low power switched capacitor integrator, analog-to-digital converter and switched capacitor amplifier |
| CN107370487A (en) * | 2017-07-18 | 2017-11-21 | 中国电子科技集团公司第二十四研究所 | A kind of boot-strapped switch circuit based on NMOS tube |
| CN107565955A (en) * | 2017-08-29 | 2018-01-09 | 黄山市祁门新飞电子科技发展有限公司 | Input signal amplitude of oscillation enhanced signal transmission circuit |
Non-Patent Citations (1)
| Title |
|---|
| 李伦: "应用于RFID标签芯片的CMOS温度传感器的设计", 《中国知网》 * |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2019242396A1 (en) * | 2018-06-19 | 2019-12-26 | 黄山学院 | Low voltage charge transfer circuit using negative voltage and gate voltage bootstrapping |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN101277112B (en) | Low-power consumption assembly line a/d converter by sharing operation amplifier | |
| CN107565955B (en) | Input signal amplitude of oscillation enhanced signal transmission circuit | |
| CN101777916B (en) | Charge coupling assembly line A/D converter | |
| CN104124972A (en) | 10-bit ultra-low-power successive approximation register analog-to-digital converter based on charge redistribution | |
| CN104168025B (en) | A kind of charge type streamline gradual approaching A/D converter | |
| CN104113341A (en) | 12-bit intermediate-rate successive approximation type analog-digital converter | |
| CN104967451A (en) | Successive approximation type analog-to-digital converter | |
| CN105897271B (en) | A kind of high if sampling holding circuit for production line analog-digital converter | |
| CN101465649A (en) | Comparator with adjustable reference voltage | |
| CN101860368B (en) | Negative-voltage effective transmission circuit suitable for standard CMOS process | |
| CN103716054A (en) | Broadband sampling holding circuit used for successive approximation type analog-to-digital converter front-end | |
| CN105071806A (en) | High-linearity input signal buffer applied to high-speed analog-digital converter | |
| CN106921391A (en) | System-level error correction SAR analog-digital converters | |
| US20080180136A1 (en) | Pre-charge sample-and-hold circuit | |
| CN1561000B (en) | Pipeline structure analogue/digital converter of controlling input common-mode drift | |
| CN203708221U (en) | Broadband sample hold circuit used for front end of successive-approximation analog-to-digital converter | |
| CN103944571A (en) | High-speed configurable assembly line analog-to-digital converter | |
| CN101282118A (en) | Assembly line a/d converter and method for eliminating sampling-hold circuit | |
| CN108806757A (en) | High-speed boosting type signal sampling transmitting switch | |
| CN100586025C (en) | Multiply digital-analog conversion circuit and uses thereof | |
| CN104753533A (en) | Staged shared double-channel assembly line type analog to digital converter | |
| CN110690884B (en) | Grid voltage bootstrap switch circuit adopting CMOS transmission gate | |
| CN101471665A (en) | D/A converter circuit employing multistage amplifier part multiplexing technology | |
| CN201766574U (en) | High-speed common mode insensitive charge comparator circuit | |
| CN109412596A (en) | Low-voltage charge-domain sampling hold circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| TA01 | Transfer of patent application right | ||
| TA01 | Transfer of patent application right |
Effective date of registration: 20191122 Address after: Room 410, Building 3-2, Science Park, Luoyang National University, No. 2 Penglai Road, Jianxi District, Luoyang City, Henan Province, 471000 Applicant after: Luoyang photometric Intelligent Technology Co., Ltd. Address before: 510000 north, floor 3, building A1, No. 83, west of chepi xinyongkou, Tianhe District, Tianhe District, Guangzhou City, Guangdong Province Applicant before: Guangzhou leader Information Technology Co., Ltd. |
|
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20181113 |