CN108615789A - A method of removal is around plating - Google Patents

A method of removal is around plating Download PDF

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Publication number
CN108615789A
CN108615789A CN201810293240.3A CN201810293240A CN108615789A CN 108615789 A CN108615789 A CN 108615789A CN 201810293240 A CN201810293240 A CN 201810293240A CN 108615789 A CN108615789 A CN 108615789A
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China
Prior art keywords
silicon chip
plating
removal
back side
around
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CN201810293240.3A
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Chinese (zh)
Inventor
王东
金井升
刘长明
张昕宇
金浩
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Zhejiang Jinko Solar Co Ltd
Jinko Solar Co Ltd
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Zhejiang Jinko Solar Co Ltd
Jinko Solar Co Ltd
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Priority to CN201810293240.3A priority Critical patent/CN108615789A/en
Publication of CN108615789A publication Critical patent/CN108615789A/en
Pending legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/186Particular post-treatment for the devices, e.g. annealing, impurity gettering, short-circuit elimination, recrystallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02041Cleaning
    • H01L21/02057Cleaning during device manufacture
    • H01L21/0206Cleaning during device manufacture during, before or after processing of insulating layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0216Coatings
    • H01L31/02161Coatings for devices characterised by at least one potential jump barrier or surface barrier
    • H01L31/02167Coatings for devices characterised by at least one potential jump barrier or surface barrier for solar cells
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • H01L31/1804Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof comprising only elements of Group IV of the Periodic Table
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy
    • Y02E10/547Monocrystalline silicon PV cells
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electromagnetism (AREA)
  • Manufacturing & Machinery (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Sustainable Development (AREA)
  • Sustainable Energy (AREA)
  • Photovoltaic Devices (AREA)

Abstract

The invention discloses a kind of removals around the method for plating, including:Step 1, front boron diffusion is carried out to the silicon chip after alkali making herbs into wool, forms bsg layer;Step 2, after carrying out back side pn-junction etching to the silicon chip, SiON mask layers are plated on the bsg layer surface;Step 3, the silicon chip is placed in HF solution, the removal back side is around plating;Step 4, phosphorus diffusion is carried out to the back side of the silicon chip, forms PSG layers.The removal protects positive bsg layer by using the method that SiON mask layers do mask around the method for plating; make existing production line PECVD device; it is that manufacture of solar cells often uses chemical reagent, process window big that later stage cleaning, which only needs easy slot-type device, chemical reagent; yield production type is preferable; the back side can be completely removed around plating, pressure and short circuit current are opened in raising, while promoting the transfer efficiency for making battery; it is increased without new equipment, it is less to increase cost.

Description

A method of removal is around plating
Technical field
The present invention relates to photovoltaic module manufacturing technology fields, more particularly to a kind of removal around the method for plating.
Background technology
With being constantly progressive for technology so that the cost of electricity-generating of the new energy such as photovoltaic generation constantly declines, and gradually substitution passes The share for fossil energy of uniting, additionally it is possible to while coping with traditional fossil energy crisis, reduce the pollution to environment.Photovoltaic industry Competition, be concentrated mainly on improve solar cell transfer efficiency and component power.
Existing silicon chip is due to that with the minority carrier life time higher than P-type wafer, can be fabricated to the high efficiency of double-side photic, low decline The solar cell subtracted is being increasingly becoming solar cell industry focus of attention.As solar battery structure such as N-type is double Face, TOPCon (Tunnel Oxide Passivation Contact;Tunnel oxidation passivation contact) increase and technology into Step, share of the N-type single crystal battery in whole market are just gradually increasing.
And in N-type cell double-side cell manufacturing process, masking process can be all used, and there is mask just necessarily to have around plating Film.In N-type double-side cell manufacturing process, since it is desired that spreading twice, masking process will be used, generally carries out boron expansion first It dissipates, BSG does mask, the PN junction at the back side is quickly removed using etching apparatus, then carry out phosphorus diffusion.Also have and covered using slurry for rotary coating Film.
When quickly removing the PN junction at the back side, acid solution or lye may cover the silicon chip after boron diffusion, it is difficult to which control is to just Face BSG is completely retained, and positive BSG has certain corrosion failure risk, can thus not have mask effect, serious shadow Ring the efficiency of final battery;Spin coating slurry for mask have the later stage cleaning etc. pollution problems, volume production and feasibility it is still to be tested. And the equipment cost that this two removals are designed around the method for plating is higher, has further raised the cost of photovoltaic module, has been unfavorable for carrying The competitiveness of high enterprise.
Invention content
The object of the present invention is to provide a kind of removals around the method for plating, using existing equipment and uses solar-electricity Thoroughly around plating, that improves photovoltaic cell opens pressure and short circuit current to common agents in the production process of pond, improves transfer efficiency for removal, It is less to increase cost, the yields and competitiveness of product greatly improved.
In order to solve the above technical problems, an embodiment of the present invention provides a kind of methods removed around plating, including:
Step 1, front boron diffusion is carried out to the silicon chip after alkali making herbs into wool, forms bsg layer;
Step 2, after carrying out back side pn-junction etching to the silicon chip, SiON mask layers are plated on the bsg layer surface;
Step 3, the silicon chip is placed in HF solution, the removal back side is around plating;
Step 4, phosphorus diffusion is carried out to the back side of the silicon chip, forms PSG layers.
Wherein, further include between the step 3 and the step 4:
Step 5, the silicon chip is placed in KOH and H2O2Mixed solution or NH4OH and H2O2Mixed solution in.
Wherein, the step 5 includes:
The silicon chip is placed in the KOH that mass ratio is 1%~2% and the H that mass ratio is 5%~10%2O2Mixed solution Or mass ratio be 5%~10% NH4OH and mass ratio be 5%~10% H2O2 mixed solution in soaking and washing 1min~ 2min。
Wherein, between the step 4 and the step 5, further include:
Step 6, the silicon chip is placed in soaking and washing in the mixed solution of HF solution and HCl solution, removes the silicon chip The K ions on surface.
Wherein, between the step 4 and the step 5, further include:
Step 6, it is 0.5%~1% the silicon chip to be placed in HF solution that mass ratio is 0.5%~1% with mass ratio Soaking and washing in the mixed solution of HCl solution removes the K ions of the silicon chip surface.
Wherein, the thickness of the SiON mask layers is 120nm~180nm.
Wherein, the step 3 includes:
By the silicon chip be placed in mass ratio be 5%~20% HF solution in impregnate 5min~20min, removal the back side around Plating.
The removal that the embodiment of the present invention is provided has the following advantages compared with prior art around the method for plating:
The method provided in an embodiment of the present invention removed around plating, by using the method that SiON mask layers do mask, to just The bsg layer in face is protected so that and existing production line PECVD device, later stage cleaning only need easy slot-type device, Chemical reagent be manufacture of solar cells often use chemical reagent, process window is big, and yield production type is preferable, can completely remove the back side around Pressure and short circuit current are opened in plating, raising, while promoting the transfer efficiency for making battery, are increased without new equipment, are increased cost It is less.
Description of the drawings
In order to more clearly explain the embodiment of the invention or the technical proposal in the existing technology, to embodiment or will show below There is attached drawing needed in technology description to be briefly described, it should be apparent that, the accompanying drawings in the following description is the present invention Some embodiments for those of ordinary skill in the art without creative efforts, can also basis These attached drawings obtain other attached drawings.
Fig. 1 is the step flow diagram of one embodiment of method of the removal provided in an embodiment of the present invention around plating;
Fig. 2 is the step flow diagram of another embodiment of method of the removal provided in an embodiment of the present invention around plating.
Specific implementation mode
Following will be combined with the drawings in the embodiments of the present invention, and technical solution in the embodiment of the present invention carries out clear, complete Site preparation describes, it is clear that described embodiments are only a part of the embodiments of the present invention, instead of all the embodiments.It is based on Embodiment in the present invention, it is obtained by those of ordinary skill in the art without making creative efforts every other Embodiment shall fall within the protection scope of the present invention.
~Fig. 2 is please referred to Fig.1, Fig. 1 is the step of one embodiment of method of the removal provided in an embodiment of the present invention around plating Rapid flow diagram;Fig. 2 is that removal provided in an embodiment of the present invention is shown around the step flow of another embodiment of the method for plating It is intended to.
In a specific embodiment, the method removed around plating, including:
Step 1, front boron diffusion is carried out to the silicon chip after alkali making herbs into wool, forms bsg layer;
Step 2, after carrying out back side pn-junction etching to the silicon chip, SiON mask layers are plated on the bsg layer surface;
Step 3, the silicon chip is placed in HF solution, the removal back side is around plating;
Step 4, phosphorus diffusion is carried out to the back side of the silicon chip, forms PSG layers.
By using the method that SiON mask layers do mask, positive bsg layer is protected so that existing production line PECVD device, it is the common chemistry examination of manufacture of solar cells that later stage cleaning, which only needs easy slot-type device, chemical reagent, Agent, process window is big, and yield production type is preferable, can completely remove the back side around plating, pressure and short circuit current are opened in raising, are promoted so that battery Transfer efficiency while, be increased without new equipment, it is less to increase cost, greatly improves the yields and competitiveness of product.
The silicon chip in the present invention is pointed out that mainly for N-type silicon chip, but is not limited to N-type silicon chip.
After increasing SiON mask layers in the present invention, SiON mask layers not only can be used as anti-reflection layer, in photoetching process In prevent from reflecting.
The present invention is not especially limited the deposition method and deposition thickness of SiON mask layers, and main function is in photoetching In the process, positive bsg layer is protected.
Mainly by using silicon chip to be placed in HF solution in the present invention, the removal back side is around plating.But it is inevitable There are the impurity such as greasy dirt for introducing, therefore come the equal impurity that degrease, to further include between the step 3 and the step 4:
Step 5, the silicon chip is placed in KOH and H2O2Mixed solution or NH4OH and H2O2Mixed solution in.
It should be pointed out that solution type, concentration, removal time and the temperature of the invention in the cleaning step is not Make specific limit.
Specifically, the step 5 generally comprises:
The silicon chip is placed in the KOH that mass ratio is 1%~2% and the H that mass ratio is 5%~10%2O2Mixed solution Or the NH that mass ratio is 5%~10%4The H that OH is 5%~10% with mass ratio2O2Mixed solution in soaking and washing 1min~ 2min。
Further, due to introducing foreign metal ion in above-mentioned cleaning process, the conversion of photovoltaic cell is imitated Rate has larger negative effect, and so that surface is hydrophily, it is possible to the life and reliability for reducing photovoltaic cell, because This between the step 4 and the step 5, further includes in order to solve this problem:
Step 6, the silicon chip is placed in soaking and washing in the mixed solution of HF solution and HCl solution, removes the silicon chip The K ions on surface.
Specifically, between the step 4 and the step 5, further include:
Step 6, it is 0.5%~1% the silicon chip to be placed in HF solution that mass ratio is 0.5%~1% with mass ratio Soaking and washing in the mixed solution of HCl solution removes the K ions of the silicon chip surface.
The present invention is not especially limited the thickness of SiON mask layers, can carry out validation trial, the SiON The thickness of mask layer is generally 120nm~180nm.
Removal is mainly placed in HF solution around plating in the present invention, and the present invention is not especially limited detailed process, and one As the step 3 include:
By the silicon chip be placed in mass ratio be 5%~20% HF solution in impregnate 5min~20min, removal the back side around Plating.
In one embodiment, the method around plating for removing silicon chip is as follows:
Front boron diffusion is carried out to the N-type silicon chip after alkali making herbs into wool, forms bsg layer;
After the SiON mask layers that 120nm thickness is plated on the bsg layer surface, back-etching pn-junction is carried out to the N-type silicon chip;
The N-type silicon chip is placed in the HF solution that mass ratio is 20% and impregnates 5min;
The N-type silicon chip is placed in the KOH that mass ratio is 2% and the H that mass ratio is 10%2O2Mixed solution in impregnate Clean 1min;
The N-type silicon chip is placed in the mixed solution of the HF solution that mass ratio is 1% and the HCl solution that mass ratio is 1% Middle soaking and washing 1min removes the K ions on the N-type silicon chip surface;
Phosphorus diffusion is carried out to the back side of the N-type silicon chip, forms PSG layers.
In conclusion removal provided in an embodiment of the present invention does mask around the method for plating by using SiON mask layers Method protects positive bsg layer so that existing production line PECVD device, later stage cleaning only need easy Slot-type device, chemical reagent are that manufacture of solar cells often uses chemical reagent, and process window is big, and yield production type is preferable, can be complete The back side is removed around plating, pressure and short circuit current are opened in raising, while promoting the transfer efficiency for making battery, are increased without new set It is standby, it is less to increase cost.
Removal provided by the present invention is described in detail around the method for plating above.Specific case used herein Principle and implementation of the present invention are described, and the explanation of above example is only intended to help to understand side of the invention Method and its core concept.It should be pointed out that for those skilled in the art, not departing from the principle of the invention Under the premise of, it can be with several improvements and modifications are made to the present invention, these improvement and modification also fall into the claims in the present invention In protection domain.

Claims (7)

1. a kind of removal is around the method for plating, which is characterized in that including:
Step 1, front boron diffusion is carried out to the silicon chip after alkali making herbs into wool, forms bsg layer;
Step 2, after carrying out back side pn-junction etching to the silicon chip, SiON mask layers are plated on the bsg layer surface;
Step 3, the silicon chip is placed in HF solution, the removal back side is around plating;
Step 4, phosphorus diffusion is carried out to the back side of the silicon chip, forms PSG layers.
2. method of the removal around plating as described in claim 1, which is characterized in that also wrapped between the step 3 and the step 4 It includes:
Step 5, the silicon chip is placed in KOH and H2O2Mixed solution or NH4OH and H2O2Mixed solution in.
3. method of the removal around plating as claimed in claim 2, which is characterized in that the step 5 includes:
The silicon chip is placed in the KOH that mass ratio is 1%~2% and the H that mass ratio is 5%~10%2O2Mixed solution or matter Amount is than the NH for 5%~10%4The H that OH is 5%~10% with mass ratio2O2Mixed solution in soaking and washing 1min~2min.
4. method of the removal around plating as claimed in claim 3, which is characterized in that between the step 4 and the step 5, also Including:
Step 6, the silicon chip is placed in soaking and washing in the mixed solution of HF solution and HCl solution, removes the silicon chip surface K ions.
5. method of the removal around plating as claimed in claim 4, which is characterized in that between the step 4 and the step 5, also Including:
Step 6, that the silicon chip is placed in the HCl that HF solution that mass ratio is 0.5%~1% and mass ratio are 0.5%~1% is molten Soaking and washing in the mixed solution of liquid removes the K ions of the silicon chip surface.
6. as claimed in claim 5 removal around plating method, which is characterized in that the thickness of the SiON mask layers be 120nm~ 180nm。
7. method of the removal around plating as claimed in claim 6, which is characterized in that the step 3 includes:
The silicon chip is placed in the HF solution that mass ratio is 5%~20% and impregnates 5min~20min, the removal back side is around plating.
CN201810293240.3A 2018-03-30 2018-03-30 A method of removal is around plating Pending CN108615789A (en)

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Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109698254A (en) * 2018-12-26 2019-04-30 浙江晶科能源有限公司 A method of removal LPCVD polysilicon is around plating
CN109962126A (en) * 2019-04-29 2019-07-02 浙江晶科能源有限公司 The manufacturing system and method for N-type passivation contact battery
CN110416364A (en) * 2019-08-07 2019-11-05 山西潞安太阳能科技有限责任公司 The back side monocrystalline PERC alkaline etching technique
CN110571309A (en) * 2019-03-20 2019-12-13 常州大学 Novel Poly removal coil plating cleaning method
CN113013029A (en) * 2019-12-20 2021-06-22 苏州阿特斯阳光电力科技有限公司 Additive for removing polycrystalline silicon or amorphous silicon by spin coating of silicon solar cell, spin coating removing method and method for improving yield of N-type cell
WO2022016920A1 (en) * 2020-07-22 2022-01-27 常州时创能源股份有限公司 Preparation method for topcon battery

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CN102364698A (en) * 2011-06-30 2012-02-29 常州天合光能有限公司 Preparation method of solar cell for reutilizing diffusion oxide layer
CN102683504A (en) * 2012-06-05 2012-09-19 中国科学院苏州纳米技术与纳米仿生研究所 Method improving manufacturing process of crystalline silicon solar cell through arsenic ion implantation
CN105845778A (en) * 2016-05-19 2016-08-10 晋能清洁能源科技有限公司 Crystalline silicon PERC cell alkali polishing method not influencing front surface
CN106298982A (en) * 2016-09-09 2017-01-04 浙江晶科能源有限公司 A kind of manufacture method of N-type double-side cell
CN107331733A (en) * 2017-08-02 2017-11-07 浙江晶科能源有限公司 A kind of preparation method of one side polysilicon

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CN101930912A (en) * 2010-07-20 2010-12-29 晶澳太阳能有限公司 Process of realizing p plus and n plus diffusion on both sides of silicon chip by utilizing mask
CN102364698A (en) * 2011-06-30 2012-02-29 常州天合光能有限公司 Preparation method of solar cell for reutilizing diffusion oxide layer
CN102683504A (en) * 2012-06-05 2012-09-19 中国科学院苏州纳米技术与纳米仿生研究所 Method improving manufacturing process of crystalline silicon solar cell through arsenic ion implantation
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Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109698254A (en) * 2018-12-26 2019-04-30 浙江晶科能源有限公司 A method of removal LPCVD polysilicon is around plating
CN110571309A (en) * 2019-03-20 2019-12-13 常州大学 Novel Poly removal coil plating cleaning method
CN110571309B (en) * 2019-03-20 2021-03-16 常州大学 Poly removal coil plating cleaning method
CN109962126A (en) * 2019-04-29 2019-07-02 浙江晶科能源有限公司 The manufacturing system and method for N-type passivation contact battery
CN109962126B (en) * 2019-04-29 2023-12-05 浙江晶科能源有限公司 Manufacturing system and method of N-type passivation contact battery
CN110416364A (en) * 2019-08-07 2019-11-05 山西潞安太阳能科技有限责任公司 The back side monocrystalline PERC alkaline etching technique
CN110416364B (en) * 2019-08-07 2021-04-20 山西潞安太阳能科技有限责任公司 Single crystal PERC back alkali etching process
CN113013029A (en) * 2019-12-20 2021-06-22 苏州阿特斯阳光电力科技有限公司 Additive for removing polycrystalline silicon or amorphous silicon by spin coating of silicon solar cell, spin coating removing method and method for improving yield of N-type cell
CN113013029B (en) * 2019-12-20 2022-07-29 苏州阿特斯阳光电力科技有限公司 Additive for removing polycrystalline silicon or amorphous silicon by spin coating of silicon solar cell, spin coating removing method and method for improving yield of N-type cell
WO2022016920A1 (en) * 2020-07-22 2022-01-27 常州时创能源股份有限公司 Preparation method for topcon battery

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Application publication date: 20181002