CN108565283A - GaN base T-type grid high-frequency element and its preparation method and application - Google Patents
GaN base T-type grid high-frequency element and its preparation method and application Download PDFInfo
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
- H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
- H01L29/42312—Gate electrodes for field effect devices
- H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
- H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
- H01L29/42356—Disposition, e.g. buried gate electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66446—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
- H01L29/66462—Unipolar field-effect transistors with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET] with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
- H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
- H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
Abstract
The invention discloses a kind of GaN base T-type grid high-frequency elements and its preparation method and application.The GaN base T-type grid high-frequency element includes：Hetero-junctions comprising the first semiconductor and the second semiconductor being formed on the first semiconductor, the second semiconductor has the band gap for being wider than the first semiconductor, and two-dimensional electron gas is formed in hetero-junctions；The P-type semiconductor and high-resistance semi-conductor being formed on hetero-junctions；And source electrode, drain and gate；P-type semiconductor is located at region under grid and is connect with grid, and the length of grid is more than the length of P-type semiconductor, and P-type semiconductor is used to exhaust the two-dimensional electron gas in region under grid, and high-resistance semi-conductor is located between P-type semiconductor and source electrode or drain electrode；Source electrode can be electrically connected with drain electrode by the two-dimensional electron gas.The present invention need not perform etching region under device gate, the problems such as avoiding the uniformity because etching technics introduces, repeatability and damage, without using electron beam lithography, the problems such as solution under low production efficiency.
Description
Technical field
The present invention is more particularly directed to a kind of GaN base T-type grid high-frequency elements and its preparation method and application, belong to semiconductor radio frequency
Device arts.
Background technology
It is after the first generation semiconductor that silicon (Si) is representative with the third generation semi-conducting material that gallium nitride (GaN) is representative
Material and with GaAs (GaAs) be representative second generation semi-conducting material after, what is developed rapidly in recent years novel partly leads
Body material.GaN materials have outstanding advantages of big energy gap, big electron drift velocity, high heat conductance, high temperature resistant and irradiation, special
High frequency, high efficiency, heat safe high-power electronic device Shi He not made.It is brilliant from first GaN high electron mobility in 1993
Since body pipe is born, GaN HEMT (High Electron Mobility Transistor) devices are integrated with single chip microwave
Circuit (Monolithic Microwave Integrated Circuit, MMIC) is quickly grown in microwave regime, is covered
The frequency range of 100MHz~100GHz.
With the development of high frequency wireless telecommunications industry, the construction of 5G network infrastructures, anti-ballistic radar and other are special
Field requires that this makes market using the high performance radio-frequency devices of high power density, high frequency, high temperature resistant, adverse environment resistant
It constantly heats up for the demand of GaN device.For example, inside present wireless base station, have begun to replace Si bases using GaN device
Radio-frequency devices, in base station equipment, the use of GaN device is more and more extensive.Compared with Si or GaAs devices, GaN has forbidden band
The wide, advantages such as critical breakdown electric field is high, electron saturation velocities are high, thermal conductivity is high, Radiation hardness is strong, be very suitable for using 5G or
Following communication system, power is bigger, frequency is higher, and GaN advantages are more apparent.
In the heterogeneous device of compound semiconductor, the size of channel resistance directly affects the output current of device and electronics moves
Shifting rate, and then the frequency characteristic of device is influenced, and the effect of parasitic capacitance device between the gate-source of device, gate-drain is in ON state/pass
Charge/discharge rates during state, and then influence the switching speed of device.However in the related process for improving device frequency characteristic
In technology, it is the main method for improving device frequency characteristic to reduce device grid length and use different grid metal patterns.Grid length subtracts
The small reduction for meaning gate resistance, different grid metal patterns can reduce parasitic capacitance, and the combination of the two makes the frequency of device
Characteristic significantly improves.But electron beam lithography is mainly used in terms of reducing grid length at present, due to its inefficiency, no
It is suitble to the batch production of device.
As shown in Figure 1, in the prior art by electron beam lithography and dry etching technology realization T-type grid, but by
In dry etching can to grid under GaN material bring damage, influence the reliability of device.Simultaneously as the introducing of interfacial state, makes
Device threshold voltage during device use due to being influenced by grid voltage stress, threshold voltage can occur partially at any time
It moves.It passes through partial etching Si3N4Realize T-type grid, but etching can cause etching homogeneity, repeatability and etching injury etc. to be asked
Topic.Due to the introducing of interfacial state so that the threshold voltage of device during device use due to being influenced by grid voltage stress,
Threshold voltage can shift at any time.Interfacial state can impact the electron mobility under grid simultaneously, make mobility under grid
Significantly decline, seriously affect device performance, industrial quarters also avoids lithographic method as possible.
In order to obtain smaller grid length and higher frequency characteristic, generally use electron beam lithography, electron beam
Although exposure technique may be implemented tens nanometers of grid length techniques, but due to be in exposure process by beam spot surface by
Spot scan needs on the pixel of each figure to stop the regular hour, and which has limited the speed of graph exposure.Electron beam light
The bottleneck being engraved in production capacity makes it generally be only used as a kind of ancillary technique in microelectronics industry and exist, and is mainly used in small
The preparation and research and development of batch device.
Invention content
The main purpose of the present invention is to provide a kind of GaN base T-type grid high-frequency element and its preparation method and application, with gram
Take the deficiencies in the prior art.
For realization aforementioned invention purpose, the technical solution adopted by the present invention includes：
An embodiment of the present invention provides a kind of GaN base T-type grid high-frequency elements, including：
Hetero-junctions comprising the first semiconductor and the second semiconductor being formed on the first semiconductor, described the second half lead
Body has the band gap for being wider than the first semiconductor, and is formed with two-dimensional electron gas in the hetero-junctions；
The P-type semiconductor and high-resistance semi-conductor being formed on the hetero-junctions；And
Source electrode, drain and gate；
The source electrode, drain electrode and hetero-junctions form Ohmic contact；The P-type semiconductor is located at region under grid and connects with grid
It connects, and the length of the grid is more than the length of P-type semiconductor, the P-type semiconductor is used to exhaust the two dimension electricity in region under grid
Sub- gas, the high-resistance semi-conductor are located between any one in P-type semiconductor and source electrode, drain electrode；
The source electrode can be electrically connected with drain electrode by the two-dimensional electron gas.
An embodiment of the present invention provides a kind of preparation methods of GaN base T-type grid high-frequency element, including：
The hetero-junctions for including the first semiconductor and the second semiconductor is provided, second semiconductor is formed in the first semiconductor
On, and there is the band gap for being wider than first semiconductor, it is formed with two-dimensional electron gas in the hetero-junctions；
P-type semiconductor is formed on the hetero-junctions and high-resistance semi-conductor, the P-type semiconductor are located at region under grid, institute
High-resistance semi-conductor is stated to be located between any one in P-type semiconductor and source electrode, drain electrode；
Source electrode, drain and gate are made, the grid is made to be connect with P-type semiconductor, the length of the grid is more than p-type half
The length of conductor, the P-type semiconductor are used to exhaust the two-dimensional electron gas in region under grid；The source electrode can pass through institute with drain electrode
State two-dimensional electron gas connection.
The embodiment of the present invention additionally provides the GaN base T-type grid high-frequency element or by the GaN base T-type grid high frequency device
The GaN base T-type grid high-frequency element that the preparation method of part obtains is in the application of RF application.
Compared with prior art, advantages of the present invention includes：
1) present invention is realized enhanced by p-type grid；
2) region under device gate need not be performed etching, avoid uniformity because etching technics introduces, repeatability and
The problems such as damage；
3) without using electron beam lithography, the problems such as solution under low production efficiency；
4) the enhanced HEMT that can be applicable to RF application is realized；
5) HR-GaN can reduce technology difficulty as the supporting layer of T-type grid metal；
6) reduction of p-GaN length can reduce gate resistance, improve the frequency characteristic of device；
7) T-type grid metal can reduce the parasitic capacitance of device, improve the frequency characteristic of device.
Description of the drawings
Fig. 1 is to realize that the device architecture of T-type grid shows by electron beam lithography and dry etching technology in the prior art
It is intended to；
Fig. 2 is the structural schematic diagram of the device epitaxial structure formed in the embodiment of the present invention 1；
Fig. 3 is to deposit Si in the embodiment of the present invention 13N4Device architecture schematic diagram after dielectric layer；
Fig. 4 is the Si for the exterior domain that area of grid is removed in the embodiment of the present invention 13N4Device architecture signal after dielectric layer
Figure；
Fig. 5 is that the P-GaN of the exterior domain of area of grid is formed high resistant GaN using hydrogen plasma in the embodiment of the present invention 1
Device architecture schematic diagram afterwards；
Fig. 6 is the Si that area of grid is removed in the embodiment of the present invention 13N4Device architecture schematic diagram after dielectric layer；
Fig. 7 is that the device architecture schematic diagram after source, drain region is etched in the embodiment of the present invention 1；
Fig. 8 is the device architecture schematic diagram after having made source electrode, drain electrode in the embodiment of the present invention 1；
Fig. 9 is the device architecture schematic diagram after having made T-type grid in the embodiment of the present invention 1.
Specific implementation mode
In view of deficiency in the prior art, inventor is able to propose the present invention's through studying for a long period of time and largely putting into practice
Technical solution.The technical solution, its implementation process and principle etc. will be further explained as follows.
An embodiment of the present invention provides a kind of GaN base T-type grid high-frequency elements, including：
Hetero-junctions comprising the first semiconductor and the second semiconductor being formed on the first semiconductor, described the second half lead
Body has the band gap for being wider than the first semiconductor, and is formed with two-dimensional electron gas in the hetero-junctions；
The P-type semiconductor and high-resistance semi-conductor being formed on the hetero-junctions；And
Source electrode, drain and gate；
The source electrode, drain electrode and hetero-junctions form Ohmic contact；The P-type semiconductor is located at region under grid and connects with grid
It connects, and the length of the grid is more than the length of P-type semiconductor, the P-type semiconductor is used to exhaust the two dimension electricity in region under grid
Sub- gas, the high-resistance semi-conductor are located between any one in P-type semiconductor and source electrode, drain electrode；
The source electrode can be electrically connected with drain electrode by the two-dimensional electron gas.
Further, the grid connect T-shaped, Y types or mushroom-shaped with P-type semiconductor.
Preferably, the length of the grid is 0.1nm-2 μm, and the width of grid is 0.1nm-5 μm.
Further, first semiconductor is selected from group III-nitride or the compound of iii-v element compounds.
Preferably, the second semiconductor is selected from group III-nitride.
Preferably, the compound of the iii-v element compounds includes GaAs.
Preferably, the material of the P-type semiconductor includes p-GaN, p-AlGaN, p-type diamond, any one in p-NiO
Kind, but not limited to this.
Preferably, the high-resistance semi-conductor includes HR-GaN.
Preferably, the material of first semiconductor includes GaN or GaAs, but not limited to this.
Preferably, the material of second semiconductor includes AlGaN, AlInN, AlGaAs or InGaAs, but not limited to this.
Further, the P-type semiconductor is wholely set with high-resistance semi-conductor.
In some more specific embodiment, the high-resistance semi-conductor is by P-type semiconductor through H plasma treatment, n
Any one mode processing in type impurity injecting compensating is formed；Alternatively, the P-type semiconductor by high-resistance semi-conductor through local p
Any one mode processing in the injection of type impurity, low-energy electron beam radiation is formed.
In some more specific embodiment, insertion is also distributed between first semiconductor and the second semiconductor
Layer.
Preferably, the material of the insert layer includes InGaN or AlN, but not limited to this.
In some more specific embodiment, the hetero-junctions is formed on the buffer layer, and the buffer layer is formed in
On substrate.
Preferably, the material of the buffer layer includes high resistant AlGaN or high resistant GaN.
Preferably, the material of the substrate includes any one in Si, SiC, sapphire, but not limited to this.
In some more specific embodiment, dielectric layer is also distributed between the grid and P-type semiconductor.
Preferably, the material of the dielectric layer includes Al2O3、SiO2、AlON、Si3N4、HfO2、GaMgO、SiON、HfON、
Any one in TiN, hexagonal boron nitride, but not limited to this.
Preferably, the thickness of the dielectric layer is 0.1nm-1 μm.
An embodiment of the present invention provides a kind of preparation methods of GaN base T-type grid high-frequency element, including：
The hetero-junctions for including the first semiconductor and the second semiconductor is provided, second semiconductor is formed in the first semiconductor
On, and there is the band gap for being wider than first semiconductor, it is formed with two-dimensional electron gas in the hetero-junctions；
P-type semiconductor is formed on the hetero-junctions and high-resistance semi-conductor, the P-type semiconductor are located at region under grid, institute
High-resistance semi-conductor is stated to be located between any one in P-type semiconductor and source electrode, drain electrode；
Source electrode, drain and gate are made, the grid is made to be connect with P-type semiconductor, the length of the grid is more than p-type half
The length of conductor, the P-type semiconductor are used to exhaust the two-dimensional electron gas in region under grid；The source electrode can pass through institute with drain electrode
State two-dimensional electron gas connection.
Further, first semiconductor is selected from group III-nitride or the compound of iii-v element compounds.
Preferably, the second semiconductor is selected from group III-nitride.
Preferably, the compound of the iii-v element compounds includes GaAs.
Preferably, the material of the P-type semiconductor includes p-GaN, p-AlGaN, p-type diamond, any one in p-NiO
Kind, but not limited to this.
Preferably, the high-resistance semi-conductor includes HR-GaN.
Preferably, the material of first semiconductor includes GaN or GaAs, but not limited to this.
Preferably, the material of second semiconductor includes AlGaN, AlInN, AlGaAs or InGaAs, but not limited to this.
In some more specific embodiment, the preparation method of the GaN base T-type grid high-frequency element includes：
P-type semiconductor is formed on the hetero-junctions, at least with appointing in H plasma treatment, p-type impurity injecting compensating
A kind of mode of anticipating handles the part of P-type semiconductor, to form high-resistance semi-conductor；Alternatively, the shape on the hetero-junctions
At high-resistance semi-conductor, at least to high-resistance semi-conductor in a manner of any one in the injection of localized p-type impurity, low-energy electron beam radiation
Part handled, to form P-type semiconductor；
And removed in a manner of dry etching or wet etching source electrode, drain region high-resistance semi-conductor, carry out later
The making of source electrode and grid.
In some more specific embodiment, the preparation method of the GaN base T-type grid high-frequency element includes：
Dielectric layer is formed on the P-type semiconductor, makes grid on the dielectric layer later.
Preferably, the material of the dielectric layer includes Al2O3、SiO2、AlON、Si3N4、HfO2、GaMgO、SiON、HfON、
Any one in TiN, hexagonal boron nitride, but not limited to this.
Further, the grid connect T-shaped, Y types or mushroom-shaped with P-type semiconductor.
The embodiment of the present invention additionally provides the GaN base T-type grid high-frequency element or by the GaN base T-type grid high frequency device
The GaN base T-type grid high-frequency element that the preparation method of part obtains is in the application of RF application.
For example, the embodiment of the present invention additionally provides a kind of radio-frequency apparatus comprising the GaN base T-type grid high-frequency element.
In some more specific embodiment, the preparation method of GaN base T-type grid high-frequency element may include：
1) it utilizes outside Metal Organic Chemical Vapor Deposition (MOCVD), molecular beam epitaxy (MBE) or hydrite vapor phase
Prolong the technologies such as (HVPE), pulsed laser deposition (PLD), growth substrates/buffer layer/group III-nitride heterojunction structure/p-type is partly led
The epitaxial structure of body；Substrate can select Si, SiC or sapphire etc., and the thickness of substrate can be from 100 μm to 10mm.Buffering
Layer can select high resistant GaN, high resistant AlGaN etc., and the thickness of buffer layer can be from 100nm to 1mm；Group III-nitride hetero-junctions
Structure can be AlGaN/GaN heterojunction structures, AlInN/GaN heterojunction structures, AlGaN/InGaN/GaN heterojunction structures, AlGaN/
AlN/GaN heterojunction structures etc.；The thickness of group III-nitride heterojunction structure can be from 10nm to 10 μm；P-type semiconductor can be selected
The p-type semiconductor materials such as p-GaN, p-AlGaN, thickness can be from 10nm to 1 μm；It is ternary in group III-nitride heterojunction structure
Closing object semiconductor one of which group-III element component can be from 0 to 1；
2) atomic layer deposition (ALD), the atomic layer deposition (PEALD) of plasmaassisted, sputtering, low pressure chemical gas are utilized
Mutually deposition (LPCVD), pulsed laser deposition (PLD), the chemical vapor deposition (PECVD) of plasma enhancing, plasma oxygen
Change, thermal oxide, Metal Organic Chemical Vapor Deposition (MOCVD), mechanical stripping simultaneously orient the cvd dielectric layers skills such as transfer
Art deposits insulating medium layer in device surface, and dielectric layer can be single layer Al2O3、SiO2、AlON、Si3N4、HfO2、GaMgO、
The insulators such as SiON, HfON, TiN either the insulation two-dimensional material such as hexagonal boron nitride or the multilayer knot that is made of above-mentioned material
Structure, or have the dielectric layer of micrographics structure；
3) dry etchings or the wet etch techniques such as oxygen plasma, reactive ion etching, ion beam etching, removal are utilized
Dielectric layer other than gate region, the dielectric layer of area of grid is as protective layer；Processing region can be shifted by photoetching or mask
Etc. technologies be determined；
4) pass through processing by p-GaN (or p-AlGaN, p-type diamond, the p-type semiconductors material such as p-NiO outside gate region
Material) passivation, form high-resistance semi-conductor (HR-GaN).The equipment such as reactive ion etching (ICP) can be used to p-type GaN using hydrogen etc.
Ion processing, p-type impurity injecting compensating etc. handle the P-GaN other than gate region.For p-AlGaN, p-type diamond, p-NiO etc.
P-type impurity injecting compensating etc. may be used in p-type semiconductor material；Processing region can be shifted by photoetching or mask etc. technologies into
Row determines；
5) dry etchings or the wet etch techniques such as oxygen plasma, reactive ion etching, ion beam etching, removal are utilized
The high resistant GaN of ohmic area, it is therefore an objective to form good Ohmic contact.Processing region can pass through the skills such as photoetching or mask transfer
Art is determined；
6) metal deposition techniques such as electron beam evaporation or sputtering are utilized, source electrode (S) and drain electrode are made in ohmic area
(D)；
7) metal deposition techniques such as electron beam evaporation or sputtering are utilized, in P-GaN (or p-type semiconductors materials such as p-AlGaN
Material) on make T-type gate electrode (G) or other patterns metal；The grid length of grid is not by by the p-type of H corona treatments
Region is determined that the height of grid foot to grid top is determined by the thickness in the regions P；The width of grid cover is the grid gold subsequently prepared
Belong to width/thickness；This grid cover can be multilayer, gradually broaden, can further decrease the resistance and capacitance of grid in this way.It is preferred that
, the length of gate electrode is 0.1nm-02 μm, and width is 0.1nm-5 μm, and the region gate electrode (G) can be turned by photoetching or mask
The technologies such as shifting are determined.
It should be noted that grid of the present invention, source electrode, drain electrode i.e. gate electrode, source electrode, drain electrode；Under the grid
Corresponding region immediately below region, area of grid, that is, grid, under source, drain region and source electrode, drain region refer both to source electrode and drain electrode just
Square corresponding region.
Embodiment 1
1) Metal Organic Chemical Vapor Deposition (MOCVD) is utilized to grow device architecture as shown in Figure 2.Substrate material
It is 200 μm~1500 μm, preferably 400 μm that matter, which selects Si, thickness,；The material selection high resistant GaN or high resistant AlGaN of buffer layer,
Thickness is 1000nm~5000nm, preferably 4200nm；(GaN could alternatively be GaAs or other energy to AlGaN/GaN heterojunction structures
The material of hetero-junctions is enough provided, AlGaN could alternatively be AlInN, AlGaAs or InGaAs or other are capable of providing hetero-junctions
Material) in GaN thickness be 100nm~500nm, preferably 260nm；AlGaN thickness be 15nm~30nm, preferably 18nm,
The content of middle Al components is 15~30wt%, preferably 18wt%；P-type semiconductor material select p-GaN, thickness be 50nm~
100nm, preferably 70nm；
2) with the mode of low-pressure chemical vapor deposition (LPCVD) device architecture surface shown in Fig. 2 (i.e. on heterojunction structure)
Deposition insulation Si3N4Dielectric layer；As shown in figure 3, thickness of dielectric layers is 15nm；
3) Si other than chemicals BOE processing area of grid is utilized3N4, structure that treated is as shown in figure 4, chemical drugs
Product processing region can be determined by photoetching, and photoetching specific steps include pretreatment, spin coating, front baking, exposed and developed；
4) H plasma treatment device surface is used in reactive ion etching (ICP) equipment, is made not by Si3N4Layer protection
P-GaN formed high resistant GaN (HR-GaN), treated, and device architecture is as shown in Figure 5；
5) utilize chemicals BOE by Si3N4Layer removes, and removes Si3N4The device architecture of layer is as shown in Figure 6；
6) source, drain region are performed etching with reactive ion etching technology, etching depth 70nm, purpose be make source electrode,
Drain electrode forms good Ohmic contact with hetero-junctions, and device architecture is as shown in Figure 7；
7) in a manner of electron beam evaporation, source after etching, drain region depositing Ti/Al/Ni/Au (source electrode and electric leakage
Pole material), source electrode (S) and drain electrode (D) are formed, device architecture is as shown in figure 8, the deposition regions Ti/Al/Ni/Au and step
6) patterned area in overlaps, and need not repeat photoetching and determine region；
8) in a manner of electron beam evaporation, Ni/Au is deposited on P-GaN as T-type grid metal, as shown in Figure 9；Gate electrode
Region determines the use of photoetching technique, and the specific steps of photoetching include pretreatment, spin coating, front baking, exposed and developed
A kind of GaN base T-type grid high-frequency element preparation method that the embodiment of the present invention proposes uses reactive ion etching (ICP)
Etc. equipment, using the P-GaN other than H corona treatment gate regions, in H plasma treatment procedures, H plasmas can be to
Lower and sideways diffusion, has the regions P-GaN of H corona treatments, P-GaN that can be passivated into high resistant gallium nitride (HR-GaN),
T-type grid metal is not being prepared on the P-GaN of H corona treatments, can be realized nanoscale grid length using the method, be improved device
The frequency characteristic of part.
It should be noted that the embodiment of the present invention (is not limited to that reaction using the equipment that can generate hydrogen (H) plasma
The equipment such as ion etching (ICP, RIE))；Utilize electronic device of the processing based on AlGaN/GaN two-dimensional electron gas at H plasmas
The region grid (gate) other than P-GaN；In H plasma treatment procedures, H plasmas can longitudinally, laterally be spread, H
The plasma treated regions P-GaN can be passivated to form high resistant gallium nitride (HR-GaN), and then under the regions HR-GaN
AlGaN/GaN two-dimensional electron gas is not exhausted by P-GaN；It is the photoresist of 10nm~1 μm with line width in device processes
Or SiO2Or SiNx carries out H corona treatments as mask, the region P-GaN for being masked blocking is still remained.Removal
Mask carries out alignment process, then forms grid metal on P-GaN, material is thus formed with sub-micron, nanoscale P-
GaN is grid length, and grid metal is the gate metal of the T-type pattern of cap layers, this grid cover can be multilayer, gradually broaden, in this way can be with
Further decrease the resistance and capacitance of grid.Method provided by the invention greatly simplifies work relative to other T-type grid techniques
Skill flow also reduces the alignment process difficulty of nanoscale T-type grid, any T-type grid technique different from the past.
Use Mg as dopant when MOCVD or MEB carries out P-GaN material epitaxies, and H and Mg forms complex compound, makes
Mg, which cannot be formed, is effectively formed doping (being at this time HR-GaN), and then influences P-GaN hole concentrations.Generally epi dopant Mg's
Annealing process is carried out after GaN, H is made to overflow, and Mg activates to form P-GaN.So H is in P-GaN and HR-GaN is mutually converted
Particularly important role being play, with the P-GaN after H corona treatments Mg activation so that Mg is not re-used as Effective Doping, and two
Person is reversible.
The embodiment of the present invention by p-type grid realize it is enhanced, region under device gate need not be performed etching, avoid because
The problems such as uniformity, repeatability and damage that etching technics introduces, while without using electron beam lithography, can effectively solve
Certainly under low production efficiency the problems such as.Postscript, the HR-GaN (high resistant gallium nitride) used in device of the embodiment of the present invention can be used as T
The supporting layer of type grid metal reduces technology difficulty, and the reduction of p-GaN length can reduce gate resistance, improve the frequency of device
Characteristic, and,
The parasitic capacitance that device can also be reduced using T-type grid metal improves the frequency characteristic of device.The embodiment of the present invention
Enhanced HEMT can be applicable to RF application.
It should be appreciated that the technical concepts and features of above-described embodiment only to illustrate the invention, its object is to allow be familiar with this
The personage of item technology cans understand the content of the present invention and implement it accordingly, and it is not intended to limit the scope of the present invention.It is all
According to equivalent change or modification made by spirit of the invention, should be covered by the protection scope of the present invention.
Claims (10)
1. a kind of GaN base T-type grid high-frequency element, it is characterised in that including：
Hetero-junctions comprising the first semiconductor and the second semiconductor being formed on the first semiconductor, the second semiconductor tool
There is the band gap for being wider than the first semiconductor, and two-dimensional electron gas is formed in the hetero-junctions；
The P-type semiconductor and high-resistance semi-conductor being formed on the hetero-junctions；And
Source electrode, drain and gate；
The source electrode, drain electrode and hetero-junctions form Ohmic contact；The P-type semiconductor is located at region under grid and is connect with grid,
And the length of the grid is more than the length of P-type semiconductor, the P-type semiconductor is used to exhaust the Two-dimensional electron in region under grid
Gas, the high-resistance semi-conductor are located between any one in P-type semiconductor and source electrode, drain electrode；
The source electrode can be electrically connected with drain electrode by the two-dimensional electron gas.
2. GaN base T-type grid high-frequency element according to claim 1, it is characterised in that：The grid connects with P-type semiconductor
Connect T-shaped, Y types or mushroom-shaped；Preferably, the length of the grid is 0.1nm-2 μm, and the width of grid is 0.1nm-5 μm.
3. GaN base T-type grid high-frequency element according to claim 1, it is characterised in that：First semiconductor is selected from III
The compound of group-III nitride or iii-v element compounds；Preferably, the second semiconductor is selected from group III-nitride；Preferably, institute
The compound for stating iii-v element compounds includes GaAs；Preferably, the material of the P-type semiconductor includes p-GaN, p-
AlGaN, p-type diamond, any one in p-NiO；Preferably, the high-resistance semi-conductor includes HR-GaN；
And/or the material of first semiconductor includes GaN or GaAs；
And/or the material of second semiconductor includes AlGaN, AlInN, AlGaAs or InGaAs.
4. GaN base T-type grid high-frequency element according to claim 1, it is characterised in that：The P-type semiconductor and high resistant half
Conductor is wholely set；Preferably, the high-resistance semi-conductor by P-type semiconductor through in H plasma treatment, p-type impurity injecting compensating
Any one mode processing formed；Alternatively, the P-type semiconductor is electric through the injection of localized p-type impurity, low energy by high-resistance semi-conductor
Any one mode processing in beamlet radiation is formed.
5. GaN base T-type grid high-frequency element according to claim 1, it is characterised in that：First semiconductor and the second half
Insert layer is also distributed between conductor；Preferably, the material of the insert layer includes InGaN or AlN；
And/or the hetero-junctions is formed on the buffer layer, the buffer layer is formed on substrate；Preferably, the buffer layer
Material includes high resistant AlGaN or high resistant GaN；Preferably, the material of the substrate includes any one in Si, SiC, sapphire
Kind；
And/or dielectric layer is also distributed between the grid and P-type semiconductor；Preferably, the material of the dielectric layer includes
Al2O3、SiO2、AlON、Si3N4、HfO2, GaMgO, SiON, HfON, TiN, any one in hexagonal boron nitride；Preferably, institute
The thickness for stating dielectric layer is 0.1nm-1 μm.
6. a kind of preparation method of GaN base T-type grid high-frequency element, it is characterised in that including：
The hetero-junctions for including the first semiconductor and the second semiconductor is provided, second semiconductor is formed on the first semiconductor,
And there is the band gap for being wider than first semiconductor, it is formed with two-dimensional electron gas in the hetero-junctions；
P-type semiconductor is formed on the hetero-junctions and high-resistance semi-conductor, the P-type semiconductor are located at region under grid, the height
Resistance semiconductor is located between any one in P-type semiconductor and source electrode, drain electrode；
Source electrode, drain and gate are made, the grid is made to be connect with P-type semiconductor, the length of the grid is more than P-type semiconductor
Length, the P-type semiconductor is used to exhaust the two-dimensional electron gas in region under grid；The source electrode can pass through described two with drain electrode
Dimensional electron gas connects.
7. the preparation method of GaN base T-type grid high-frequency element according to claim 6, it is characterised in that：Described the first half lead
Body is selected from group III-nitride or the compound of iii-v element compounds；Preferably, the second semiconductor is selected from group III-nitride；
Preferably, the compound of the iii-v element compounds includes GaAs；Preferably, the material of the P-type semiconductor includes p-
GaN, p-AlGaN, p-type diamond, any one in p-NiO；Preferably, the high-resistance semi-conductor includes HR-GaN；
And/or the material of first semiconductor includes GaN or GaAs；
And/or the material of second semiconductor includes AlGaN, AlInN, AlGaAs or InGaAs.
8. the preparation method of GaN base T-type grid high-frequency element according to claim 6, it is characterised in that including：
P-type semiconductor is formed on the hetero-junctions, at least with any one in H plasma treatment, p-type impurity injecting compensating
Kind mode handles the part of P-type semiconductor, to form high-resistance semi-conductor；Alternatively, being formed on the hetero-junctions high
Semiconductor is hindered, at least to the office of high-resistance semi-conductor in a manner of any one in the injection of localized p-type impurity, low-energy electron beam radiation
Portion is handled, to form P-type semiconductor；
And removed in a manner of dry etching or wet etching source electrode, drain region high-resistance semi-conductor, carry out source electrode later
With the making of grid.
9. the preparation method of GaN base T-type grid high-frequency element according to claim 6, it is characterised in that including：In the P
Dielectric layer is formed on type semiconductor, makes grid on the dielectric layer later；Preferably, the material of the dielectric layer includes
Al2O3、SiO2、AlON、Si3N4、HfO2, GaMgO, SiON, HfON, TiN, any one in hexagonal boron nitride；And/or institute
It states grid and connect T-shaped, Y types or mushroom-shaped with P-type semiconductor.
10. GaN base T-type grid high-frequency element as described in any one of claim 1-5 or by any one of claim 6-9 institutes
The GaN base T-type grid high-frequency element of preparation method acquisition of GaN base T-type grid high-frequency element is stated in the application of RF application.
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Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
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Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103022119A (en) * | 2011-09-27 | 2013-04-03 | 富士通株式会社 | Semiconductor device |
| CN105870013A (en) * | 2016-06-08 | 2016-08-17 | 苏州能屋电子科技有限公司 | Method for realizing enhanced HEMT (High Electron Mobility Transistor) by virtue of p-type passivation and enhanced HEMT |
| CN106298903A (en) * | 2015-05-18 | 2017-01-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | Secondary epitaxy p-type III group-III nitride realizes method and enhancement mode HEMT of enhancement mode HEMT |
-
2018
- 2018-04-13 CN CN201810335318.3A patent/CN108565283A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN103022119A (en) * | 2011-09-27 | 2013-04-03 | 富士通株式会社 | Semiconductor device |
| CN106298903A (en) * | 2015-05-18 | 2017-01-04 | 中国科学院苏州纳米技术与纳米仿生研究所 | Secondary epitaxy p-type III group-III nitride realizes method and enhancement mode HEMT of enhancement mode HEMT |
| CN105870013A (en) * | 2016-06-08 | 2016-08-17 | 苏州能屋电子科技有限公司 | Method for realizing enhanced HEMT (High Electron Mobility Transistor) by virtue of p-type passivation and enhanced HEMT |
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110518067A (en) * | 2018-05-21 | 2019-11-29 | 中国科学院苏州纳米技术与纳米仿生研究所 | Heterojunction field effect transistor based on channel array and preparation method thereof and application |
| CN110518067B (en) * | 2018-05-21 | 2023-03-07 | 中国科学院苏州纳米技术与纳米仿生研究所 | Heterojunction field effect transistor based on channel array and manufacturing method and application thereof |
| CN110970499A (en) * | 2018-09-30 | 2020-04-07 | 中国科学院苏州纳米技术与纳米仿生研究所 | GaN-based transverse super junction device and manufacturing method thereof |
| CN110970499B (en) * | 2018-09-30 | 2023-09-15 | 中国科学院苏州纳米技术与纳米仿生研究所 | GaN-based transverse super-junction device and manufacturing method thereof |
| CN113826212B (en) * | 2019-05-16 | 2023-02-17 | 苏州晶湛半导体有限公司 | Preparation method of semiconductor structure |
| CN113826212A (en) * | 2019-05-16 | 2021-12-21 | 苏州晶湛半导体有限公司 | Preparation method of semiconductor structure |
| CN111640795A (en) * | 2020-04-28 | 2020-09-08 | 西安电子科技大学 | Gallium nitride high-frequency transistor with arc-shaped gate electrode and manufacturing method |
| CN112335039A (en) * | 2020-07-08 | 2021-02-05 | 英诺赛科（珠海）科技有限公司 | Electronic device and method for manufacturing the same |
| CN114023819A (en) * | 2020-07-08 | 2022-02-08 | 英诺赛科（珠海）科技有限公司 | Electronic device |
| WO2022006770A1 (en) * | 2020-07-08 | 2022-01-13 | Innoscience (Zhuhai) Technology Co., Ltd. | Electronic device and manufacturing method thereof |
| CN114023819B (en) * | 2020-07-08 | 2023-07-04 | 英诺赛科（珠海）科技有限公司 | Electronic device |
| CN111952176A (en) * | 2020-08-17 | 2020-11-17 | 深圳方正微电子有限公司 | Semiconductor structure, enhanced high electron mobility transistor and preparation method thereof |
| US20220130985A1 (en) * | 2020-10-27 | 2022-04-28 | Cree, Inc. | Field effect transistor with enhanced reliability |
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