CN109950323B - Polarized superjunction III-nitride diode device and manufacturing method thereof - Google Patents
Polarized superjunction III-nitride diode device and manufacturing method thereof Download PDFInfo
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Abstract
The invention discloses a polarized super junction III-family nitride diode device and a manufacturing method thereof. The device comprises: a first heterojunction including first and second semiconductors, the first heterostructure having a two-dimensional electron gas formed therein; a second heterojunction including the second semiconductor and a third semiconductor, the second heterojunction having a two-dimensional hole gas formed therein; a fourth semiconductor formed on the second semiconductor, the fourth semiconductor being closely connected to the third semiconductor in a horizontal direction; the fourth semiconductor is doped in a p type mode, and two-dimensional electron gas in the first heterojunction can be exhausted; and the anode and the cathode are electrically connected with the two-dimensional electron gas in the first heterojunction, and the anode is simultaneously electrically connected with the fourth semiconductor.
Description
Technical Field
The invention relates to a diode device, in particular to a polarized super junction III-nitride diode device and a manufacturing method thereof, and belongs to the technical field of power semiconductors.
Background
The III group nitride (such as GaN) has the advantages of large forbidden bandwidth, high electron mobility, high breakdown field strength and the like, and can meet the requirements of a next generation power electronic system on the operation of a power device with higher power, higher frequency, smaller volume and higher temperature, so that a diode device made of the III group nitride becomes a hotspot of the research of a new generation power device. Conventional group iii nitride diodes using schottky metal contacts also suffer from a number of problems, such as large turn-on voltage, low breakdown voltage, and large reverse leakage.
Jae-Gil Lee et al adopt AlGaN/GaN diode devices prepared by etching AlGaN barrier layers, the turn-on voltage of which is 0.37V and is much lower than that of diodes with conventional Schottky structures, but the reverse leakage current is large (IEEE Electron Device Letters, vol.34, No.2, Feb 2013).
The reverse current is effectively reduced in a schottky diode device manufactured by Silvia Lenci et al using a junction termination technique, but the forward conduction current density is still very low (IEEE electronic devices Letters, vol.34, No.8, Aug 2013).
The inventor proposes that ohmic contact is used as an anode and a cathode, two-dimensional electron gas of AlGaN/GaN heterojunction is used as a conductive channel, an AlGaN barrier layer close to the anode is etched to a certain depth to prepare metal-insulating layer-semiconductor contact, and the metal is connected with the anode, so that the functions of forward voltage starting and reverse voltage stopping are realized (CN 103872145A). The device can realize lower threshold voltage and on-current density. However, the difficulty of the technology for etching the AlGaN barrier layer is high, the etching damage is high, and the preparation of the device has certain difficulty.
In summary, the existing group iii nitride diodes have many defects, such as large turn-on voltage, low breakdown voltage, low saturation current, and the like, which is a problem that the art is eagerly to solve.
Disclosure of Invention
The invention mainly aims to provide a polarized superjunction III-nitride diode device and a manufacturing method thereof, so as to overcome the defects of the prior art.
In order to achieve the purpose, the technical scheme adopted by the invention comprises the following steps:
the embodiment of the invention provides a polarized super junction III-nitride diode device, which comprises:
a first heterojunction including a first semiconductor and a second semiconductor formed on the first semiconductor, the second semiconductor having a wider band gap than the first semiconductor, and a two-dimensional electron gas formed in the first heterostructure;
a second heterojunction including the second semiconductor and a third semiconductor formed on the second semiconductor, the third semiconductor having a band gap narrower than the second semiconductor, the second heterojunction having a two-dimensional hole gas formed therein;
a fourth semiconductor formed on the second semiconductor and closely connected to the third semiconductor, and capable of depleting the two-dimensional electron gas in the first heterojunction;
an anode and a cathode, wherein the anode includes a first anode and a second anode electrically connected to each other, the first anode and the cathode being electrically connected to the two-dimensional electron gas in the first heterojunction, the second anode being electrically connected to a fourth semiconductor.
Preferably, the fourth semiconductor and the third semiconductor are closely bonded in a direction perpendicular to an axis of the group iii nitride diode device.
Further, the fourth semiconductor is a p-type semiconductor.
Preferably, an ohmic contact or a schottky contact is formed between the second anode and the fourth semiconductor.
Preferably, the first anode and the cathode form ohmic contacts with the second semiconductor.
Further, with the group iii nitride diode device of the present invention, the diode device is in an on state when a voltage applied across the second anode is greater than a turn-on voltage at least sufficient to form a two-dimensional electron gas in a local region of the first heterojunction directly under the contact of the second anode with the fourth semiconductor and electrically connect the first anode with the cathode; and when the voltage applied across the second anode is less than the turn-on voltage, the diode device is in an off state.
Preferably, the cathode is grounded.
The embodiment of the invention also provides a manufacturing method of the III-nitride diode device for manufacturing the polarized super junction, which comprises the following steps: a first semiconductor, a second semiconductor and a fourth semiconductor are sequentially provided on a substrate,
manufacturing an anode and a cathode, wherein the anode comprises a first anode and a second anode which are electrically connected with each other, the first anode and the cathode are electrically connected with the two-dimensional electron gas in the first heterojunction, and the second anode and the fourth semiconductor form ohmic contact or Schottky contact; and
and carrying out doping treatment on the fourth semiconductor distributed between the anode and the cathode to form a third semiconductor.
In the foregoing manufacturing method, the fourth semiconductor may be doped by at least any one of ion implantation, high-temperature diffusion, and plasma treatment, thereby forming the third semiconductor.
Preferably, the doping element used therein includes F, N, Ar or H, but is not limited thereto.
The embodiment of the invention also provides a manufacturing method of the III-nitride diode device for manufacturing the polarized super junction, which comprises the following steps: sequentially arranging a first semiconductor, a second semiconductor and a third semiconductor on a substrate;
manufacturing a first anode and a cathode, and electrically connecting the first anode and the cathode with the two-dimensional electrons in the first heterojunction in a gas-electric mode;
doping the third semiconductor close to one side of the first anode to form a fourth semiconductor; and
and manufacturing a second anode, and enabling the second anode to form ohmic contact or Schottky contact with the fourth semiconductor.
In the foregoing manufacturing method, the third semiconductor may be doped at least by ion implantation and high-temperature annealing activation or low-energy electron radiation activation, so as to form the fourth semiconductor.
Preferably, the doping element used therein includes, but is not limited to, magnesium or zinc.
In the foregoing manufacturing method of the invention, the first semiconductor, the second semiconductor, and the third semiconductor or the fourth semiconductor may be grown at least in any one of metal organic chemical vapor deposition, molecular beam epitaxy, atomic layer deposition, physical vapor deposition, and magnetron sputtering.
Preferably, the substrate includes a gallium nitride, silicon carbide, silicon or sapphire substrate, but is not limited thereto.
Compared with the prior art, the polarized super-junction III-group nitride diode device provided by the invention has a simple structure, and is provided with the p-type depletion region and the high-resistance cap, so that the starting voltage of the device can be more conveniently adjusted, and the voltage resistance and the frequency characteristic of the device are improved; meanwhile, the third and fourth semiconductors can realize the mutual conversion of p type and high resistance through a process mode, the process is simple, excessive etching damage can be avoided, the process window is large, the damage to devices is small, the process repeatability is high, the cost is low, and the large-scale production is easy to carry out.
Drawings
Fig. 1 is a schematic partial structure view of a superjunction polarized group iii nitride diode in an exemplary embodiment of the invention;
fig. 2 is a process flow diagram of a process for fabricating a polarized superjunction iii-nitride diode in an embodiment of the present invention;
fig. 3 is a process flow diagram of another process for fabricating a polarized superjunction ill-nitride diode in an embodiment of the present invention;
description of reference numerals: the semiconductor device comprises a substrate 1, a first semiconductor 2, a second semiconductor 3, a fourth semiconductor 4, a first anode 5, a cathode 6, a second anode 7, a two-dimensional electron gas 8, a third semiconductor 9, a two-dimensional hole gas 10, a source electrode 11, a drain electrode 12 and a grid electrode 13.
Detailed Description
In view of the deficiencies in the prior art, the inventors of the present invention have made extensive studies and extensive practices to provide technical solutions of the present invention. The technical solution, its implementation and principles, etc. will be further explained as follows.
The technical solution of the present invention will be explained in more detail below. It is to be understood, however, that within the scope of the present invention, the above-described features of the present invention and those specifically described below (e.g., in the examples) may be combined with one another to form new or preferred embodiments. Not to be reiterated herein, but to the extent of space.
An aspect of the embodiments of the present invention provides a polarized superjunction iii-nitride diode device, including:
a first heterojunction including a first semiconductor and a second semiconductor formed on the first semiconductor, the second semiconductor having a wider band gap than the first semiconductor, and a two-dimensional electron gas formed in the first heterostructure;
a second heterojunction including the second semiconductor and a third semiconductor formed on the second semiconductor, the third semiconductor having a band gap narrower than the second semiconductor, the second heterojunction having a two-dimensional hole gas formed therein;
a fourth semiconductor formed on the second semiconductor and closely connected to the third semiconductor, and capable of depleting the two-dimensional electron gas in the first heterojunction;
an anode and a cathode, wherein the anode includes a first anode and a second anode electrically connected to each other, the first anode and the cathode being electrically connected to the two-dimensional electron gas in the first heterojunction, the second anode being electrically connected to a fourth semiconductor.
Further, the third semiconductor and the fourth semiconductor may be of a unitary structure. Wherein the third semiconductor may be formed by a local area transition in the fourth semiconductor or the fourth semiconductor may be formed by a local area transition in the third semiconductor.
For example, a local region of the fourth semiconductor may be converted into a high-resistance third semiconductor through a certain process.
Further, the material of the first semiconductor, the second semiconductor and the third semiconductor may be selected from group iii nitrides.
Preferably, the material of the first semiconductor includes GaN, but is not limited thereto.
Preferably, the material of the second semiconductor includes AlxGa(1-x)N, AlInGaN or InxAl(1-x)N, 0 < x ≦ 1, but is not so limited.
Preferably, the material of the third semiconductor includes high-resistance or intrinsic GaN, high-resistance or intrinsic InGaN, high-resistance or intrinsic InN, or GaO, and more preferably includes high-resistance GaN, high-resistance InGaN, or high-resistance InN, for example, the material of the third semiconductor includes C-doped or Fe-doped high-resistance GaN, InGaN, or InN, but is not limited thereto.
Further, an insertion layer may be disposed between the first semiconductor and the second semiconductor.
Preferably, the material of the insertion layer includes AlN, but is not limited thereto.
Further, the fourth semiconductor is a p-type semiconductor.
Preferably, the material of the fourth semiconductor includes a p-type wide bandgap semiconductor.
More preferably, the p-type wide bandgap semiconductor includes p-type group iii nitride such as p-GaN or p-InGaN, but is not limited thereto.
More preferably, the wide bandgap semiconductor includes p-NiO, but is not limited thereto.
Further, the fourth semiconductor has a p-type doping concentration and thickness sufficient to deplete the two-dimensional electron gas in the first heterojunction. In some embodiments, the third semiconductor may be formed of the fourth semiconductor by any one of ion implantation, high temperature diffusion, and plasma treatment. Preferably, the ion-implanted, diffused or plasma-treated element includes hydrogen, fluorine, etc., but is not limited thereto.
In some embodiments, the fourth semiconductor may be formed by ion implantation and high temperature annealing activation or low energy electron radiation activation of the third semiconductor. Preferably, the injection element may be magnesium, zinc, etc., but is not limited thereto.
Preferably, the third semiconductor between the anode and the cathode is formed by at least any one of ion implantation, plasma treatment and thermal diffusion process.
In some embodiments, the first anode is integrally disposed with the second anode.
In some embodiments, the fourth semiconductor is masked by the second anode.
Furthermore, the fourth semiconductor can exhaust the two-dimensional electron gas in the region below the fourth semiconductor in the first heterojunction, so that the two-dimensional electron gas conducting channel in the first heterojunction is disconnected, and a current path cannot be formed.
In some embodiments, an ohmic contact or a schottky contact is formed between the second anode and the fourth semiconductor.
In some embodiments, the first anode and cathode form ohmic contacts with the second semiconductor.
Further, with the polarized superjunction group iii nitride diode device of the present invention, the diode device is in an on state when a voltage applied across the second anode is greater than an on voltage at least sufficient to form a two-dimensional electron gas in a local area of the first heterojunction directly under the contact of the second anode with the fourth semiconductor and electrically connect the first anode with the cathode; and when the voltage applied across the second anode is less than the turn-on voltage, the diode device is in an off state. Preferably, the cathode is grounded.
Preferably, the turn-on voltage is a positive voltage.
In some more specific embodiments, the diode device is in an off state when no voltage or a voltage below zero is applied to the anode, and in an on state when the voltage applied to the anode is greater than zero and above the turn-on voltage.
In some more specific embodiments, when zero or no bias is applied to the anode, no two-dimensional electron gas accumulates in a local area of the first heterojunction located directly below the anode, and when a voltage greater than a turn-on voltage is applied to the anode, a two-dimensional electron gas can form in a local area of the first heterojunction located directly below the anode.
In some more specific embodiments, when the diode device is turned on, the two-dimensional electron gas and the two-dimensional hole gas are simultaneously present in the first heterojunction and the second heterojunction; when the diode device is in an off-state, the two-dimensional electron gas is discharged to the cathode and leaves a positive charge at the interface within the first heterojunction, the two-dimensional hole gas is discharged to the anode through the fourth semiconductor and leaves a negative charge at the interface within the second heterojunction, and the positive and negative charges cause a uniform electric field distribution to be formed in the diode between the anode and the cathode.
The polarized super-junction III-family nitride diode device provided by the invention has a simple structure, and is provided with a p-type depletion region and a high-resistance cap, the starting voltage of the device can be adjusted more conveniently, and the voltage resistance and the frequency characteristic of the device are also improved obviously.
Another aspect of embodiments of the invention provides a method of fabricating a iii-nitride diode device for fabricating the polarized superjunction, comprising:
a first semiconductor, a second semiconductor and a fourth semiconductor are sequentially provided on a substrate,
manufacturing an anode and a cathode, wherein the anode comprises a first anode and a second anode which are electrically connected with each other, the first anode and the cathode are electrically connected with the two-dimensional electron gas in the first heterojunction, and the second anode and the fourth semiconductor form ohmic contact or Schottky contact; and
and carrying out doping treatment on the fourth semiconductor distributed between the anode and the cathode so as to form a third semiconductor.
In the foregoing manufacturing method, the third semiconductor may be formed by doping a local region of the fourth semiconductor by at least any one of ion implantation, high-temperature diffusion, and plasma treatment.
Preferably, the doping element used therein includes F, N, Ar or H, but is not limited thereto.
Alternatively, in the above-described manufacturing method, the fourth semiconductor may be subjected to oxidation treatment by high-temperature thermal oxidation to form the third semiconductor (e.g., GaO).
For example, in some more specific embodiments, the p-type fourth semiconductor between the anode and the cathode can be converted into a high resistance third semiconductor through ion implantation, plasma bombardment, and thermal diffusion. The doping elements used therein may include F, N, Ar, H, etc.
Another aspect of embodiments of the invention provides a method of fabricating a iii-nitride diode device for fabricating the polarized superjunction, comprising:
sequentially arranging a first semiconductor, a second semiconductor and a third semiconductor on a substrate;
manufacturing a first anode and a cathode, and electrically connecting the first anode and the cathode with the two-dimensional electrons in the first heterojunction in a gas-electric mode;
doping the third semiconductor close to one side of the first anode to form a fourth semiconductor;
and manufacturing a second anode, and enabling the second anode to form ohmic contact or Schottky contact with the fourth semiconductor.
In the foregoing manufacturing method, the third semiconductor may be doped at least by ion implantation and high-temperature annealing activation or low-energy electron radiation activation, so as to form the fourth semiconductor.
Preferably, the doping element used therein includes, but is not limited to, magnesium or zinc.
For example, in some more specific embodiments, the high-resistance third semiconductor near the anode portion may be subjected to low-energy electron irradiation activation and high-temperature annealing treatment to activate Mg doping, so that the third semiconductor is converted into a p-type semiconductor, i.e., a fourth semiconductor.
In the foregoing manufacturing method of the invention, the first semiconductor, the second semiconductor, and the third semiconductor or the fourth semiconductor may be grown at least in any one of metal organic chemical vapor deposition, molecular beam epitaxy, atomic layer deposition, physical vapor deposition, and magnetron sputtering.
Preferably, the substrate includes a gallium nitride, silicon carbide, silicon or sapphire substrate, but is not limited thereto.
In the foregoing manufacturing method of the invention, the anode (first anode) region and the cathode region of the third semiconductor or the fourth semiconductor may be removed by a dry etching process or a wet etching process.
In some more specific embodiments, a method of fabricating the polarized superjunction group iii nitride diode device may comprise:
(1) and (3) growing the material: growing a structure of HR GaN/AlGaN/GaN/substrate, wherein a two-dimensional electron gas (2DEG) and a two-dimensional hole gas (2DHG) exist at the interface of two heterojunction at the same time; high Resistance (HR) GaN is obtained mainly by doping acceptor impurities Mg, Zn, etc. when growing GaN (here, GaN doped with acceptor impurities is unactivated GaN).
(2) Preparing an anode and a cathode: patterning is carried out, HR GaN in an anode region and HR GaN in a cathode region are etched by etching equipment (ICP, RIE, ECR and the like), ohmic metal is deposited on AlGaN by coating equipment (such as e-book evaporation, magnetron sputtering, thermal evaporation and the like), and alloying is carried out by rapid annealing (RTA) to realize the preparation of the ohmic contact electrode.
(3) Local activation: preparing a mask (the mask material can be photoresist or SiO)2Silicon nitride, etc.), the anode region is patterned (the photoresist is developed, other masks are etched by a wet or dry process), and then the HRGaN in the open window region (also understood as the region without mask protection) is locally activated in a low-energy electron beam irradiation (LEEBI) manner, so that the HR GaN is converted into p-GaN, and the low-energy electron beam irradiation equipment includes SEM (scanning electron microscope), electron beam lithography machine, etc. which can form low-energy electron beams.
(4) Preparing an anode: firstly, patterning is carried out, a layer of metal (Ni/Au, Pd/Pt/Au and the like) which can form ohmic contact with p-GaN is deposited by using coating equipment, and then the ohmic contact is obtained by stripping, annealing and other processes. Or a layer of metal (Ti/Au, TiN, etc.) capable of forming Schottky contact with the p-GaN is deposited by using a coating device, and the Schottky contact is obtained by stripping, annealing, etc.
In some more specific embodiments, the method of fabricating the polarized superjunction iii-nitride diode device may also include:
(1) and (3) growing the material: a structure of p-GaN/AlGaN/GaN/substrate is grown in which neither 2DEG nor 2DHG is present at the interface of the two heterojunctions when the hole concentration in p-GaN is too high. The p-GaN is obtained mainly by doping acceptor impurities Mg, Zn, etc. when growing GaN, and then by performing annealing activation in growth equipment (such as MOCVD, MBE, PLD, etc.).
(2) Preparing an anode and a cathode: patterning is carried out, HR GaN in an anode region and HR GaN in a cathode region are etched by using etching equipment (ICP inductively coupled plasma, RIE reactive ion etching, ECR electron cyclotron resonance and the like), ohmic metal is deposited on AlGaN through coating equipment (e.g. electronic book evaporation, magnetron sputtering, thermal evaporation and the like), and finally alloying is carried out through rapid annealing (RTA) to realize the preparation of the ohmic electrode.
(3) Preparing an anode: patterning, depositing a layer of metal (such as Ni/Au, Pd/Pt/Au, and the like) capable of forming ohmic contact with p-GaN by using a coating device, and obtaining the ohmic contact by stripping, annealing, and the like. Or a layer of metal (Ti/Au, TiN, etc.) capable of forming Schottky contact with the p-GaN is deposited by using a coating device, and the Schottky contact is obtained by stripping, annealing, etc.
(4) Local passivation: processing the p-GaN in the non-electrode area by using the electrode or other insulating layers as masks to convert the p-GaN into high-resistance GaN; the treatment mode comprises ion implantation, plasma surface passivation or high-temperature passivation and the like; wherein the ion-implanted element includes F, N, Ar, H, etc., preferably H2Or NH3And carrying out surface passivation on the plasma in the atmosphere or carrying out high-temperature passivation at 300-800 ℃.
The material of the substrate may be any one or a combination of more than one of silicon, sapphire, silicon carbide and gallium nitride, but is not limited thereto. The polarized super junction III-family nitride diode device provided by the invention has the advantages of simple preparation process, capability of avoiding excessive etching damage, large process window, small damage to the device, high repeatability, low cost and easiness in large-scale production.
The technical solution of the present invention is further explained with reference to the drawings and the embodiments.
Fig. 1 is a schematic structural diagram of a polarized superjunction enhanced diode device implemented by using a high-resistance cap layer and a p-type gate technology according to an exemplary embodiment of the present invention (an AlGaN/GaN device is taken as an example). This device can be formed by growing a p-GaN layer as the fourth semiconductor layer 4 on an AlGaN/GaN heterojunction (including a GaN layer as the first semiconductor 2 and an AlGaN layer as the second semiconductor 3), and then changing the p-GaN layer 4 outside the anode region to a high-resistance GaN layer as the third semiconductor layer 9 by passivation or ion implantation, the fourth semiconductor being closely connected to the third semiconductor in the horizontal direction. Therefore, the high-resistance GaN layer 9 between the anode 7 and the cathode 6 generates a negative polarization action with the AlGaN layer 3 therebelow, and a high-concentration two-dimensional hole gas is formed at the heterojunction interface. When the device is in an off state, the electric field between the anode 7 and the cathode 6 is uniformly distributed, the area below the anode 7 is still the p-GaN layer 4, and the energy band below the anode 7 can be effectively raised by utilizing a p-type material, so that the whole device obtains enhanced performance.
Similarly, during material epitaxy, a high-resistance GaN layer 9 doped with Mg can be epitaxially grown on the AlGaN/GaN heterojunction, and then the p-GaN layer 4 can be obtained by locally activating the region below the anode 7 in a low-energy electron beam radiation manner. In the device structure, an enhanced p-type gate structure and a polarized super junction structure are integrated, enhancement can be realized through the p-GaN layer 4, and the p-GaN layer 4 can be used for discharging two-dimensional hole gas in an off state to obtain uniform electric field distribution. Meanwhile, the process of the device avoids a complex and difficult-to-control etching process, and greatly reduces the process difficulty.
Note that HR GaN and p-GaN are not necessarily formed by the above-described interconversion, but may be formed by double epitaxy of p-GaN or by growing other p-type materials, for example, p-NiO grown by ALD (atomic layer deposition) may be used instead of p-GaN, and in this case, the thicknesses of HR GaN and p-GaN may be different.
Referring to fig. 1 and fig. 2, a method for manufacturing a polarized superjunction iii-nitride diode implemented by using a high-resistance cap layer and a p-type gate technology in an exemplary embodiment according to this embodiment may include the following steps:
(1) epitaxially growing AlGaN/GaN epitaxial layer and p-GaN on the substrate, wherein the thickness of GaN is 1-8 μm, the thickness of AlGaN is 14-30 nm, the molar content of Al element is 15-30%, the thickness of p-GaN is 50-110nm, and the Mg doping concentration is 1019Magnitude;
(2) the photoresist or the dielectric film is used as a mask to carry out mesa isolation, and ion implantation or plasma etching can be adopted;
(3) etching the anode region and the cathode region by using photoresist as a mask, etching off a p-type doped layer, then putting the anode region and the cathode region into an electron beam deposition table to deposit ohmic contact metal Ti/Al/Ni/Au (20nm/130/nm/50nm/150nm), stripping and cleaning, and then annealing the sample at 890 ℃ for 30s to form ohmic contacts which are respectively an anode and a cathode;
(4) and (3) taking the photoresist as a mask, stripping by using electron beam deposition Ni/Au (50/150nm) in the same way, and annealing at 400 ℃ for 10min in a nitrogen atmosphere to form ohmic contact or Schottky contact with the p-type fourth semiconductor to finish the manufacture of the anode.
(5) And (2) performing ion implantation by using an ion implanter by using the anode and the cathode as masks of the ion implantation (preferably, the implantation element can be F, H, N and the like, wherein the ion implantation energy is low so as not to enter a two-dimensional electron gas channel region), so that the ion implantation region becomes a high-resistance region, and after the ion implantation is finished, performing annealing at 400 ℃ for 10min to repair the damage, thereby finishing the manufacture of the device.
Referring again to fig. 1 and 3, another method for fabricating a polarized superjunction iii-nitride diode implemented by using high-resistance cap layer and p-type gate technology in an exemplary embodiment according to this embodiment may include the following steps:
(1) epitaxially growing AlGaN/GaN epitaxial layer and Mg-doped non-activated high-resistance GaN on a substrate, wherein the thickness of GaN is 1-8 μm, the thickness of AlGaN is 14-30 nm, the molar content of Al element is 15-30%, the thickness of high-resistance GaN is 50-110nm, and the Mg doping concentration is 1019Magnitude;
(2) the photoresist or the dielectric film is used as a mask to carry out mesa isolation, and ion implantation or plasma etching can be adopted;
(3) etching the anode region and the cathode region by using photoresist as a mask, etching off a p-type doped layer, then putting the anode region and the cathode region into an electron beam deposition table to deposit ohmic contact metal Ti/Al/Ni/Au (20nm/130/nm/50nm/150nm), stripping and cleaning, and then annealing the sample at 890 ℃ for 30s to form ohmic contacts which are respectively an anode and a cathode;
(4) and photoetching to form an anode region 7, locally activating the high-resistance GaN in the anode region in a low-energy electron beam radiation mode to change the high-resistance GaN in the anode region into p-GaN, stripping by using electron beam deposition Ni/Au (50/150nm), annealing at 400 ℃ for 10min in a nitrogen atmosphere to form ohmic contact or Schottky contact with the p-GaN, and finishing the manufacture of the device.
The working principle of the polarized super junction diode is as follows: the turn-on voltage Vth is positive, and when the anode voltage Va < Vth, the anode is depleted of the two-dimensional electron gas under p-GaN, so that the device is in a turn-off state. Meanwhile, the two-dimensional electron gas and the two-dimensional hole gas at the double heterojunction interface are respectively discharged to the cathode 6 and the anode 7 under the action of reverse bias voltage, and the positive and negative charges left at the two heterojunction interfaces enable the electric fields of the cathode 6 and the anode 7 to be uniformly distributed. When the bias voltage applied to the anode 7 reaches Vg > Vth, the anode induces with the two-dimensional electron gas under the p-GaN, and simultaneously the two-dimensional electron gas and the two-dimensional hole gas at the double heterojunction interface reappear, so that the anode 5 and the cathode 6 are conducted, and the device is in an open state.
Due to the existence of the high-resistance GaN cap layer and the 2DHG, the capture effect of the surface state on the 2DEG in the high-frequency switching process can be effectively shielded, the current collapse is reduced, and the dynamic characteristic of the device is improved.
The diode device has simple structure, utilizes the p-GaN anode, can improve the current density through the conductance modulation effect, reduces the on-resistance, realizes the mutual conversion of p type and high resistance through the process modes of injection, plasma bombardment, thermal diffusion and the like by the third semiconductor and the fourth semiconductor, has simple process, can avoid excessive etching damage, has low cost and is easy to carry out large-scale production. In the present invention, the term "anode region" and "cathode region" refers to regions directly below the anode and the cathode; the "non-electrode region" refers to a region other than the anode and the cathode.
It should be understood that the above-mentioned embodiments are merely illustrative of the technical concepts and features of the present invention, which are intended to enable those skilled in the art to understand the contents of the present invention and implement the present invention, and therefore, the protection scope of the present invention is not limited thereby. All equivalent changes and modifications made according to the spirit of the present invention should be covered within the protection scope of the present invention.
Claims (15)
1. A polarized superjunction iii-nitride diode device, comprising:
a first heterojunction including a first semiconductor and a second semiconductor formed on the first semiconductor, the second semiconductor having a wider band gap than the first semiconductor, and a two-dimensional electron gas formed in the first heterostructure;
a second heterojunction including the second semiconductor and a third semiconductor formed on the second semiconductor, the third semiconductor having a band gap narrower than the second semiconductor, the second heterojunction having a two-dimensional hole gas formed therein;
a fourth semiconductor formed on the second semiconductor for depleting the two-dimensional electron gas in the first heterojunction below the fourth semiconductor, and the fourth semiconductor and the third semiconductor are closely bonded in a direction perpendicular to the axis of the group iii nitride diode device;
an anode and a cathode, wherein the anode comprises a first anode and a second anode electrically connected to each other, the first anode and the cathode being electrically connected to the two-dimensional electron gas in the first heterojunction, the second anode being electrically connected to a fourth semiconductor;
the first semiconductor is made of GaN;
the material of the second semiconductor is selected from AlxGa(1-x)N, AlInGaN or InxAl(1-x)N，0＜x≤1；
The third semiconductor is made of high-resistance or intrinsic GaN, high-resistance or intrinsic InGaN, high-resistance or intrinsic InN or GaO;
the fourth semiconductor is made of p-type GaN, p-type InGaN, p-type InN, p-NiO or p-GaO.
2. The polarized superjunction group iii nitride diode device of claim 1, wherein: the first anode and the second anode are integrally arranged.
3. The polarized superjunction group iii nitride diode device of claim 1 or 2, wherein: the fourth semiconductor is masked by a second anode.
4. The polarized superjunction group iii nitride diode device of claim 1, wherein: and an ohmic contact or a Schottky contact is formed between the second anode and the fourth semiconductor.
5. The polarized superjunction group iii nitride diode device of claim 1, wherein: the first anode and the cathode both form ohmic contact with the second semiconductor.
6. The polarized superjunction group iii nitride diode device of claim 1, wherein: the diode device is in an on state when a voltage applied across the second anode is greater than an on voltage at least sufficient to form a two-dimensional electron gas in a localized area of the first heterojunction directly beneath the contact of the second anode with the fourth semiconductor and electrically connect the first anode with the cathode; and when the voltage applied across the second anode is less than the turn-on voltage, the diode device is in an off state.
7. The polarized superjunction group iii nitride diode device of claim 6, wherein: the cathode is grounded.
8. The method of fabricating a polarized superjunction group iii nitride diode device of any of claims 1-7, comprising:
a first semiconductor, a second semiconductor and a fourth semiconductor are sequentially provided on a substrate,
manufacturing an anode and a cathode, wherein the anode comprises a first anode and a second anode which are electrically connected with each other, the first anode and the cathode are electrically connected with the two-dimensional electron gas in the first heterojunction, and the second anode and the fourth semiconductor form ohmic contact or Schottky contact; and
and carrying out doping treatment on the fourth semiconductor distributed between the anode and the cathode to form a third semiconductor.
9. The method of manufacturing according to claim 8, comprising: the first semiconductor, the second semiconductor and the fourth semiconductor are grown in any one of metal organic chemical vapor deposition, molecular beam epitaxy, atomic layer deposition, physical vapor deposition and magnetron sputtering.
10. The method of manufacturing according to claim 9, comprising: the substrate is selected from a gallium nitride, silicon carbide, silicon or sapphire substrate.
11. The method of manufacturing according to claim 8, comprising: performing doping treatment on the fourth semiconductor by any one of ion implantation, high-temperature diffusion and plasma treatment to form a third semiconductor, wherein the adopted doping element is selected from F, N, Ar or H; alternatively, the fourth semiconductor is subjected to oxidation treatment by high-temperature thermal oxidation, thereby forming a third semiconductor.
12. The method of fabricating a polarized superjunction group iii nitride diode device of any of claims 1-7, comprising:
sequentially arranging a first semiconductor, a second semiconductor and a third semiconductor on a substrate;
manufacturing a first anode and a cathode, and electrically connecting the first anode and the cathode with the two-dimensional electrons in the first heterojunction in a gas-electric mode;
doping the third semiconductor close to one side of the first anode to form a fourth semiconductor; and
and manufacturing a second anode, and enabling the second anode to form ohmic contact or Schottky contact with the fourth semiconductor.
13. The method of manufacturing according to claim 12, comprising: and growing and forming the first semiconductor, the second semiconductor and the third semiconductor in any one mode of metal organic chemical vapor deposition, molecular beam epitaxy, atomic layer deposition, physical vapor deposition and magnetron sputtering.
14. The method of manufacturing according to claim 13, comprising: the substrate is selected from a gallium nitride, silicon carbide, silicon or sapphire substrate.
15. The method of manufacturing according to claim 12, comprising: and doping the third semiconductor by ion implantation and high-temperature annealing activation or low-energy electron radiation activation to form a fourth semiconductor, wherein the adopted doping elements comprise Mg or Zn.
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| CN113659013A (en) * | 2021-06-29 | 2021-11-16 | 西安电子科技大学 | Schottky diode with p-type oxide dielectric composite mixed anode and manufacturing method thereof |
| CN114203797B (en) * | 2021-11-29 | 2023-03-21 | 西安电子科技大学 | Super junction gallium oxide transistor based on heterojunction and manufacturing method and application thereof |
| DE102022106079A1 (en) * | 2022-03-16 | 2023-09-21 | Ams-Osram International Gmbh | SEMICONDUCTOR LASER COMPONENT AND METHOD FOR PRODUCING A SEMICONDUCTOR LASER COMPONENT |
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